SM1350 series
NIPPON PRECISION CIRCUITS INC.
High Tone Quality Melody LSI
OVERVIEW
The SM1350 series are single-chip high tone quality melody ICs, fabricated using NPC’s Molybdenumgate CMOS process. Melodies are selected in serial or binary (parallel) mode, up to a maximum of 16 melody blocks. There are 4 sound generators incorporated to produce 4 kinds of output tone controlled by 16-tone data, making these ICs ideal for mechanical clocks and similar applications where high tone quality output is demanded.
PINOUT(TOP VIEW)
FEATURES
s
s
0.10 0.10 2.10MAX
0.7
0.8
0.36 0.10
1.80 0.10
s
Basic Functions • 4.0 MHz oscillator frequency • Power-save function - Oscillator stopped when no output - S0 to S3, MODE, LH pull-up resistors open • BTL or A-class outputs • Chattering prevention circuit (STN, STOP, S0 to S3) • 10-bit D/A converter Sound Generator Functions • DWS (dual wave synthesis) sound generators • 4 simultaneous sounds for 4 tones • G2 to F#7 note range • 16-tone programmable Melody Functions • Up to 16 programmable melodies (singly or in medleys) • 1024-step length (notes, rests, jumps, end codes) • Level hold/one-shot melody modes • Serial/binary (parallel) select modes • 4.8 to 605.6 tempo range in 127 steps • 12 rhythm values 3 3 3 3 • Ties and slurs programmable Control Signal Outputs • BUSYN signal LOW during melody output • CT signal output for external control 2.4 to 5.5 V supply voltage Package • 24-pin SSOP (SM1350×××) Molybdenum-gate CMOS
VDD S0 S1 S2 S3 MODE LH STOP STN BUSYN CT ICN
1
24
12
13
XT XTN TO T3N T2N T1N MSBN MSB SP SPN VOL VSS
PACKAGE DIMENSIONS
24-pin SSOP (Unit: mm)
5.40 0.20 7.80 0.30
SM1 3 5 0
10.05 0.20 10.20 0.30
0.15 − 0.05
+ 0.1
0.50 0.20
0 10
ORDERING INFOMATION
D evice SM1350 ×××M Package 24pin SSOP
s
s s
s
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S M1350 series
BLOCK DIAGRAM
S3 S2 S1 S0 MODE LH STOP STN TO T1N T2N T3N Input Circuit
Wave ROM Arithmetic block Circuit Parameter ROM
+
DAC
SP SPN VOL MSB MSBN BUSYN CT ICN
Control Circuit
XT XTN
Oscillator
Score ROM
VDD VSS
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S M1350 series
PIN DESCRIPTION
Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Name VDD S0 S1 S2 S3 MODE LH STOP STN BUSYN CT ICN VSS VOL SPN SP I/O – I I I I I I I I O O I – I O O O 17 MSB I 18 19 20 21 22 23 24 MSBN T1N T2N T3N TO XTN XT O I I I O O I U C U U U C – – Test signal output. 62.5 kHz output when not in test mode. Oscillator output Oscillator input Test signal inputs A-class output mode: BUSYIN input BTL output mode: Signed-bit output. HIGH when no melody is output. A-class output mode: ENDN output. HIGH when no melody is output. State 1 – SU SU SU SU SU SU U or O U or O C C U – – P P C Melody select mode control. Binary mode when LOW, and serial mode when HIGH. Melody output mode control. One-shot when LOW, and level hold when HIGH. One-shot melody mode: Melody output stop control. Level hold melody mode: Invalid input. Melody start control Busy output signal. LOW when a melody is output. External control pulse output Initialization clear input Ground pin Volume adjust control. Volume adjusted using an external resistor. 9-bit D/A converter output in BTL output mode. VOL current output in A-class output mode. BTL output mode: 9-bit D/A converter output. A-class output mode: 10-bit D/A converter output. BTL output mode: Signed-bit output. HIGH when no melody is output. Binary select mode: Phrase select pins. Serial select mode: S0 and S1 control melody output. Supply pin D escription 2
1. U = pull-up resistor connection, SU : pull-up resistor connection only when melody output starts, P = p-channel open drain, C = complementary output. U or O = pull-up resistance or open drain (master slice) 2. BTL/A-class output mode is selected by mask option.
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S M1350 series
SPECIFICATIONS
Absolute Maximum Ratings
VSS = 0 V
P arameter Supply voltage Input voltage Storage temperature Power dissipation Soldering temperature Soldering time Symbol VDD V IN T stg PD Tsld tsld Condition Rating −0.3 to 7.0 V S S − 0.3 to V D D + 0.3 −40 to 125 650 255 10 Unit V V °C mW °C s
Recommended Operating Conditions
VSS = 0 V
Rating P arameter Supply voltage Operating temperature Symbol VDD Topr Condition min 2.4 −20 typ – – max 5.5 80 V °C Unit
Master slice
S pecifications Serial-mode melody selections Melody output circuit Level-hold melody select change retrigger STN Pull-up/pull-down resistance STOP U/O Function Selected condition 1 to 16 BTL / A-class Yes / No U/O
Underlined entries are the default standard options. Throughout this datasheet, the standard options are assumed unless otherwise specified. U: pull-up resistance O: open input
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S M1350 series
DC Characteristics
VDD = 3 V, Ta = 25 °C, VSS = 0 V, fO = 4.0 MHz
Rating P arameter Minimum operating supply voltage1 Maximum operating supply voltage1 Symbol V MIN V M AX IS TBY ID D CG CD fXTI R XTI V IH V IL IIH IIL IO H1 IOL1 IO H2 IOL2 IO H3 V IH = V D D V IL = V S S VO H1 = V D D − 0.7 VOL1 = V S S + 0.7 VO H2 = V D D − 0.7 VOL2 = V S S + 0.7 VO H3 = V S S + 0.7 No melody output B USYN, CT, TO, SP, SPN, MSB, MSBN all open Condition min – 5.5 – – – – 3.8 40 V D D − 0.3 VSS – – 2.0 2.0 3.0 3.0 – typ – – – – 30 30 4.0 50 – – 10 10 – – – – – max 2.4 – 1.0 3.5 – – 4.2 60 VDD V S S + 0.3 20 20 – – – – 4.0 V V µA mA pF pF MHz % V V µA µA mA mA mA mA mA Unit
Standby current consumption Operating current consumption XT external capacitance XTN external capacitance Clock frequency2 Clock duty cycle2 S0 to S3, MODE, LH, STOP, STN, ICN HIGH-level input voltage S0 to S3, MODE, LH, STOP, STN, ICN LOW-level input voltage S0 to S3, MODE, LH, STOP, STN, ICN HIGH-level input current S0 to S3, MODE, LH, STOP, STN, ICN LOW-level input current BUSYN, CT, TO HIGH-level output current BUSYN, CT, TO LOW-level output current MSB, MSBN HIGH-level output current MSB, MSBN LOW-level output current SP, SPN output current3
1.Supply voltage ratings shown are with oscillator running and all functions operating normally. 2.Clock frequency and duty cycle are ratings for the clock input on pin XT. 3.Output current when 20 kΩ volume control resistor is connected to VOL, and all D/A converter bits ON, measured using the circuit of the next page.
VDD = 5 V, Ta = 25 °C, VSS = 0 V, fO = 4.0 MHz
Rating P arameter Minimum operating supply voltage1 Maximum operating supply voltage1 Symbol V MIN V M AX IS TBY ID D CG CD fXTI R XTI V IH V IL IIH V IH = V D D No melody output B USYN, CT, TO, SP, SPN, MSB, MSBN all open Condition min – 5.5 – – – – 3.8 40 V D D − 0.3 VSS – typ – – – – 30 30 4.0 50 – – 30 max 2.4 – 1.0 9.5 – – 4.2 60 VDD V S S + 0.3 50 V V µA mA pF pF MHz % V V µA Unit
Standby current consumption Operating current consumption XT external capacitance XTN external capacitance Clock frequency2 Clock duty cycle2 S0 to S3, MODE, LH, STOP, STN, ICN HIGH-level input voltage S0 to S3, MODE, LH, STOP, STN, ICN LOW-level input voltage S0 to S3, MODE, LH, STOP, STN, ICN HIGH-level input current
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S M1350 series
Rating P arameter S0 to S3, MODE, LH, STOP, STN, ICN LOW-level input current BUSYN, CT, TO HIGH-level output current BUSYN, CT, TO LOW-level output current MSB, MSBN HIGH-level output current MSB, MSBN LOW-level output current SP, SPN output current3 Symbol Condition min IIL IO H1 IOL1 IO H2 IOL2 IO H3 V IL = V S S VO H1 = V D D − 0.7 VOL1 = V S S + 0.7 VO H2 = V D D − 0.7 VOL2 = V S S + 0.7 VO H3 = V S S + 0.7 – 2.0 2.0 3.0 3.0 – typ 30 – – – – – max 50 – – – – 7.7 µA mA mA mA mA mA Unit
1. Supply voltage ratings shown are with oscillator running and all functions operating normally. 2. Clock frequency and duty cycle are ratings for the clock input on pin XT. 3. Output current when 20 kΩ volume control resistor is connected to VOL, and all D/A converter bits ON, measured using the following circuit.
VDD SP,SPN VDD VOL VSS 0.7V 20kΩ
A
AC Characteristics
VDD = 3 or 5 V, Ta = 25 °C, VSS = 0 V
Rating P arameter Initialization clear time STN pulsewidth Oscillator start-up time1 Oscillator stop time D/A converter rise delay time D/A converter fall delay time STN, STOP standby chattering time STN, STOP oscillator chattering time S0 to S3 melody select chattering time MODE, LH read timing S0 to S3 read timing BUSYN fall delay time BUSYN rise delay time2 Symbol tI CW tS TW tX ST tX EN tDAST tDAEN tC H1 tC H2 tC H3 tM R tSR tBYST tBYEN tPYST tSTPW1 tEDST tEDW Pre-input option selected A-class output option A-class output option Oscillator running Pre-input option selected Condition min 1.0 81.9 – 180.2 – 180.2 – 65.5 65.5 – – – – – 81.9 – – typ – – – – 81.9 – 81.9 – – 15.9 31.9 8.2 – 16.4 – – 16.0 max – – 500 196.7 – 196.7 – 82.0 131.1 – – – 8.2 – – 8.2 – µsec msec µsec msec msec msec msec msec msec µsec µsec msec msec msec msec msec µsec Unit
Melody start delay time STOP pulsewidth ENDN delay time ENDN pulsewidth
1.Oscillator start - up time = [time from when STN goes LOW to when TO goes HIGH] - 25.0 µs. 2.The time taken for fast damping to reduce the envelope to 0 level.
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S M1350 series
FUNCTIONAL DESCRIPTION
Chattering Prevention
STN, STOP chattering prevention function
Standby Mode
The oscillator starts when STN goes from HIGH to LOW in standby mode. Input data is received and
melody data output starts 81.9 ms after the oscillator starts if STN is LOW.
Internal Clock
81.9ms STN 81.9ms
OSC
Input Reception Melody Output
Note: Refer to the "TIMING DIAGRAMS" section to confirm melody timing specifics. Figure 1. STN, STOP chattering prevention timing (standby mode)
Oscillator starts running
After the oscillator starts running, input data is considered valid 81.9 ms after STN and STOP have
last changed state. Input data is considered invalid for intervals less than 65.5 ms.
Internal Clock
65.5ms STN or STOP 81.9ms
Input Reception
Note: Refer to the "TIMING DIAGRAMS" section to confirm melody timing specifics. Figure 2. STN, STOP chattering prevention timing ( oscillator running)
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S M1350 series S0 to S3 chattering prevention function In binary select mode, S0 to S3 are sampled in sync with the 15.26 Hz clock during level-hold melody output. The chatter prevention function compares the data sampled 65.5 ms after a data transition on S0 to S3 with the data sampled 65.5 ms before the data transition. If the 2 data samples are the same, then the data transition is considered invalid. However, if they are the not the same indicating a true transition has occurred, melody output stops and only restarts again after 2 consecutive identical melody select data samples occur. Note that except for the “Select change retrigger [No]” master slice option and binary select mode with level hold output, the S0 to S3 chattering prevention circuit is disabled.
15.26Hz
S0 to S3
#N
#N
#M
#S
Melody Output 65.5 ms
#N 65.5 ms 65.5 ms
#M 65.5 ms 65.5 ms 65.5 ms
#S
Note: Refer to the "TIMING DIAGRAMS" section to confirm melody timing specifics. Figure 3. S0 to S3 chattering prevention timing
Initialization
When power on and ICN goes LOW, all pins and internal states are initialized to the states shown below. ICN initialization has priority over all other inputs.
s
s
s
Output pins • SP, SPN Open • MSB, MSBN VDD • CT VSS • BUSYN VDD Serial melody counter Reset to first melody (S0 to S3 all 1) Oscillator circuit Stopped
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S M1350 series
Melody Output Circuit
The volume control circuit comprises a P-channel current-summing D/A converter, a built-in constantcurrent source and an external variable resistor. The circuit is set for either BTL output or A-class output by master-slice option. BTLoutput The BTL output comprises a pair of 9-bit D/A converters and 4 external transistors (2 × NPN + 2 × PNP) to drive a speaker.
VDD VDD MSB MSBN C SPEAKER SP SPN
VSS
VOL
VSS
Figure 4. BTL output circuit A-class output circuit The A-class output circuit comprises a single 10-bit D/A converter with current output on SP. The D/A converter MSB is set ON immediately after the oscillator starts, and the current output that results is the center point above and below which the converter current output varies in response to the waveform amplitude. The SP output is current-to-voltage converted for connection to audio equipment or amplifiers. In A-class output mode, the 4 sound generator waveforms are time multiplexed, so an integrating circuit must be connected between SP and the amplifier to recover the signal.
VDD VDD BUSYN AMP SP SPEAKER
VSS
VOL
VSS
Note: Refer to the "TIMING DIAGRAMS" section to confirm melody timing specifics. Figure 5. A-class output circuit
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S M1350 series
Pin Functions
Binary select mode (MODE = LOW) A melody (1 to 16) is selected according to the condition (H or L) of each 4 terminals (S0 to S3).
S3 H H H H H H H H S2 H H H H L L L L S1 H H L L H H L L S0 H L H L H L H L ST Melody 1st melody 2nd melody 3rd melody 4th melody 5th melody 6th melody 7th melody 8th melody S3 L L L L L L L L S2 H H H H L L L L S1 H H L L H H L L S0 H L H L H L H L ST Melody 9th melody 10th melody 11th melody 12th melody 13th melody 14th melody 15th melody 16th melody
H : VDD level, L : VSS level
Note:Don’t select any address with no melody recorded.
One-shot melody output (LH = LOW)
STN
S0 to S3
#N
#M
Melody Output
#N
#M
Note: Refer to the "TIMING DIAGRAMS" section to confirm melody timing specifics Figure 6. One-shot mode (binary select)
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S M1350 series
Level hold melody output (LH = HIGH)
STN
S0 to S3
#N
Melody Output
#N
#N
Note: Refer to the "TIMING DIAGRAMS" section to confirm melody timing specifics Figure 7. Level hold mode (binary select) with “Select change retrigger [No]” mask option If the “Select change retrigger [Yes]” mask option is selected, a new melody starts playing from the leading note when any of the S0 to S3 inputs changes state.
STN
S0 to S3
#N
#M
Melody Output
#N
#M
Note: Refer to the "TIMING DIAGRAMS" section to confirm melody timing specifics Figure 8. Level hold mode (binary select) with “Select change retrigger [Yes]” mask option Serial select mode (MODE = HIGH) In serial select mode, the next melody is selected by cycling through the melodies in the order #N → #N+1 … #N−1 → #N when the STN input goes LOW. The number of melodies in the cycle is set by
One-shot melody output (LH = LOW)
master-slice option. Note that when melody output is stopped using the STOP input, the melody-select counter increments.
STN
Melody Output
#N
#N+1
#N+2
Note: Refer to the "TIMING DIAGRAMS" section to confirm melody timing specifics Figure 9. One-shot mode (serial select)
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S M1350 series
Level hold melody output (LH = HIGH)
STN
Melody Output
#N
#N+1
#N+1
Note: Refer to the "TIMING DIAGRAMS" section to confirm melody timing specifics Figure 10. Level hold mode (serial select) S0, S1 melody output control The melody selection in serial mode is controlled by S0 and S1 as shown in the following table. When S1 is HIGH, S0 switches to a pull-up input configuration. The states of S0 and S1 are read in immediately after startup and does not change during melody output.
Table 1. S0, S1 resistor and melody counter
S0 LOW HIGH HIGH S1 × LOW HIGH M e l o dy counter Increments when melody output stops No increment Increments when melody output starts
STN
S1
S0
Serection Counter
#N
#N+1
#N+2
#N+2
Melody Output
#N
#N+1
#N+2
#N+2
Note: Refer to the "TIMING DIAGRAMS" section to confirm melody timing specifics Figure 11. S0, S1 melody output control timing
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S M1350 series One-shot mode repeat function In one-shot melody mode, the output repeats the same melody while STN is LOW. When STN goes HIGH, the output continues until the end of the currently playing melody and then stops.
STN
Melody Output
#N
#N
#N
Note: Refer to the "TIMING DIAGRAMS" section to confirm melody timing specifics Figure 12. One-shot melody repeat timing One-shot mode perpetual repeat function If the score ROM end code is set to the jump code, the melody will continue to play continuously once one-shot mode starts. STOP pin One-shot output mode stops when STOP goes from HIGH to LOW. The STOP input is ignored in level hold output mode and is also ignored in one-shot CT pin A pulse in sync with selected notes or rests is output on CT. There are 2 modes for the output pulses— pulse mode and hold mode.
Pulse mode
mode when STN is LOW. Note that even when STOP is LOW, STN has higher priority.
In pulse mode, a 16.4 ms pulse is output when a note or rest occurs for which the corresponding CT data in score ROM is set to 1.
CT DATA CT
1
1
0
1
1
0
16.4msec
Figure 13. CT pulse mode output
Hold mode
In hold mode, the output pulse inverts when a note or rest occurs for which the corresponding CT data in score ROM is set to 1. The output goes LOW after
the start of a melody and when jumping to the leading note of a melody.
CT DATA CT
1
1
0
1
1
0
Figure 14. CT hold mode output
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S M1350 series
Fast Damping
When melody output stops, the D/A converter output amplitude does not fall to zero instantaneously, instead the output converges to zero within a maximum of 8.2 ms to prevent noise being generated. Also, when one-shot melody output mode is retriggered, melody output restarts after the fast damping interval.
STOP
Melody Output
8.2msec(max)
Note: Refer to the "TIMING DIAGRAMS" section to confirm melody timing specifics Figure 15. Fast damping timing
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S M1350 series
Sound Generator
Synthesis mthod The sound generators use the dual wave synthesis (DWS) method. The DWS method uses the envelope of 2 waveforms (main waveform and sub waveform) to synthesize the generated tone. Using this method makes possible high tone quality output that faithfully reproduces the tones of real musical instruments.
Main Wave
Envelope Synthesize
Generated Sound
Sub Wave
Envelope
Figure 16.
Number of simultaneous sounds The maximum number of tones that can be generated simultaneously is 4, making 4-part harmony harmony Generation possible (where each tone is derived from corresponding main and sub waveforms). Sound range The range of sounds covers 5 octaves from note G2 to F#7. Waveform ROM Waveforms are stored in a 10-bit × 128-word × 8-waveform capacity waveform ROM. Number of programmable tones The maximum number of programmable tones is 16. Note that 2 similar tones which have different envelope settings are considered to be separate tones. Built-in ROMs The built-in ROMs comprise 3 types of ROM—waveform ROM containing waveform data, score ROM containing musical score data, and parameter ROM containing envelope and jump data.
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S M1350 series
Melodies
Number of melodies The maximum number of program melodies is 16. Note that is the jump function is used to change the tone or tempo during melody output, then the maximum number of melodies reduces by the number of times the jump function was invoked. Number of program steps The maximum number of program steps that can be stored in score ROM (notes, rests, jump codes and end codes) is 1024. Tempo The basic quarter note tempo can be set in the range 4.8 to 605.6 in multiples of 4.8. Note (rest) rhythm values There are 12 note rhythm values and 13 rest rhythm values that can be used to construct a melody. Also, 2 or more notes can be combined using ties or slurs. Table 2. Rhythm values Symbol Note Rest 0 Note Symbol Rest
3
1
3 3
2
3
3 3
4
5
3 3
6
7
8
3 3
9
A
B
C
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S M1350 series
TIMING DIAGRAMS(Refer to AC CHARACTERISTICS)
One-shot Melody Mode
tICW ICN tSTW tXST OSC MODE LH S0 to S3 BUSYN MELODY OUTPUT tDAST tPYST
#N
STN
tCH1
tMR
tSR
#N
tBYST
Figure 17. One-shot mode (standby to melody start)
tSTW STN tSTPW tCH2 tMR
STOP MODE LH S0 to S3
tSR
#N
tPYST Melody Output BUSYN
#M #N
tCH2
tDEAN
tBYEN tEDW
ENDN tEDST OSC tXEN
Figure 18. One-shot mode (retrigger to melody stop)
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S M1350 series
Level Hold Melody Mode 1 (master slice option: “Change select retrigger [Yes]”)
tICW ICN
STN tXST OSC MODE LH S0 to S3 tCH1 tMR
tSR
#N
BUSYN Melody Output tDAST
tBYST
#N
tPYST
Figure 19. Level hold mode (standby to melody start)
STN
S0 to S3 Melody Output BUSYN
#M
#N
tCH3
#M #N
tCH2
tDAEN
tBYEN tEDW ENDN tEDST
OSC
tXEN
Figure 20. Level hold mode (retrigger to melody stop)
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S M1350 series
Level Hold Melody Mode 2 (master slice option: “Change select retrigger [No]”)
tICW ICN
STN tXST OSC MODE LH S0 to S3 tCH1 tMR
tSR
#N
BUSYN Melody Output tDAST
tBYST tPYST
#N
Figure 21. Level hold mode (standby to melody start)
STN S0 to S3 tCH2 Melody Output BUSYN tEDW ENDN OSC tEDW tEDST tXEN
#N #N
tDAEN
tBYEN
Figure 22. Level hold mode (repeating melody to melody stop)
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S M1350 series
MEASUREMENT CIRCUIT
CG 4MHz VDD S0 S1 S2 S3 MODE LH STOP STN BUSYN CT ICN XT XTN TO T3N T2N T1N NSBN MSB SP SPN VOL VSS
CD
4.7 to 10µF (Nonpolarity)
200KΩ 0.1µF
Note that circuit constants are reference values.
P arameter 1 2 3 4 5 6 7
Pin name Melody output circuit STN STOP ICN LH MODE S0 to S3
Measurement state BTL Pull-up Pull-up Pull-up Pull-up Pull-up Pull-up
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S M1350 series
NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter, including compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies. NIPPON PRECISION CIRCUITS INC. 4-3, 2-chome Fukuzumi Koto-ku, Tokyo 135-8430, Japan Telephone: 03-3642-6661 Facsimile: 03-3642-6698 NC9611BE 1998.10
NIPPON PRECISION CIRCUITS INC.
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