SM5003 Series
NIPPON PRECISION CIRCUITS INC.
Quartz Crystal Oscillator IC
OVERVIEW
The SM5003 Series is quartz crystal oscillator ICs fabricated in NPC’s Molybdenum-gate CMOS. They comprise low-voltage low-current consumption oscillator circuits and output buffers. They incorporate built-in oscillation capacitance with superior frequency response to realize without any external components.
FEATURES
⋅ Oscillation frequency up to 70MHz ⋅ 3rd overtone oscillation ⋅ 4.5 to 5.5 V supply voltage ⋅ Inverter amplifier feedback resistance built-in (Rf ) ⋅ Oscillation capacitance built-in (CG and CD) ⋅ Output drive capability : 8 mA (VDD=4.5V) ⋅ Output frequency : fo (Oscillation frequency) ⋅ Output duty level SM5003A×H : CMOS SM5003B×H : TTL ⋅ Input level : TTL ⋅ 3 state function ⋅ Chip form (CF5003××) ⋅ 6 pin SOT (SM5003××H)
DEVICE LIST
Recommended Device SM5003AAH SM5003ABH SM5003ACH SM5003ADH SM5003BAH SM5003BBH SM5003BCH SM5003BDH Notes : CF5003×× is Chip form. SM5003××H is 6 pin SOT. frequency range (MHz) 22 to 30 30 to 43 43 to 55 55 to 70 22 to 30 30 to 43 43 to 55 55 to 70 gm (relative value) 1.0 1.0 2.0 3.0 1.0 1.0 2.0 3.0 CMOS CMOS CMOS CMOS TTL TTL TTL TTL Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Output duty level Output (standby) Internal capacitance CG(pF) 8 8 8 8 8 8 8 8 CD(pF) 15 15 15 15 15 15 15 15 (kΩ) 6.1 3.3 3.9 2.7 6.1 3.3 3.9 2.7 Rf
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SM5003 Series PAD DIMENSIONS
Q XT (1000,800)
PAD COORDINATES
Name VSS XT VDD INH VDD XT Q Coordinates (µm) X 150 570 850 850 850 150 Y 174 170 150 450 650 650
Y
(0,0)
VSS
X
XT
INH
Chip size : 1.00×0.80mm Chip thickness : 250±30µm Chip reverse side : VDD level
PIN CONFIGURATION (Top View)
INH XT VSS 1 2 3 6 5 4 XT VDD Q
TERMINAL DESCRIPTIONS
Name XT XT INH VDD VSS Q Oscillator input pin Oscillator output pin Output state control input pin (with buit-in pull-up resistance) Supply voltage Ground Output pin (fo:Oscillator frequency output XT pin) Descriptions
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SM5003 Series PACKAGE DIMENSIONS (6 pin SOT)
1.60 −0.1
+2.0
2.9±0.2
0.40±0.1 1.1±0.1
+0.1 0.15 −0.05
0.95 1.9±0.2
0 to 0.15
2.8
+2.0 −0.3
(Unit:mm)
BLOCK DIAGRAM
XT
CG Rf CD
XT
Q
VDD VSS INH Current consumption and Output waveform with NPC’s standard crystal.
f (MHz) 30 R (Ω) 18.62 20.53 22.17 22.20 25.42 L (mH) 16.24 11.34 7.40 5.05 4.18 Ca (pF) 1.733 1.396 1.370 1.388 1.254 Cb (pF) 5.337 3.989 4.105 4.226 5.170
Cb
40 50 60 70
L
Ca
R NIPPON PRECISION CIRCUITS-3
SM5003 Series SPECIFICATIONS
Absolute Maximum Ratings
Parameter Supply voltage range Input voltage range Output voltage range Strage temperature ranges Power dissipation Output current Soldering temperture Soldering time Symbol VDD VIN VOUT TSTG PW IOUT TSLD tSLD 6 pin SOT 6 pin SOT Chip form 6 pin SOT 6 pin SOT Condition (VSS = 0V unless otherwise noted) Rating Unit -0.5 to 7.0 -0.5 to VDD + 0.5 -0.5 to VDD + 0.5 -65 to 150 -55 to 125 250 13 255 10 V V V ˚C ˚C mW mA ˚C sec
Recommended Operating Conditions
(VSS= 0V unless otherwise noted) Limit Parameter Supply Voltage Input voltage Operating temperature Symbol VDD VIN TOPR Condition MIN 4.5 VSS -20 TYP MAX 5.5 VDD +80 Unit V V °C
Electrical Characteristics
(VDD= 4.5 to 5.5V, VSS = 0V, Ta= -20 to 80˚C, unless otherwise noted) Limit Parameter
HIGH-level output voltage LOW-level output voltage Output leakage current Symbol
Condition Q pin, test circuit 1, VDD= 4.5V, IOH= 8mA Q pin, test circuit 2, VDD= 4.5V, IOL= 8mA Q pin, test circuit 2, INH= Low, VDD= 5.5V INH pin INH pin INH= OPEN, test circuit 3, CL= 15pF, f= 70MHz SM5003A×H load circuit 1 SM5003B×H load circuit 2 VOH= VDD VOL= VSS
MIN 3.9
TYP 4.2 0.3
MAX 0.4 10 10
Unit V V µA µA V V mA mA kΩ kΩ kΩ kΩ kΩ pF pF
VOH VOL IZ VIH VIL IDD
HIGH-level input voltage LOW-level input voltage Current consumption
2.0 0.8 28 28 25 5.4 2.9 3.5 2.4 7.2 13.5 100 6.1 3.3 3.9 2.7 8 15 45 45 250 6.7 3.7 4.3 3.0 8.8 16.5
Pull-up resistance AC feedback resistance
RUP Rf
INH pin, test circuit 4 test circuit 5 SM5003×AH SM5003×BH SM5003×CH SM5003×DH
Internal capacitance
CG CD
Design value, determined by the internal wafer pattern
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SM5003 Series Switching Characteristics
Duty level CMOS (SM5003A×H ) Parameter Output rise time Output fall time Output duty cycle Output disable delay time Output enable delay time Duty level TTL (SM5003B×H ) Symbol tr tf DUTY tPLZ tPZL (VDD= 4.5 to 5.5V, VSS = 0V, Ta= -20 to 80°C, unless otherwise noted) Limit Conditions Test circuit 6, load circuit 1, CL= 15pF 0.1VDD to 0.9VDD Test circuit 6, load circuit 1, CL= 15pF 0.9VDD to 0.1VDD Test circuit 6, Ta= 25˚C, VDD=5.0V load circuit 1, CL= 15pF, f= 70MHz (*1) Test circuit 6, Ta= 25˚C, VDD= 5.0V load circuit 1, CL= 15pF 100 100 ns ns 45 55 % 3.5 7 ns MIN TYP 3.5 MAX 7 Unit ns
(VDD= 4.5 to 5.5V, VSS = 0V, Ta= -20 to 80˚C, unless otherwise noted) Limit
Parameter Output rise time Output fall time Output duty cycle Output disable delay time Output enable delay time Note:
Symbol tr tf DUTY tPLZ tPZL
Condition Test circuit 6, load circuit 2, CL= 15pF 0.4VDD to 2.4VDD Test circuit 6, load circuit 2, CL= 15pF 2.4VDD to 0.4VDD Test circuit 6, Ta= 25˚C, VDD=5.0V load circuit 2, CL= 15pF, f= 70MHz (*1) Test circuit 6, Ta= 25˚C, VDD= 5.0V load circuit 2, CL= 15pF
MIN
TYP 2.5 2.5
MAX 7 7 55 100 100
Unit ns ns % ns ns
45
(*1) Determined by the lot. monitor.
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SM5003 Series TEST CIRCUITS
Test Circuit 1
3.5 VP-P, 10MHz sine wave input signal
VDD VDD
Test Circuit 2
Signal Generator
R1 C1: 0.001µF R1: 50Ω R2: 490Ω
C1 XT VSS Q R2 INH
VDD Q VSS
IOL, IZ IZ
A V VOL
VOH
Q out monitor VOH 0V
Test Circuit 3
3.5 VP-P, 70MHz sine wave input signal
Test Circuit 4
VDD
A
VDD C1 XT R1 C1: 0.001µF R1: 50Ω VSS
IDD VSS Q INH
RUP=
VDD IPR
Signal Generator
A
IPR
Test Circuit 5
Test Circuit 6
XT XT
VDD Rf= VSS VDD IRf X'tal
XT XT
VDD Q VSS
A
IRf
Load Circuit 1
Load Circuit 2
VDD R
Q output CL
CL=15pF(Including probe capacity)
Q output CL
CL=15pF(Including proove capacity) R=800Ω
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SM5003 Series Switching Time Test Waveforms
Duty level CMOS (SM5003A×H)
tr,tf DUTY
Q output
0.9VDD 0.1VDD
0.9VDD 0.1VDD
DUTY measuring voltage (0.5VDD)
tr
Output duty cycle time
tf
Q output
TW T
DUTY measuring voltage (0.5V DD)
DUTY= (TW/ T) 100 (%)
Duty level TTL (SM5003B×H)
tr,tf DUTY
Q output
2.4V 0.4V
2.4V 0.4V
DUTY measuring voltage (1.4V)
tr
Output duty cycle time
tf
Q output
TW T
DUTY measuring voltage (1.4V)
DUTY= (TW/ T) 100 (%)
Output Disable/Enable Delay Times INH
VIH VIL
tPLZ Q output
INH inputwaveform tr = tf
tPZL
10ns
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SM5003 Series
NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to
improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter, including compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies.
NIPPON PRECISION CIRCUITS INC.
4-3, 2-chome Fukuzumi, Koto-ku Tokyo, 135 -8430, JAPAN Telephon: 03-3642-6661 Facsimile: 03-3642-6698
NC9511BE 1996 10
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