SM5877

SM5877AM NIPPON PRECISION CIRCUITS INC. 3rd-order Σ∆, 2-channel D/A Converter OVERVIEW The SM5877AM is a 3rd-order Σ∆, 2-channel D/A converter LSI for digital audio reproduction equipment. It also incorporates an 8-times oversampling digital filter and analog, post-converter lowpass filters. The SM5877AM has digital deemphasis filter, attenuator, and soft mute circuits built-in. Double-speed operation and low-voltage operation are also supported. The SM5877AM operates from a 2.7 to 5.5 V supply, and is available in 24-pin SSOPs. PINOUT MUTE DEEM CKO DVSS BCKI DI DVDD LRCI TSTN 1 2 3 4 5 6 24 23 22 21 20 19 ATCK MODE RSTN DS XVSS XTO XTI XVDD MUTEO AVDDR RO AVSS SM5877AM 7 8 9 10 11 12 18 17 16 15 14 13 FEATURES s s TO1 AVDDL s s s s s s s s s s s s 2.7 to 5.5 V operating supply voltage range 4.5 to 5.5 V operating supply voltage range for double-speed mode 44.1 kHz sampling frequency Normal (384fs) and double-speed (192fs), 16.9344 MHz system clock 16.9344 MHz crystal oscillator circuits built-in 16-bit, MSB first, rear-packed serial data input format (≤ 64fs bit clock) 8-times oversampling digital filter • 32 dB stopband attenuation • ±0.05 dB passband ripple Deemphasis filter operation • 36 dB stopband attenuation • −0.09 to +0.23 dB deviation from ideal deemphasis filter characteristics Attenuator • 6-bit attenuator (64 steps) • Soft mute function when MODE is HIGH (approx. 1024/fs total muting time) Built-in infinity-zero detector Σ∆ 2-channel D/A converter • 3rd-order noise shaper • 32fs oversampling (16fs for double-speed mode) 3rd-order analog, post-converter lowpass filters built-in (165 kHz cut-off frequency) 24-pin SSOP Molybdenum-gate CMOS process LO PACKAGE DIMENSIONS Unit: mm 24-pin SSOP 5.40 0.20 7.80 0.30 10.05 0.20 10.20 0.30 1.80 0.10 0.15 − 0.05 + 0.1 0.10 0.10 2.10MAX 0.7 0.8 0.36 0.10 0.50 0.20 0 10 Package Marking SM5 87 7AM NIPPON PRECISION CIRCUITS—1 SM5877AM BLOCK DIAGRAM LRCI BCKI DI Input interface MODE ATCK MUTE L R MUTEO Attenuation counter Filter & attenuation operation block L R DEEM CKO XVSS XTO RSTN DS DVSS DVDD TSTN TO1 Timing control L PWM data generation block R Noise shaper operation block XTI XVDD AVDDL AVDDR + − − + LO AVSS RO PIN DESCRIPTION Number 1 2 3 4 5 6 7 8 9 Name MUTE DEEM CKO DVSS BCKI DI DVDD LRCI TSTN Ip Ip Ip Ip I/O Ip Ip O Description When MODE is HIGH: Soft mute ON/OFF control. Mute is active when HIGH. When MODE is LOW: Attenuator level direction control. The attenuator direction is down when HIGH. Deemphasis control. Deemphasis is ON when HIGH, and OFF when LOW. 16.9344 MHz clock output Digital ground pin Bit clock input pin Serial data input pin Digital supply pin Input sample data rate (fs) clock input pin. Left-channel input when HIGH, and rightchannel input when LOW. Test pin. Test mode when LOW. NIPPON PRECISION CIRCUITS—2 SM5877AM Number 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Name TO1 AVDDL LO AVSS RO AVDDR MUTEO XVDD XTI XTO XVSS DS RSTN MODE ATCK Ip Ip Ip Ip I O O O O I/O O Test output 1. Normally LOW. Left-channel analog supply pin Left-channel analog output Analog ground pin Right-channel analog output Right-channel analog supply pin Infinity-zero detection output Crystal oscillator supply pin Crystal oscillator or 16.9344 MHz external clock input pin Crystal oscillator output pin Crystal oscillator ground pin Double/Normal-speed mode select. Double-speed mode when HIGH. Reset pin. Reset when LOW. Soft mute/attenuator mode select. Soft mute mode when HIGH. Attenuator level setting clock. Disabled when MODE is HIGH. Description SPECIFICATIONS Absolute Maximum Ratings DVSS = AVSS = XVSS = 0 V, AVDD = AVDDL = AVDDR Parameter Supply voltage range Input voltage range1 XTI input voltage range Storage temperature range Power dissipation Soldering temperature Soldering time Symbol DVDD, AVDD, XVDD VIN1 VIN Tstg PD Tsld tsld Rating −0.3 to 7.0 DVSS − 0.3 to DVDD + 0.3 XVSS − 0.3 to XVDD + 0.3 −40 to 125 250 255 10 Unit V V V °C mW °C s 1. Pins MUTE, DEEM, BCKI, DI, LRCI, TSTN, DS, RSTN, MODE and ATCK. Also applicable during supply switching. Recommended Operating Conditions Normal-voltage: DVSS = AVSS = XVSS = 0 V, AVDD = AVDDL = AVDDR Parameter Supply voltage range Symbol DVDD, AVDD, XVDD DVDD − XVDD, DVDD − AVDD, XVDD − AVDD, DVSS − XVSS, DVSS − AVSS, XVSS − AVSS Topr Rating 4.5 to 5.5 Unit V Supply voltage variation ±0.1 V Operating temperature range −40 to 85 °C NIPPON PRECISION CIRCUITS—3 SM5877AM Low-voltage: DVSS = AVSS = XVSS = 0 V, AVDD = AVDDL = AVDDR Parameter Supply voltage range Symbol DVDD, AVDD, XVDD DVDD − XVDD, DVDD − AVDD, XVDD − AVDD, DVSS − XVSS, DVSS − AVSS, XVSS − AVSS Topr Rating 2.7 to 4.5 Unit V Supply voltage variation ±0.1 V Operating temperature range −20 to 70 °C DC Electrical Characteristics Normal-voltage: DVSS = AVSS = XVSS = 0 V, DVDD = AVDD = XVDD = 4.5 to 5.5 V, AVDD = AVDDL = AVDDR, Ta = −40 to 85 °C Rating Parameter DVDD digital supply current1 XVDD system clock supply current1 AVDD analog supply current1 XTI HIGH-level input voltage XTI LOW-level input voltage XTI AC-coupled input voltage HIGH-level input voltage3 LOW-level input voltage3 HIGH-level output voltage4 LOW-level output voltage4 CKO HIGH-level output voltage CKO LOW-level output voltage XTI HIGH-level input current XTI LOW-level input current LOW-level input Input leakage current4 Symbol IDDD IDDX IDDA2 VIH1 VIL1 VINAC VIH2 VIL2 VOHA VOLA VOHC VOLC IIH1 IIL1 IIL2 ILH IOH = −1 mA IOL = 1 mA IOH = −1 mA IOL = 1 mA VIN = XVDD VIN = 0 V VIN = 0 V VIN = DVDD Clock input Clock input Condition min – – – 0.7XVDD – 0.3XVDD 2.4 – AVDD − 0.4 – DVDD − 0.4 – – – – – typ 15 2 4 – – – – – – – – – 12 12 12 – max 25 5 8 – 0.3XVDD – – 0.5 – 0.4 – 0.4 25 25 25 1.0 mA mA mA V V Vp-p V V V V V V µA µA µA µA Unit current4 1. DVDD = AVDD = XVDD = 5 V, DS = 5 V (double speed), XTI clock input frequency fXTI = 16.9344 MHz, no output load. 2. IDDA is the total current. 3. Pins MUTE, DEEM, BCKI, DI, LRCI, TSTN, DS, RSTN, MODE and ATCK. 4. Pins TO1 and MUTEO. NIPPON PRECISION CIRCUITS—4 SM5877AM Low-voltage: DVSS = AVSS = XVSS = 0 V, DVDD = AVDD = XVDD = 2.7 to 4.5 V, AVDD = AVDDL = AVDDR, Ta = −20 to 70 °C Rating Parameter DVDD digital supply current1 XVDD system clock supply current1 AVDD analog supply current1 XTI HIGH-level input voltage XTI LOW-level input voltage XTI AC-coupled input voltage HIGH-level input LOW-level input voltage3 Symbol IDDD IDDX IDDA2 VIH1 VIL1 VINAC VIH2 VIL2 VOHA VOLA VOHC VOLC IIH1 IIL1 IIL2 ILH IOH = −0.5 mA IOL = 0.5 mA IOH = −0.5 mA IOL = 0.5 mA VIN = XVDD VIN = 0 V VIN = 0 V VIN = DVDD Clock input Clock input Condition min – – – 0.7XVDD – 0.3XVDD 2.4 – AVDD − 0.4 – DVDD − 0.4 – – – – – typ 6 1 1 – – – – – – – – – 4 4 4 – max 9 3 2 – 0.3XVDD – – 0.5 – 0.4 – 0.4 15 15 15 1.0 mA mA mA V V Vp-p V V V V V V µA µA µA µA Unit voltage3 HIGH-level output voltage4 LOW-level output voltage4 CKO HIGH-level output voltage CKO LOW-level output voltage XTI HIGH-level input current XTI LOW-level input current LOW-level input current4 Input leakage current4 1. DVDD = AVDD = XVDD = 3 V, DS = 0 V (normal speed), XTI clock input frequency fXTI = 16.9344 MHz, no output load. 2. IDDA is the total current. 3. Pins MUTE, DEEM, BCKI, DI, LRCI, TSTN, DS, RSTN, MODE and ATCK. 4. Pins TO1 and MUTEO. AC Electrical Characteristics Normal-voltage: DVSS = AVSS = XVSS = 0 V, DVDD = AVDD = XVDD = 4.5 to 5.5 V, AVDD = AVDDL = AVDDR, Ta = −40 to 85 °C Low-voltage: DVSS = AVSS = XVSS = 0 V, DVDD = AVDD = XVDD = 2.7 to 4.5 V, AVDD = AVDDL = AVDDR, Ta = −20 to 70 °C System clock (XTI) Crystal Oscillator Rating Parameter Oscillator frequency Symbol min fOSC 4.0 typ 16.9344 max 17.8 MHz Unit NIPPON PRECISION CIRCUITS—5 SM5877AM External clock input Rating Parameter HIGH-level clock pulsewidth LOW-level clock pulsewidth Clock pulse cycle Symbol min tCWH tCWL tXI 26.0 26.0 56.0 typ 29.5 29.5 59.0 max 125 125 250 ns ns ns Unit XTI input clock VIH1 0.5V DD VIL1 t CWH t XI t CWL Serial input (BCKI, DI, LRCI) Rating Parameter BCKI HIGH-level pulsewidth BCKI LOW-level pulsewidth BCKI pulse cycle DI setup time DI hold time Last BCKI rising edge to LRCI edge LRCI edge to first BCKI rising edge Symbol min tBCWH tBCWL tBCY tDS tDH tBL tLB 50 50 6tXI 50 50 50 50 typ – – – – – – – max – – – – – – – ns ns ns ns ns ns ns Unit Serial input timing t BCY t BCWH t BCWL BCKI 1.5 V t DS t DH DI 1.5 V t BL t LB LRCI 1.5 V NIPPON PRECISION CIRCUITS—6 SM5877AM Control input (MUTE, MODE, ATCK, DEEM, DS) Rating Parameter ATCK LOW-level pulsewidth ATCK HIGH-level pulsewidth MUTE setup time MUTE hold time MODE setup time MODE hold time Rise time Fall time Symbol min tATWL tATWH tMUS tMUH tMOS tMOH tr tf 0.5/fs 0.5/fs 100 100 100 100 – – typ – – – – – – – – max – – – – – – 50 50 µs µs ns ns ns ns ns ns Unit Control input timing MUTE MODE t MUS t MOS t MUH t MOH 1.5 V ATCK 1.5 V t ATWL t ATWH tf tr DEEM DS MUTE MODE ATCK 2.4 V 0.5 V 0.5 V 2.4 V 1.5 V Reset Input (RSTN) Rating Parameter RSTN LOW-level pulsewidth after supply rising edge Symbol min tRSTN 50 typ – max – ns Unit NIPPON PRECISION CIRCUITS—7 SM5877AM Theoretical Filter Characteristics Deemphasis OFF overall characteristics Frequency band Parameter f Passband ripple Stopband attenuation Built-in analog LPF compensation 0 to 0.4535fs 0.5465fs to 7.4535fs 0.4535fs @ fs = 44.1 kHz 0 to 20.0 kHz 24.1 to 328.7 kHz 20.0 kHz min −0.05 32 – typ – – −0.34 max +0.05 – – Attenuation (dB) Overall frequency characteristic (deemphasis OFF) 0 10 20 Gain (dB) 30 40 50 60 0.0 1.0 2.0 3.0 4.0 Frequency (fs) 5.0 6.0 7.0 8.0 Passband characteristic (deemphasis OFF) 0.0 0.2 Gain (dB) 0.4 0.6 0.8 0.000 0.125 0.250 Frequency (fs) 0.375 0.4535 0.500 NIPPON PRECISION CIRCUITS—8 SM5877AM Deemphasis ON overall characteristics Frequency band Parameter f Deviation from ideal deemphasis filter characteristics Stopband attenuation Built-in analog LPF compensation 0 to 0.4535fs 0.5465fs to 7.4535fs 0.4535fs @ fs = 44.1 kHz 0 to 20.0 kHz 24.1 to 328.7 kHz 20.0 kHz min −0.09 36 – typ – – −0.34 max +0.23 – – Attenuation (dB) Overall frequency characteristic (deemphasis ON) 0 10 20 Gain (dB) 30 40 50 60 0.0 1.0 2.0 3.0 4.0 Frequency (fs) 5.0 6.0 7.0 8.0 Passband characteristic (deemphasis ON) 0 2 4 Gain (dB) 6 8 10 12 0.000 0.125 0.250 Frequency (fs) 0.375 0.4535 0.500 NIPPON PRECISION CIRCUITS—9 SM5877AM AC Analog Characteristics Normal-voltage: DVSS = AVSS = XVSS = 0 V, DVDD = AVDD = XVDD = 5 V, AVDD = AVDDL = AVDDR, DS = 0 V, DEEM = 0 V, crystal oscillator frequency fOSC = 16.9344 MHz, Ta = 25 °C Rating Parameter Total harmonic distortion LSI output level Evaluation board output level Dynamic range Signal-to-noise ratio1 Symbol THD + N Vout1 Vout2 D.R S/N Ch. Sep Condition min 1 kHz, 0 dB 1 kHz, 0 dB 1 kHz, 0 dB 1 kHz, −60 dB 1 kHz, 0/−∞ dB 1 kHz, −∞/0 dB – 1.1 – 91 90 87 typ 0.004 1.2 1.2 97 96 93 max 0.010 1.3 – – – – % Vrms Vrms dB dB dB Unit Channel separation 1. Signal-to-noise is measured following a device reset, with DATA = 0 (DI = LOW). Under these conditions, the signal-to-noise ratio includes noise-shaper noise. Low-voltage: DVSS = AVSS = XVSS = 0 V, DVDD = AVDD = XVDD = 3 V, AVDD = AVDDL = AVDDR, DS = 0 V, DEEM = 0 V, crystal oscillator frequency fOSC = 16.9344 MHz, Ta = 25 °C Rating Parameter Total harmonic distortion LSI output level Evaluation board output level Dynamic range Signal-to-noise ratio1 Channel separation Symbol THD + N Vout1 Vout2 D.R S/N Ch. Sep Condition min 1 kHz, 0 dB 1 kHz, 0 dB 1 kHz, 0 dB 1 kHz, −60 dB 1 kHz, 0/−∞ dB 1 kHz, −∞/0 dB – 0.65 – 74 74 72 typ 0.009 0.71 0.71 86 84 82 max 0.030 0.77 – – – – % Vrms Vrms dB dB dB Unit 1. Signal-to-noise is measured following a device reset, with DATA = 0 (DI = LOW). Under these conditions, the signal-to-noise ratio includes noise-shaper noise. NIPPON PRECISION CIRCUITS—10 SM5877AM AC Measurement Circuit and Conditions Measurement circuit block diagram CKO (384fs) BCK Left channel Signal generator LRCK (fs) DATA Evaluation board Right channel Left/Right channel selector Distortion analyzer fs = 44.1 kHz DATA = 16 bits NF Corporation 3346A. 10 kΩ input impedance Shibasoku AD725C. RMS measurement Measurement conditions Parameter1 Total harmonic distortion Output level Dynamic range Signal-to-noise ratio Symbol THD + N Vout DR S/N D-RANGE THRU 20 kHz lowpass filter ON 400 Hz highpass filter OFF JIS A filter ON 20 kHz lowpass filter ON 400 Hz highpass filter OFF 3346A left/right-channel selector switch THRU AD725C distortion analyzer with built-in filter 20 kHz lowpass filter ON 400 Hz highpass filter OFF Channel separation Ch. Sep THRU 1. Pins LO and RO should have an output load of 10 kΩ (min). NIPPON PRECISION CIRCUITS—11 Measurement circuit AVDD AVSS + 100u + 100u 5.6k 0.01u 680 10u 33u + U2 + + + 1500p 22k 1/2 NJM2100D U2 1/2 100k 100p VCC 0.1u 10u + 0.1u 10u + 2.2u 100 OUTPUT 1000p 33u NJM2100D 22k RO 14 0.01u 100p 10p 10p 22k 33k 220p 5.6k 6.8k R 22k SW1 33k X’tal DS DS 21 XTO 19 ATCK 24 MODE 23 RSTN 22 XVSS 20 XVDD 17 MUTEO 16 ATCK LRCI 100p SM5877AM VEE 5.6k 22k 33k 680 33u + U3 + + + 1500p 22k 1/2 NJM2100D U3 1/2 100k 100p 2.2u 100 OUTPUT 1000p 33u NJM2100D 22k 100u 0.01u + 5.6k 6.8k L 10u 33k 22k 220p 10 TO1 11 AVDDL 12 LO SM5877AM BCKI DI 1 MUTE 2 DEEM 3 CKO 4 DVSS 5 BCKI 6 DI 7 DVDD 8 LRCI DEEM RSTN 9 TSTN MUTE AVDDR 15 AVSS 13 MODE XTI 18 CKO DVDD + SW2 SW3 SW4 DVSS NIPPON PRECISION CIRCUITS—12 0.1u 100u SM5877AM FUNCTIONAL DESCRIPTION System Clock/Speed Switching (XTI, XTO, CKO, DS) The system clock on XTI can be set to run at one of two speeds, 384fs (normal speed) or 192fs (doublespeed), where fs is the input frequency on LRCI. The speed for CD playback is set by the input level on DS, as shown in table 1. The system clock should be fixed at 16.9344 MHz. Table 1. System clock select DS Parameter Symbol LOW (normal speed) 384fs 16.9344 MHz at fs = 44.1 kHz 384fs HIGH (double speed) 192fs 16.9344 MHz at fs = 88.2 kHz 192fs Note that the input clock accuracy and signal-tonoise ratio greatly influence the AC analog characteristics. Accordingly, care should be taken to ensure that the clock is free from jitter. The system clock can be controlled by a crystal oscillator comprising a crystal connected between XTI and XTO and the built-in CMOS inverter. Alternatively, an external system clock can be input on XTI. As the internal CMOS inverter has a feedback resistor, the external clock can be AC coupled to XTI. The system clock is output on CKO. XTI input clock frequency CD playback XTI frequency CKO output clock frequency Internal system clock period fXI (= 1/tXI) fXI fCO TSYS tXI tXI System Reset (RSTN) The device should be reset in the following cases. s s At power ON When LRCI and/or the system clock XTI stop, or other abnormalities occur. The device is reset by applying a LOW-level pulse on RSTN. At system reset, the internal arithmetic operation and output timing counter are synchronized on the next LRCI rising edge, as shown in figure 1. RSTN LOW 1 LRCI 2 3 9 10 Internal reset LO Outputs muted RO Figure 1. System reset timing Audio Data Input (DI, BCKI, LRCI) The digital audio data is input on DI in MSB-first, 2scomplement, 16-bit serial format. Serial data bits are read into the SIPO register (serialto-parallel converter register) on the rising edge of the bit clock BCKI. The arithmetic operation and output timing are independent of the input timing. Accordingly, after a reset, as long as the clock frequency ratio between LRCI and the system clock XTI is maintained, phase differences between LRCI, BCKI and the system clock XTI do not affect the functional operation. Also, any jitter present on the data input clock does not appear as output pulse jitter. The bit clock frequency on BCKI should be between 32fs and 64fs. NIPPON PRECISION CIRCUITS—13 SM5877AM Deemphasis Filter (DEEM) The built-in digital deemphasis filter is designed to operate at 44.1 kHz. Deemphasis is ON when DEEM is HIGH, and OFF when DEEM is LOW. Attenuation (MDT, MCK, MLEN) The digital attenuation mode is selected when MODE is LOW. The attenuator operates by multiplying the internal 6-bit up/down counter’s output data with the signal data. The direction of the 6-bit up/down counter is controlled by the level on MUTE (down when MUTE is HIGH, and up when MUTE is LOW). The count is advanced on the rising edge of ATCK. When the count reaches 0 (down) or 63 (up), the counter automatically stops. Table 2. Attenuator gain DATT 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 Gain (dB) 0.0 −0.139 −0.280 −0.424 −0.570 −0.718 −0.869 −1.023 −1.180 −1.339 −1.501 −1.667 −1.835 −2.007 −2.183 −2.362 DATT 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 Gain (dB) −2.545 −2.732 −2.923 −3.118 −3.317 −3.522 −3.731 −3.946 −4.166 −4.391 −4.623 −4.861 −5.105 −5.357 −5.617 −5.884 DATT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Gain (dB) −6.160 −6.444 −6.739 −7.044 −7.360 −7.687 −8.028 −8.383 −8.752 −9.138 −9.542 −9.966 −10.412 −10.881 −11.378 −11.904 DATT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Gain (dB) −12.465 −13.064 −13.708 −14.403 −15.159 −15.987 −16.902 −17.925 −19.085 −20.424 −22.007 −23.946 −26.444 −29.966 −35.987 −∞ The gain is set by the counter contents DATT as follows. DATT Gain = 20 × log  --------------- [dB]  63  Upon system initialization or when MODE changes state, DATT is set to 63, which corresponds to the maximum gain of 0 dB as shown in table 2. Soft Mute (SMUTE) Soft mute mode is selected when MODE is HIGH. The up/down counter is switched to internal clock drive, and soft mute operation is controlled by MUTE only. When MUTE goes HIGH, the up/down counter counts down. The total time to go from 0 to maximum mute is 1024/fs. This corresponds to approximately 23.2 ms at fs = 44.1 kHz. When MUTE is LOW, soft mute is released. The attenuation counter output counts up, increasing the gain. The time taken to return to 0 dB is also 1024/fs. Soft mute operation is shown in figure 2. Upon system initialization or when MODE changes state, mute is released, which corresponds to the maximum gain of 0 dB. NIPPON PRECISION CIRCUITS—14 SM5877AM Infinity-Zero (MUTEO) MUTE The SM5877AM outputs an infinity-zero detection output signal under the following circumstances. s 0 dB Gain –∞ 1024/fs 1024/fs s Figure 2. Soft mute operation example From immediately after a reset input on RSTN until the initialization cycle finishes and the first data cycle occurs. When an infinity-zero occurs in the input data. When an infinity-zero is detected, a period of 214 × (1/fs) ≈ 0.37 seconds takes place before MUTEO goes HIGH. 214/fs 1 2 3 8 9 LRCI DI RSTN MUTEO Initialize Signal No Signal Signal Figure 3. MUTEO output timing TIMING DIAGRAMS Input Timing (DI, BCKI, LRCI) 1/fs MSB 16 bits Left channel DI Right channel LSB MSB 16 bits LSB BCKI (64fs max) LRCI TYPICAL APPLICATIONS Input Interface Circuits Normal Speed 16.9344 MHz crystal XTAI 16.9344 MHz 44.1 kHz XTI CKO LRCI DI XTO Sony CXD2500 PSSL LRCK DA16 DA15 SM5877 2.1168 MHz BCKI DS NIPPON PRECISION CIRCUITS—15 SM5877AM 16.9344 MHz crystal X1 16.9344 MHz 44.1 kHz XTI CKO LRCI DI XTO Matsushita MN6617 SEL IPSEL R/L SRDATA SRCK SM5877 2.1168 MHz BCKI DS Double Speed 16.9344 MHz crystal XTAI 16.9344 MHz 44.1 kHz (88.2 kHz) XTI CKO LRCI DI XTO Sony CXD2500 PSSL LRCK DA16 DA15 SM5877 2.1168 MHz (4.2336 MHz) BCKI DS Normal Double speed Normal/double speed control ( ) indicate double-speed mode Note that the output analog characteristics and other specifications are not guaranteed for a particular format or application circuit. Pins LO and RO should have an output load of 10 kΩ (min). NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter, including compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies. NIPPON PRECISION CIRCUITS INC. 4-3, Fukuzumi 2-chome Koto-ku, Tokyo 135-8430, Japan Telephone: 03-3642-6661 Facsimile: 03-3642-6698 NC9501AE 1995.06 NIPPON PRECISION CIRCUITS INC. NIPPON PRECISION CIRCUITS—16