SM6452BM

SM6452AM/BM NIPPON PRECISION CIRCUITS INC. Audio Variable Volume ICs OVERVIEW The SM6452AM/BM are serial-control electronic variable volume ICs for audio applications. They provide electronic volume control for 6 channels, with independent channel gain, attenuation and muting. They feature enhanced digital zip noise suppression. The serial control options are 3-wire interface (SM6452AM) and I2C bus (SM6452BM). The SM6452AM/BM are available in 24-pin SSOP packages. FEATURES s PINOUT pre lim ina AVDD1 VREF1 AIN1 AIN2 AIN3 AIN4 AIN5 AIN6 1 s s s s s s s 6-channel input/output (positive-phase-sequence output) Attenuation function • 6-channel independent control • +16 to 0 to −79dB variable range • 1.0 dB/step adjustment • Mute function Microcontroller interface • 3-wire serial data interface (SM6452AM) • I2C bus format 2-wire control (SM6452BM)*1 • I2C address = 1000000 Low noise • ≤ 0.002% THD + noise • ≤ 10µVrms residual noise 0.5AVDD analog reference voltage source built-in Power supply • 7 to 13V analog supply • 2.7 to 5.5V digital supply Molybdenum-gate CMOS process 24-pin SSOP SM6452AM ORDERING INFORMATION D e vice SM6452BM P ackag e SM6452AM SM6452BM 24-pin SSOP 24-pin SSOP *1. I2C bus is a registered trademark of Philips Electronics N.V. NIPPON PRECISION CIRCUITS—1 ry Top view 24 AVDD2 VREF2 AOUT1 AOUT2 AOUT3 AOUT4 AOUT5 AOUT6 AVSS2 DVSS MCK MLEN S M 6 4 5 2 AM AVSS1 MDT DVDD RSTN 12 13 Top view AVDD1 VREF1 AIN1 AIN2 AIN3 AIN4 AIN5 AIN6 1 24 AVDD2 VREF2 AOUT1 AOUT2 AOUT3 AOUT4 AOUT5 AOUT6 AVSS2 DVSS SCL NC S M 6 4 5 2 BM AVSS1 SDA DVDD RSTN 12 13 S M6452AM/BM PACKAGE DIMENSIONS Unit: mm 10.05 0.20 10.20 0.30 0.10 0.10 +0.20 1.90−0.10 0.8 0.36 0.10 0.10 lim AVDD1 AIN1 AIN2 AIN3 AIN4 AIN5 AIN6 ATT Control ATT Control ATT Control ATT Control ATT Control ATT Control Gain/ATT Decoder VREF1 Interface Control AVSS1 DVDD RSTN MDT(AM)/SDA(BM) MCK(AM)/SCL(BM) MLEN(AM)/NC(BM) BLOCK DIAGRAM pre ina ry 5.40 0.20 7.80 0.30 0.15 − 0.05 + 0.1 1.80 0.12 M 0.50 0.20 0 10 AVDD2 Gain/ATT Control Gain/ATT Control Gain/ATT Control Gain/ATT Control Gain/ATT Control Gain/ATT Control AOUT1 AOUT2 AOUT3 AOUT4 AOUT5 AOUT6 VREF2 AVSS2 DVSS NIPPON PRECISION CIRCUITS—2 S M6452AM/BM PIN DESCRIPTION Number 1 2 3 4 5 6 7 8 9 10 11 S D A (BM) 12 13 NC (BM) MCK (AM) 14 SCL (BM) 15 16 17 18 19 20 21 22 23 24 DV S S I – – I RSTN MLEN (AM) I/O Ip Ip Name AV D D 1 VREF1 AIN1 AIN2 AIN3 AIN4 AIN5 AIN6 AV S S 1 DV D D MDT (AM) I/O 1 – O I I I I I I – – I A/D2 A A A A A A A A Analog supply 1 Reference voltage source capacitor connection (0.5AV D D 1 ) Channel 1 audio input Channel 2 audio input Channel 3 audio input Channel 4 audio input Channel 5 audio input Channel 6 audio input D escription pre 1 . Ip = input pin with pull-up 2 . A = analog, D= digital NIPPON PRECISION CIRCUITS—3 lim AV S S 2 – A AOUT6 AOUT5 AOUT4 AOUT3 AOUT2 AOUT1 VREF2 O O O O O O A A A A A A A O – AV D D 2 A ina ry A Analog ground 1 Digital supply D D Microcontroller data input D I2 C b us serial data input and acknowledge (ACK) signal output D System reset input (active LOW -level) Microcontroller latch enable input D – No connection D Microcontroller clock input I2 C b us clock input D D Digital ground Analog ground 2 Channel 6 audio output Channel 5 audio output Channel 4 audio output Channel 3 audio output Channel 2 audio output Channel 1 audio output Reference voltage source capacitor connection (0.5AV D D 2 ) Analog supply 2 S M6452AM/BM SPECIFICATIONS Absolute Maximum Ratings AVSS1 = AVSS2 = DVSS = 0V, AVDD1 = AVDD2 = AVDD, DVDD = DVDD P arameter A nalog supply voltage Digital supply voltage Analog input voltage Digital input voltage I2 C b us signal input voltage (SDA, SCL) Symbol AV D D Rating 1 −0 .3 to 15.0 −0 .3 to 7.0 U nit V V V Storage temperature range Pow er dissipation 1 . Ratings also apply at supply switch ON and OFF. Recommended Operating Conditions AVSS1 = AVSS2 = DVSS = 0V P arameter A nalog supply voltage Digital supply voltage Supply voltage deviation Operating temperature lim T o pr AV D D 1 − AV D D 2 , AV S S 1 − AV S S 2 , AV S S 1 − DV S S , AV S S 2 − DV S S pre NIPPON PRECISION CIRCUITS—4 ina ry DV D D V INA V S S − 0 .3 to AV D D + 0 .3 V IND V S S − 0 .3 to DV D D + 0 .3 10 V IOPEN T s tg PD −5 5 to 125 TBD Symbol AV D D Rating 7 .0 to 13.0 2 .7 to 5.5 ± 0.1 −4 0 to 85 DV D D V V °C mW Unit V V V °C S M6452AM/BM DC Characteristics (SM6452AM) AVDD = 7 to 13V, DVDD = 2.7 to 5.5V, VSS = 0V, Ta = −40 to 85°C Rating P arameter Symbol Condition min ID D D 1 ID D D 2 AVDD1, AVDD2 current consumption M D T, MCK, MLEN, RSTN HIGH-level input voltage M D T, MCK, MLEN, RSTN LOW -level input voltage RSTN, MLEN input current M D T, MCK input leakage current RSTN, MLEN input leakage current ID D A V IH V IL II L1 IL L 1 IL H 1 IL H 2 D ata transfer stopped, MDT = MCK = M L E N = R S T N = DV D D = 5 V D ata transfer in progress, DV D D = 5 V – typ TBD max TBD µA Unit D VDD current consumption ina ry – TBD TBD – TBD – TBD – 0 .7DV D D – – 0.3DV D D TBD V IN = 0V V IN = 0V – TBD – – TBD V I N = DV D D V I N = DV D D – – – – TBD TBD Rating typ TBD TBD TBD – – TBD TBD – – – – Condition min – – – 0 .7DV D D – – – – – – TBD max TBD TBD TBD – 0.3DV D D TBD TBD TBD TBD TBD TBD D ata transfer stopped, S D A = SCL = RSTN = DV D D D ata transfer in progress V IN = 0V V IN = 0V V I N = DV D D V I N = DV D D V I N = 1 0V A CK signal output, 3mA input current mA mA V V µA µA µA µA DC Characteristics (SM6452BM) AVDD = 7 to 13V, DVDD = 2.7 to 5.5V, VSS = 0V, Ta = −40 to 85°C P arameter Symbol lim ID D D 1 ID D D 2 ID D A V IH V IL II L1 II L2 IL H 1 IL H 2 IL H 3 VOL Unit µA mA mA V V µA µA µA µA µA V D VDD current consumption AVDD1, AVDD2 current consumption S D A, SCL, RSTN HIGH-level input voltage S D A, SCL, RSTN LOW -level input voltage RSTN input current pre RSTN input leakage current S D A, SCL input leakage current S D A L OW -level output voltage S D A, SCL input current NIPPON PRECISION CIRCUITS—5 S M6452AM/BM AC Digital Characteristics (SM6452AM) AVDD = 7 to 13V, DVDD = 2.7 to 5.5V, VSS = 0V, Ta = −40 to 85°C Serial inputs (MDT, MCK, MLEN) Rating P arameter M C K , M L E N r ise time MCK, MLEN fall time MDT setup time MDT hold time MLEN setup time MLEN hold time M L E N L OW -level pulsewidth MLEN HIGH-level pulsewidth Symbol min – – typ – – max 100 100 – – – – – – tr tf Unit ns ns MDT tMDS MCK MLEN lim tMCS tMEWL P arameter Symbol tR S T N Reset input (RSTN) pre R S T N L OW -level pulsewidth ina ry tM D S 50 50 50 50 50 50 – – – – – – tM D H tM C S tM C H tM E W L tM E W H ns ns ns ns ns ns 0.5DV DD tMDH 0.5DV DD tMCH 0.5DV DD tMEWH Rating Unit min 1 00 typ – max – ns NIPPON PRECISION CIRCUITS—6 S M6452AM/BM AC Digital Characteristics (SM6452BM) AVDD = 7 to 13V, DVDD = 2.7 to 5.5V, VSS = 0V, Ta = −40 to 85°C Serial inputs (SDA, SCL) Rating P arameter SCL hold time (start) SCL setup time (stop) S D A hold time S D A setup time SCL clock HIGH-level pulsewidth SCL clock LOW -level pulsewidth SCL rise time SCL fall time Symbol min 4.0 4.0 5.0 typ – – – max – – – tH D : S TA tS U : S TA Unit µs µs µs ns SDA tHD:STA SCL tSU:DAT Reset input (RSTN) lim tHIGH P arameter Symbol tR S T N R S T N L OW -level pulsewidth pre NIPPON PRECISION CIRCUITS—7 ina ry tH D : DAT tS U : DAT tH I G H tL O W tr tf 250 4.0 4.7 – – – – – – – – – – 1000 300 µs µs ns ns tHD:DAT tHD:STO tLOW Rating Unit min 100 typ – max – ns SM6452AM/BM AC Analog Characteristics AVDD = 9V, DVDD = 5V, (TBD)Vrms analog input amplitude, 1kHz analog input frequency, 100kΩ output load resistance, Ta = 25°C, AC-coupled inputs Analog inputs (AIN1 to AIN6) Rating Reference input amplitude Input resistance 1 V AI R IN VCLP Input clipping voltage 1. R IN varies with the ATT setting. See figure 11 in the Analog Performance Characteristics section. Analog outputs (AOUT1 to AOUT6) P arameter Residual noise voltage Signal-to-noise ratio Total harmonic distortion + noise Gain control range Step size Symbol VNS SNR THD + N RCNT Step lim ERR1 ERR2 AT 0 AT 1 AT 2 +16 to −6 0 d B −61 to −7 9 d B ATT = 16dB ATT = 0dB ATT = −2 0 d B ATT = −4 0 d B ATT = −6 0 d B ATT = −7 9 d B ATT = Mute AT 3 AT 4 AT 5 Mute CT ATT = 0dB ATT = 0dB, f = 200kHz 0Vr ms input signal ATT = 0dB, THD + N = 1% FR NJ voltage 2 RML Symbol VREF Condition Attenuation error (1 to 20kHz) Absolute attenuation (1kHz) pre Channel crosstalk 1 Frequency response Quiescent output zip noise Minimum driver load resistance Mute attenuation (1kHz) 1. Leakage to other channels when analog input is applied to one channel only. 2. Noise occurring when the ATT setting is changed (peak to peak) Reference voltage (VREF1, VREF2) P arameter Reference voltage output ina ry min – typ max – TBD ATT = 0dB TBD – TBD TBD – THD + N = 1%, ATT = 0dB TBD Rating typ Condition min – max Input signal: 0Vrm s , A - weight filter, 0dBr = (TBD)Vr m s , ATT = 0dB TBD TBD – TBD – TBD ATT = 0dB, 20kHz lowpass filter TBD – TBD +16 1.5 TBD TBD – – – – – – – – – TBD – −7 9 0.8 TBD TBD – – – – – – TBD TBD – – TBD 1.0 – – TBD TBD TBD TBD TBD TBD TBD TBD TBD – TBD Rating min 0.45AV D D typ 0.5AV D D max 0.55AV D D P arameter Symbol Condition Unit Vr m s Ω Vr m s Unit µVr m s dBr % dB dB dB dB dB dB dB dB dB dB dB dB dB mVp-p Ω Unit V NIPPON PRECISION CIRCUITS—8 SM6452AM/BM MEASUREMENT CIRCUIT pre NIPPON PRECISION CIRCUITS—9 lim ina ry TBD SM6452AM/BM MICROCONTROLLER INTERFACE SM6452AM Transfer format The SM6452AM uses a 3-wire serial interface to select channels and set attenuation levels. The transfer format is shown in figure 1. MDT D15 D14 D13 D12 D11 D10 D9 MCK MLEN Figure 1. Microcontroller input data timing Data description (D15 to D0) In the following description, LOW implies VIL level and HIGH implies VIH level. s s pre s D15, D14 Don’t care. D13 to D8 Chip address bits. Each of 6 channels is set when the corresponding bit is set HIGH. • D13: channel 1 • D12: channel 2 • D11: channel 3 • D10: channel 4 • D9: channel 5 • D8: channel 6 D7 to D0 Gain/attenuation set bits. The gain/attenuation setting for ATT register settings are shown in table 1. lim Data is shifted into the internal shift register on the rising edge of MCK, and the attenuation value is loaded and changed on the rising edge of MLEN. Accordingly, data on MDT should be changed on the falling edge of MCK. The dotted lines for MCK and MLEN also indicate valid timing. ina ry Attenuation Data 6 Attenuation Data 5 Attenuation Data 4 Attenuation Data 3 Attenuation Data 2 Attenuation Data 1 D8 D7 D6 D5 D4 D3 D2 D1 NIPPON PRECISION CIRCUITS—10 Attenuation Data 0 Channel 2 Channel3 Channel4 Channel5 Channel1 Channel6 Don't Care Don't Care Don't Care D0 SM6452AM/BM SM6452BM Transfer format The SM6452BM uses Philips I2C interface to select channels and set attenuation levels. For details of the I2C bus, refer to Philips “I2C Bus Specification Description”. Here, we describe only the aspects for controlling the SM6452BM. The transfer format is shown in figure 2. AD6 to AD0 = 1000000 First Byte (Slave address) SDA AD6 AD0 L ACK SCL Start condition Figure 2. Microcontroller input data timing As shown in figure 2, the data format comprises 3 bytes. After the SM6452BM receives 8 bits for each byte, an acknowledge signal (ACK) on SDA goes LOW to confirm the data transfer. Data format s s Data description (D15 to D0) s s pre s D15, D14 Don’t care. D13 to D8 Chip address bits. Each of 6 channels is set when the corresponding bit is set HIGH. • D13: channel 1 • D12: channel 2 • D11: channel 3 • D10: channel 4 • D9: channel 5 • D8: channel 6 D7 to D0 Gain/attenuation set bits. The gain/attenuation setting for ATT register settings are shown in table 1. lim Byte 1 (slave address) The first byte is slave address. The SM6452BM address (AD6 to AD0) is 1000000. The 8th bit indicates information write and should be set LOW. Bytes 2 and 3 Bytes 2 and 3 are the channel select and gain/attenuation level set bits. Byte 2 represents data bits D15 to D8, and byte 3 represents data bits D7 to D0. ina ry Second Byte Third Byte D15 D8 ACK D7 D0 ACK Stop condition NIPPON PRECISION CIRCUITS—11 SM6452AM/BM Attenuation settings Table 1. ATT settings Attenuation 1 16dB 15dB ↓ 1dB 0dB −1 d B ↓ −1 5 d B −1 6 d B −1 7 d B ↓ −7 8 d B −7 9 d B Mute Mute AT T H 00 01 ↓ 0F 10 11 ↓ 1F 20 21 ↓ 5E 5F 6× 7× D7 × × ↓ × × × ↓ × × × ↓ × × × × D6 LOW LOW ↓ D5 LOW LOW ↓ D4 LOW LOW ↓ D3 LOW LOW ↓ D2 LOW LOW ↓ D1 LOW LOW ↓ D0 LOW HIGH ↓ LOW LOW LOW ↓ LOW LOW LOW ↓ HIGH HIGH HIGH HIGH 1. Outputs are muted after system reset. The ATT hex code is determined by D6 to D0 only. pre NIPPON PRECISION CIRCUITS—12 lim ina ry LOW LOW LOW ↓ LOW HIGH LOW LOW ↓ HIGH LOW LOW ↓ HIGH LOW LOW ↓ HIGH HIGH ↓ LOW HIGH LOW LOW ↓ HIGH LOW LOW ↓ HIGH LOW LOW ↓ HIGH LOW LOW ↓ HIGH HIGH ↓ LOW LOW HIGH HIGH LOW HIGH HIGH × × HIGH HIGH × × HIGH HIGH × × HIGH HIGH HIGH HIGH LOW HIGH ↓ HIGH LOW HIGH ↓ LOW HIGH × × SM6452AM/BM ANALOG PERFORMANCE CHARACTERISTICS AVDD = 9V, DVDD = 5V, 100kΩ output load resistance, Ta = 25°C TBD Figure 3. THD + N vs. input amplitude Figure 5. Gain/attenuation error lim TBD TBD pre Figure 7. Frequency response ina ry TBD Figure 4. THD + N vs. frequency TBD Figure 6. Residual noise vs. ATT TBD Figure 8. Crosstalk frequency response NIPPON PRECISION CIRCUITS—13 SM6452AM/BM Figure 9. FFT spectrum TBD Figure 11. Input resistance vs. ATT pre TBD Figure 13. Current consumption vs. temperature lim ina ry Figure 10. THD + N vs. load resistance TBD TBD TBD Figure 12. Current consumption vs. supply voltage NIPPON PRECISION CIRCUITS—14 SM6452AM/BM TYPICAL APPLICATIONS pre NIPPON PRECISION CIRCUITS—15 lim ina ry TBD SM6452AM/BM NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility fo r the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter, including compliance with expor t controls on the distribution or dissemination of the products. Customers shall not expor t, directly or indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies. NIPPON PRECISION CIRCUITS INC. 4-3, Fukuzumi 2-chome Koto-ku, Tokyo 135-8430, Japan Telephone: 03-3642-6661 Facsimile: 03-3642-6698 NP9917BE 2000.1 pre NIPPON PRECISION CIRCUITS INC. lim NIPPON PRECISION CIRCUITS—16 ina ry