SM8701

SM8701BM NIPPON PRECISION CIRCUITS INC. DVD Player Clock Generator OVERVIEW The SM8701BM is a 27 MHz master clock, 5-system output clock generator for DVD players. It has 2 built-in PLLs that, with the addition of a single crystal oscillator element, can generate 256fs, 384fs and 768fs clocks plus independent fixed-frequency 27 MHz and 33.8688 MHz output clocks. Supported sampling frequencies (fs) include the standard 32, 44.1 or 48 kHz, or double-frequency 64, 88.2 or 96 kHz. FEATURES s PINOUT (Top View) s s s s s s 27 MHz master clock (internal PLL reference clock) Generated clocks • 27 MHz output • 33.8688 MHz output • 256fs output • 384fs output • 768fs output Sampling frequency fs • 32/64 kHz • 44.1/88.2 kHz • 48/96 kHz Low jitter output 3-wire serial or parallel control Supply voltage: VDD = VDDP = 5.0V VDDO = VDD3 = 3.3V 20-pin SSOP package MLEN/R2 P/S VDD GND XTO XTI GNDP VDDP VDD3 MO 1 20 10 11 MCK/R1 MDT/R0 RSTN SO3 VDDO GNDO SO2 SO4 SO1 MON SM8 7 0 1B APPLICATIONS s PACKAGE DIMENSIONS (Unit: mm) DVD players ORDERING INFORMATION D e vice SM8701BM P ackag e 20-pin SSOP 5.30 0.05 7.90 0.20 1.30 0.10 0.62TYP 7.40MAX 7.20 0.05 0.20 0.05 2.10MAX 1.80 0.10 0.10 0.10 0 to 8 0.65 0.68 0.12 0.10 0.30 0.10 0.13 M NIPPON PRECISION CIRCUITS—1 0.6 0.15 S M8701BM BLOCK DIAGRAM Divider0 XTI Oscillator XTO Phase Comparator0 Charge Pump0 LPF0 VCO0 SO4 Divider0 P/S MLEN/R2 MDT/R0 MCK/R1 Divider1 Phase Comparator1 SO3 Divider SO2 External Interface SO1 Charge Pump1 LPF1 VCO1 Divider1 MO MON RSTN Reset Circuits NIPPON PRECISION CIRCUITS—2 S M8701BM PIN DESCRIPTION Number 1 Name MLEN/R2 I/O Ip 1 Control signal input. In serial mode: latch enable signal In parallel mode: sampling rate select signal M ode select signal. L O W : serial mode, HIGH: parallel mode 5 V supply (Digital block) Ground (Digital block) Reference signal crystal oscillator element connection Reference signal crystal oscillator element connection or external clock input Ground (PLL block) 5 V supply (PLL block) 3.3 V supply (output buffer) 27 MHz fixed-frequency output 27 MHz fixed-frequency output (inverted) 33.8688 MHz fixed-frequency output 768fs output 256fs output Ground (output buffer) 3.3 V supply (output buffer) 384fs output L O W -level reset input C ontrol signal input. In serial mode: control data input signal In parallel mode: sampling frequency select signal C ontrol signal input. In serial mode: clock signal In parallel mode: sampling frequency select signal Description 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 P/S VDD GND X TO XTI GNDP VDDP VDD3 MO MON SO1 SO4 SO2 GNDO VDDO SO3 RSTN MDT/R0 Ip 1 – – O I – – – O O O O O – – O Ip 2 Ip 1 20 MCK/R1 Ip 1 1 . Schmitt trigger input with pull-down resistor 2 . Schmitt trigger input with pull-up resistor NIPPON PRECISION CIRCUITS—3 S M8701BM SPECIFICATIONS Absolute Maximum Ratings P arameter S upply voltage range Symbol V DD , V DDP , V DDO , V DD3 VDD – VDDP , VDDO – VDD3 , G N D – G N D P, GND – G N D O, GNDP – G N D O V IN VOUT PD T s tg D igital inputs D igital outputs Condition Rating −0 .3 to 6.5 Unit V Supply voltage deviation ±0.1 V Input voltage range Output voltage range Pow er dissipation Storage temperature range −0 .3 to V D D + 0 .3 −0 .3 to V D D O , V D D 3 + 0 .3 3 00 −5 5 to 125 V V mW °C Recommended Operating Conditions P arameter S upply voltage ranges Operating temperature range Symbol V DDO , V DD3 V DD , V D D P T o pr Condition Rating 2 .7 to 3.6 4 .5 to 5.5 −4 0 to 85 Unit V V °C NIPPON PRECISION CIRCUITS—4 S M8701BM DC Electrical Characteristics External clock, Ta = −40 to 85 °C, VDD = VDDP = 4.5 to 5.5 V, VDDO = VDD3 = 2.7 to 3.6 V unless otherwise stated Rating P arameter Symbol Condition min A ll supplies. V D D = V D D P = 5 .0V, V D D O = V D D 3 = 3 .3 V, T a = 2 5 °C , fs = 48 kHz, using XTI external 27 M H z master clock, no load on clock outputs (MO, M O N , SO1 to SO4) P /S, MLEN/R2, MCK/R1, MDT/R0, RSTN P /S, MLEN/R2, MCK/R1, MDT/R0, RSTN X TI X TI V IN = V D D V IN = 0 V V IN = V D D V IN = 0 V X TI, V I N = V D D X TI, V I N = 0 V A ll outputs. IO H = −2 m A A ll outputs. IO L = 4 m A typ max Unit C urrent consumption ID D – 32 45 mA HIGH-level input voltage L O W -level input voltage HIGH-level input voltage L O W -level input voltage HIGH-level input L O W -level input HIGH-level input L O W -level input current 1 current 1 current 2 current 2 V I H1 V I L1 V I H2 V I L2 II H1 II L1 II H2 II L2 II H3 II L3 VOH VOL 2.0 – 0.7 × V D D – – – – – – – V D D O − 0 .4 – – – – – – – – – – – – – – 0.8 – 0.3 × V D D 150 −1 1 −1 50 40 −4 0 – 0.4 V V V V µA µA µA µA µA µA V V HIGH-level input current L O W -level input current HIGH-level output voltage L O W -level output voltage 1 . P/S, MLEN/R2, MCK/R1, MDT/R0. Schmitt trigger input, internal pull-down. 2 . R S T N . Schmitt trigger input, internal pull-up. NIPPON PRECISION CIRCUITS—5 S M8701BM PLL AC Electrical Characteristics External clock, Ta = −40 to 85 °C, VDD = VDDP = 4.5 to 5.5 V, VDDO = VDD3 = 2.7 to 3.6 V unless otherwise stated Rating P arameter X TI external input clock frequency Output clock rise time Output clock fall time M O , M O N output clock jitter1 SO1, SO2 (Standard), SO3, SO4 output clock jitter1 SO2 (Double) output clock jitter1 M O , M O N output clock duty 1 SO1, SO2 (Standard), SO3, SO4 output clock duty 1 SO2 (Double) output clock duty 1 Settling time Pow er-up time 2 R S T N external reset LOW -level pulsewidth tS tP tR S T L DUTY Cr ystal oscillator element, C L = 20 p F C L = 20 p F C L = 20 p F A ll outputs A ll outputs 1 .4 V to 1.4 V JITTER Standard tolerance Cr ystal oscillator element Symbol fM tR tF Condition min D U T Y: 50 ± 5% A ll outputs, 0.2 to 0.8V D D O or V D D 3 , CL = 2 0 p F A ll outputs, 0.8 to 0.2V D D O or V D D 3 , CL = 2 0 p F – – – – – – 45 40 23.3 – – 100 typ 27.0000 2.5 2.5 150 150 450 50 50 33.3 – – – max – – – – – – 55 60 43.3 40 50 – MHz ns ns ps ps ps % % % ms ms ns Unit 1 . 1.4V to 1.4V. Ta = 2 0 °C . The characteristics of output clock jitter and output clock duty depends on crystal oscillator. N P C ’s standard crystal oscillator: R = 10.5 Ω, L = 5 .38 mH, Ca = 6.74 fF, Cb = 1.85 p F measurement apparatus: HP4195 Load capacitance: C1 = 7 p F, C2 = 11 p F Cb L Ca R 2 . Time from OFF condition to stable frequency output. NIPPON PRECISION CIRCUITS—6 S M8701BM Serial Interface AC Characteristics External clock, Ta = −40 to 85 °C, VDD = VDDP = 4.5 to 5.5 V, VDDO = VDD3 = 2.7 to 3.6 V unless otherwise stated Rating P arameter M CK HIGH-level pulsewidth M C K L O W -level pulsewidth MCK pulse cycle time MDT setup time MDT hold time MLEN setup MLEN hold time 1 Symbol tM C W H tM C W L tM C Y tM D S tM D H tM L S tM L H tM H H tM L L Condition min 40 40 1 00 40 40 40 40 2 00 16 × tM C Y typ – – – – – – – – – max – – – – – – – – – ns ns ns ns ns ns ns ns ns Unit time 2 MLEN HIGH-level pulsewidth M L E N L OW -level pulsewidth 1 . Time from the MLEN falling edge to the next MCK rising edge. If the MCK clock stops after the LSB, the MLEN rise timing is optional. 2 . Time from MCK rising edge corresponding to the LSB to the MLEN rising edge. tMCWH tMCWL MCK tMLH tMLS 1.4V tMCY MDT MSB LSB 1.4V tMLS MLEN tMDS tMDH tMLL tMHH 1.4V NIPPON PRECISION CIRCUITS—7 S M8701BM FUNCTIONAL DESCRIPTION 27 MHz Master Clock The 27 MHz master clock is generated either by connecting a crystal oscillator element between XTI (pin 6) and XTO (pin 5), as shown in figure 1, or by connecting an external 27 MHz clock to XTI, as shown in figure 2. Input 27MHz master clock on XTI when using an external clock. Crystal oscillator element must be fundamental. C2 XTO (Pin5) Oscillator Internal Circuits C1 C1, C2 = 5 to 33pF XTI (Pin6) MO (Pin10) MON (Pin11) SM8701BM Figure 1. Crystal oscillator connection Open XTO (Pin5) Oscillator Internal Circuits External Clock XTI (Pin6) MO (Pin10) MON (Pin11) SM8701BM Figure 2. External clock input NIPPON PRECISION CIRCUITS—8 S M8701BM Sampling Frequency and Output Clock Frequency The SM8701BM generates several output clocks from the 27 MHz master clock, with frequencies of 256fs (SO2), 384fs (SO3) and 768fs (SO4), where fs is the sampling frequency selected by external conTable 1. Sampling frequency and output clock frequency Sampling rate Sampling frequency fs 32 kHz Standard 44.1 kHz 48 kHz 64 kHz D o u ble 88.2 kHz 96 kHz Output clock frequency (MHz) SO1 33.8688 33.8688 33.8688 33.8688 33.8688 33.8688 SO2 8.192 11.2896 12.288 16.384 22.5792 24.576 SO3 12.288 16.9344 18.432 24.576 33.8688 36.864 SO4 24.576 33.8688 36.864 24.576 33.8688 36.864 trol inputs. SO1 outputs 33.8688 MHz clock. The supported sampling frequencies and the output clock frequencies are shown in table 1. Reset The SM8701BM supports an external reset using RSTN (pin 18). At reset, the mode register takes its default value, and the output clocks have default frequencies. When RSTN goes HIGH, an internal reset continues for a period of 1024 cycles of the 27 MHz master clock. The timing is shown in figure 3. RSTN Reset Internal Reset 1 2 3 1024 Master Clock 1024 Master Clock Figure 3. External reset timing NIPPON PRECISION CIRCUITS—9 S M8701BM Operation Control The SM8701BM functions are controlled by inputs MLEN/R2 (pin 1), MDT/R0 (pin 19) and MCK/R1 (pin 20). The operating mode is selected by input P/S (pin 2)—serial control when P/S is LOW, and parallel control when P/S is HIGH. Table 2 shows the relationship between functions and mode. Table 2. Control functions Controllable Function Serial Sampling frequency group: 48/44.1/32 kHz Sampling rate: standard/double Clock output: enable/disable Yes Yes Yes P arallel Yes Yes No Serial control (P/S = LOW) When P/S is LOW, the control interface is serial control mode. The serial control data is set by 16-bit MDT data in sync with the MCK clock and the MLEN enable signal clock at the serial control mode. The format is shown in figure 4. MCK MDT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 MLEN Figure 4. Serial control format The 16-bit mode register (MREG) is shown in figure 5, and the name and function of each bit is described in tables 3 to 5. In serial control mode, mode register bits D15 to D10 must be set to 011100. D3 is fixed as LOW. MREG 0 D15 1 D14 1 D13 1 D12 0 D11 0 D10 CE6 D9 CE5 D8 CE4 D7 CE3 D6 CE2 D5 CE1 D4 RSV D3 R2 D2 R1 D1 R0 D0 Note: RSV is fixed as LOW . Figure 5. Mode register Table 3. Mode register control bit functions Bit D9 D8 D7 D6 D5 D4 D3 D2/D1/D0 Name CE6 CE5 CE4 CE3 CE2 CE1 RSV R2/R1/R0 Function M O N output enable/disable MO output enable/disable SO4 output enable/disable SO3 output enable/disable SO2 output enable/disable SO1 output enable/disable Fixed as LOW Sampling frequency select Table 4. CE6 to CE1 clock output control setting CE6 to CE1 LOW HIGH Clock output Disable (LOW -level output) E n a ble (default) NIPPON PRECISION CIRCUITS—10 S M8701BM Table 5. Sampling frequency select (R2, R1, R0) R2 LOW LOW LOW LOW HIGH HIGH HIGH HIGH R1 LOW LOW HIGH HIGH LOW LOW HIGH HIGH R0 LOW HIGH LOW HIGH LOW HIGH LOW HIGH D o u ble D o u ble D o u ble Sampling rate Standard Standard Standard Sampling frequency gro u p 48 kHz 44.1 kHz 32 kHz Prohibited (test mode) 48 kHz 44.1 kHz 32 kHz Prohibited (test mode) 96 kHz 88.2 kHz 64 kHz Sampling frequency 48 kHz (default) 44.1 kHz 32 kHz When the sampling frequency is changed, a settling time of 40 ms (max) is required to make the output frequency stable. The SO2 to SO4 output response when the frequency is changed is shown in figure 6. SO1 fixed on 33.8688 MHz. MLEN tS SO2 to 4 Clock Transition Region SO1 33.8688MHz Figure 6. System clock transient timing NIPPON PRECISION CIRCUITS—11 S M8701BM Parallel control (P/S = HIGH) When P/S is HIGH, the control interface is parallel control mode. The parallel control pins R2 (pin 1), Table 6. Sampling frequency select (R2, R1, R0) R2 LOW LOW LOW LOW HIGH HIGH HIGH HIGH R1 LOW LOW HIGH HIGH LOW LOW HIGH HIGH R0 LOW HIGH LOW HIGH LOW HIGH LOW HIGH D o u ble D o u ble D o u ble Sampling rate Standard Standard Standard Sampling frequency gro u p 48 kHz 44.1 kHz 32 kHz Prohibited (test mode) 48 kHz 44.1 kHz 32 kHz Prohibited (test mode) 96 kHz 88.2 kHz 64 kHz Sampling frequency 48 kHz (default) 44.1 kHz 32 kHz R1 (pin 20) and R0 (pin 19) and functions are shown in table 6. Note that in parallel control mode, clock output enable/disable controls are not available. Also note that the reset function does not affect the sampling frequency group or sampling rate select settings (it is determined by R2, R1, R0 condition). NIPPON PRECISION CIRCUITS—12 S M8701BM TYPICAL APPLICATION CPU +3.3V +5V MLEN/R2 P/S VDD C3 MCK/R1 MDT/R0 RSTN SO3 VDDO C6 GND XTO C1 C2 X'tal 384fs 256fs 768fs XTI GNDP C4 GNDO SO2 SO4 SO1 MON VDDP VDD3 C5 33.8688MHz MO 27MHz(Inverted) 27MHz SM8701BM s s s s Connect the decoupling capacitors (approximately 0.1µF and 1000pF) in parallel, as close to power supply pins as possible. In order to minimize noise, it is useful to make ground as solid pattern. Master clock stability affects the other outputs stability. In the usage of crystal oscillator, load capacitor and crystal oscillator should be placed as close to the SM8701BM as possible, and wired shortly. Select crystal oscillators and load capacitance carefully, depending on the condition, as those combination will have influence on the frequency accuracy(C1, C2). Supply pattern including decoupling capacitors needs careful attention to make the IC’s performance better, since the SM8701BM outputs several high frequency clocks. Pattern capacitance from output pins should not to be large for prevention of the noise. Connecting output pins to buffers is useful if it is necessary. s Power supply and ground pins. • VDD :5V Power supply for digital block (CPU I/F*, XT1, XT2). • GND : Ground for digital block (CPU I/F*, XT1, XT2, output block except SO3). • VDDP :5V Power supply for PLL block. • GNDP : Ground for PLL block. • VDDO :3.3V Power supply for SO3. • GNDO : Ground for SO3. • VDD3 :3.3V Power supply for output block (except SO3). *: CPU I/F: MDT/R0, MCK/R1, MLEN/R2, RSTN, P/S NIPPON PRECISION CIRCUITS—13 S M8701BM NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility fo r the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter, including compliance with expor t controls on the distribution or dissemination of the products. Customers shall not expor t, directly or indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies. NIPPON PRECISION CIRCUITS INC. 4-3, Fukuzumi 2-chome Koto-ku, Tokyo 135-8430, Japan Telephone: 03-3642-6661 Facsimile: 03-3642-6698 NIPPON PRECISION CIRCUITS INC. NC9822BE 2000.1 NIPPON PRECISION CIRCUITS—14