363D

LM363 Precision Instrumentation Amplifier April 1991 LM363 Precision Instrumentation Amplifier General Description The LM363 is a monolithic true instrumentation amplifier It requires no external parts for fixed gains of 10 100 and 1000 High precision is attained by on-chip trimming of offset voltage and gain A super-beta bipolar input stage gives very low input bias current and voltage noise extremely low offset voltage drift and high common-mode rejection ratio A two-stage amplifier design yields an open loop gain of 10 000 000 and a gain bandwidth product of 30 MHz yet remains stable for all closed loop gains The LM363 operates with supply voltages from g 5V to g 18V with only 1 5 mA current drain The LM363’s low voltage noise low offset voltage and offset voltage drift make it ideal for amplifying low-level lowimpedance transducers At the same time its low bias current and high input impedance (both common-mode and differential) provide excellent performance at high impedance levels These features along with its ultra-high common-mode rejection allow the LM363 to be used in the most demanding instrumentation amplifier applications replacing expensive hybrid module or multi-chip designs Because the LM363 is internally trimmed precision external resistors and their associated errors are eliminated The 16-pin dual-in-line package provides pin-strappable gains of 10 100 or 1000 Its twin differential shield drivers eliminate bandwidth loss due to cable capacitance Compensation pins allow overcompensation to reduce bandwidth and output noise or to provide greater stability with capacitive loads Separate output force sense and reference pins permit gains between 10 and 10 000 to be programmed using external resistors On the 8-pin metal can package gain is internally set at 10 100 or 500 but may be increased with external resistors The shield driver and offset adjust pins are omitted on the 8-pin versions The LM363 is rated for 0 C to 70 C Features Y Y Y Y Y Y Y Y Offset and gain pretrimmed 12 nV 0Hz input noise (G e 500 1000) 130 dB CMRR typical (G e 500 1000) 2 nA bias current typical No external parts required Dual shield drivers Can be used as a high performance op amp Low supply current (1 5 mA typ) Typical Connections 8-Pin Package 16-Pin Package G e 10 2 3 4 open G e 100 3–4 shorted G e 1000 2–4 shorted TL H 5609 – 33 TL H 5609 – 1 Connection Diagrams Metal Can Package 16-Pin Dual-In-Line Package Order Number LM363H-10 LM363H-100 or LM363H-500 See NS Package Number H08C C1995 National Semiconductor Corporation TL H 5609 TL H 5609 – 2 Order Number 363D See NS Package Number D16C RRD-B30M115 Printed in U S A Absolute Maximum Ratings (Note 5) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage Differential Input Voltage Input Current g 18V g 10V g 20 mA Input Voltage Reference and Sense Voltage Lead Temp (Soldering 10 sec ) ESD rating to be determined Equal to Supply Voltage g 25V 300 C LM363 Electrical Characteristics (Notes 1 and 2) LM363 Parameter Conditions Typ Tested Limit (Note 3) Design Limit (Note 4) Units FIXED GAIN (8-PIN) Input Offset Voltage G e 500 G e 100 G e 10 G e 500 G e 100 G e 10 G e 500 G e 100 G e 10 30 50 05 1 2 20 01 0 07 0 05 08 07 06 150 250 25 400 700 6 4 8 75 09 08 07 mV mV mV mV C mV C mV C % % % Input Offset Voltage Drift Gain Error ( g 10V Swing 2 kX Load) PROGRAMMABLE GAIN (16-PIN) Input Offset Voltage G e 1000 G e 100 G e 10 G e 1000 G e 100 G e 10 G e 1000 G e 100 G e 10 50 100 1 1 2 10 20 01 06 250 450 35 500 900 8 5 10 100 mV mV mV mV C mV C mV C % % % Input Offset Voltage Drift Gain Error ( g 10V Swing 2 kX Load) FIXED GAIN AND PROGRAMMABLE Gain Temperature Coefficient 30 07 20 35 08 23 G e 1000 G e 500 G e 100 10 G e 10 100 G e 500 1000 40 20 10 0 01 0 01 0 03 0 05 0 04 0 06 ppm C ppm C ppm C % % Gain Non-Linearity ( g 10V Swing 2 kX Load) 2 LM363 Electrical Characteristics (Continued) (Notes 1 and 2) LM363 Parameter Conditions Typ 130 120 105 130 120 100 120 106 86 2 1 100 G e 1000 500 G e 100 G e 10 b 11V s VCM s 13V Tested Limit (Note 3) 114 94 90 110 100 85 100 85 70 10 3 8 Design Limit (Note 4) 104 84 80 100 95 78 90 75 60 20 5 Units Common-Mode Rejection Ratio (b10VsVCMs10V) Positive Supply Rejection Ratio (5V to 15V) Negative Supply Rejection Ratio (b5V to b15V) Input Bias Current Input Offset Current Common-Mode Input Resistance Differential Mode Input Resistance Input Offset Current Change Reference and Sense Resistance Open Loop Gain Supply Current G e 1000 500 G e 100 G e 10 G e 1000 500 G e 100 G e 10 G e 1000 500 G e 100 G e 10 dB dB dB dB dB dB dB dB dB nA nA GX GX GX GX 02 2 20 20 50 100 30 80 10 12 16 1 24 28 30 34 300 27 83 pa V kX kX kX V mV mA mA Min Max GCL e 1000 500 Positive Negative Note 1 These conditions apply unless otherwise noted V a e 15V Vb eb 15V VCM e 0V RL e 2 kX reference pin grounded sense pin connected to output and Tj e 25 C Note 2 Boldface limits are guaranteed over full temperature range Operating ambient temperature range is 0 C to 70 C for the LM363 Note 3 Guaranteed and 100% production tested Note 4 Guaranteed but not 100% tested These limits are not used in determining outgoing quality levels Note 5 Maximum rated junction temperature is 100 C for the LM363 Thermal resistance junction to ambient is 150 C W for the TO-99(H) package and 100 C W for the ceramic DIP (D) 3 Typical Performance Characteristics TA e 25 C Parameter Input Voltage Noise rms 1 kHz Input Voltage Noise (Note 6) Input Current Noise rms 1 kHz Input Current Noise (Note 6) Bandwidth Slew Rate Settling Time 0 1% of 10V Offset Voltage Warm-Up Drift (Note 7) Offset Voltage Stability (Note 8) Gain Stability (Note 8) Note 6 Measured for 100 seconds in a 0 01 Hz to 10 Hz bandwidth Note 7 Measured for 5 minutes in still air V a e 15V Vb eb 15V Warm-up drift is proportionally reduced at lower supply voltages Fixed Gain and Programmable 1000 500 12 04 02 40 30 1 70 5 5 0 01 100 18 15 02 40 100 0 36 25 15 10 0 005 10 90 10 02 40 200 0 24 20 50 100 0 05 Units nV SHz SHz mVp-p pA pAp-p kHz V ms ms mV mV % Common-Mode Input Voltage Limit Supply Current vs Supply Voltage Input Bias Current vs Temperature Output Swing Referred to Supplies Supply Current vs Temperature Input Offset Current vs Temperature TL H 5609 – 3 4 Typical Performance Characteristics Output Current Limit (Continued) Input Current Noise Input Noise Voltage Input Current vs Voltage Overdrive Gain Non-Linearity Gain Error vs Frequency Trimmed to zero at 100 Hz Gain Error vs Frequency Positive Power Supply Rejection Negative Power Supply Rejection Trimmed to zero at 100 Hz Negative Power Supply Rejection Negative Power Supply Rejection Negative Power Supply Rejection TL H 5609 – 4 5 Typical Performance Characteristics CMRR with Balanced Source Resistance (Continued) CMRR with Balanced Source Resistance CMRR with Balanced Source Resistance CMRR with Unbalanced Source Resistance CMRR with Unbalanced Source Resistance CMRR with Unbalanced Source Resistance CMRR with Balanced Source Resistance CMRR with Balanced Source Resistance CMRR with Balanced Source Resistance CMRR with Unbalanced Source Resistance CMRR with Unbalanced Source Resistance CMRR with Unbalanced Source Resistance TL H 5609 – 5 6 Typical Performance Characteristics (Continued) Shield Driver Bias Voltage Shield Driver Loading Error Shield Driver Loading Error Shield Driver Loading Error Small Signal Transient Response Small Signal Transient Response Small Signal Transient Response Small Signal Transient Response Large Signal Transient Response Large Signal Transient Response Large Signal Transient Response Large Signal Transient Response TL H 5609 – 6 7 Simplified Schematic (pin numbers in parentheses are for 8-pin package) TL H 5609 – 7 Theory of Operation Referring to the Simplified Schematic it can be seen that the input voltage is applied across the bases of Q1 and Q2 and appears between their emitters If RE1-2 is the resistance across these emitters a differential current equal to VIN RE1-2 flows from Q1’s emitter to Q2’s The second stage amplifier shown maintains Q1 and Q2 at equal collector currents by negative feedback to Q4 The emitter currents of Q3 and Q4 must therefore be unbalanced by an amount equal to the current flow across RE1-2 Defining RE3-4 e R5 a R6 the differential voltage across the emitters of Q4 to Q3 is equal to VIN c RE3-4 RE 1-2 This voltage divided by the attenuation factor R2 R4 e R3 a R4 R1 a R2 is equal to the output-to-reference voltage Hence the overall gain is given by VOUT R3 a R4 RE3-4 e c Ge VIN R4 RE1-2 8 Application Hints The LM363 was designed to be as simple to use as possible but several general precautions must be taken The differential inputs are directly coupled and need a return path to power supply common Worst-case bias currents are only 10 nA for the LM363 so the return impedance can be as high as 100 MX Ground drops between signal return and IC supply common should not be ignored While the LM363 has excellent common-mode rejection signals must remain within the proper common-mode range for this specification to apply Operating common-mode range is guaranteed from b10V to a 10V with g 15V supplies The high-gain (500 or 1000) versions have large gain-bandwidth products (15 MHz or 30 MHz) so board layout is fairly critical The differential input leads should be kept away from output force and sense leads especially at high impedances Only 1 pF from output to positive input at 100 kX source impedance can cause oscillations The gain adjust leads on the 16-pin package should be treated as inputs and kept away from the output wiring POWER SUPPLY The LM363 may be powered from split supplies from g 5V to g 18V (or single-ended supplies from 10V to 36V) Positive supply current is typically 1 2 mA independent of supply voltage The negative supply current is higher than the positive by the current drawn through the voltage dividers for the reference and sense inputs (typ 600 mA total) The LM363’s excellent PSRR often makes regulated supplies unnecessary Actually supply voltage can be as low as 7V total but PSRR is severely degraded so that well-regulated supplies are recommended below 10V total Split supplies need not be balanced output swing and input common-mode range will simply not be symmetrical with unbalanced supplies For example at a 12V and b5V supplies input common-mode range is typically a 10 5V to b2V and output swing is a 11V to b4V When using ultra-low offset versions best results are obtained at g 15V supplies For example the LM363-500’s offset voltage is guaranteed within 150 mV at g 15V at 25 C Running at g 5V results in a worst-case negative PSRR error of 10V (b15V to b5V) multiplied by 3 2X10b6 (110 dB) or 32 mV increasing the worst-case offset Positive PSRR results in another 10 mV worst-case change INPUTS The LM363 input circuitry is depicted in the Simplified Schematic The input stage is run relatively rich (50 mA) for low voltage noise and wide bandwidth super-beta transistors and bias-current cancellation (not shown) keep bias currents low Due to the bias-current cancellation circuitry bias current may be either polarity at either input While input current noise is high relative to bias current it is not significant until source resistance approaches 100 kX Input common-mode range is typically from 3V above V b to 1 5V below V a so that a large potential drop between the input signal and output reference can be accommodated However a return path for the input bias current must be provided the differential input stage is not isolated from the supplies Differential input swing in the linear region is equal to output swing divided by gain and typically ranges from 1 3V at G e 10 to 13 mV at G e 1000 Clamp diodes are provided to prevent zener breakdown and resulting degradation of the input transistors At large input overdrives these diodes conduct greatly increasing input currents This behavior is illustrated in the IIN vs VIN plot in the Typical Performance Characteristics (The graph is not symmetrical because at large input currents a portion of the current into the device flows out the V b terminal ) The input protection resistors allow a full 10V differential input voltage without degradation even at G e 1000 At input voltages more than one diode drop below Vb or two diode drops above V a input current increases rapidly Diode clamps to the supplies or external resistors to limit current to 20 mA will prevent damage to the device REFERENCE AND SENSE INPUTS The equivalent circuit is shown in the schematic diagram Limitations for correct operation are as follows Maximum differential swing between reference and sense pins is typically g 15V ( g 10V guaranteed) If this limit is exceeded the sense pin no longer controls the output which then pegs high or low The negative common-mode limit is 1 5V below Vb (This is permissible because R2 and R4 are returned to a node biased higher than Vb ) If large positive voltages are applied to the reference and sense pins the common-mode range of the signal inputs begins to suffer as the drop across R13 and R16 increases For example at g 15V supplies VREF e VSENSE e 0V signal input range is typically b 12V to a 13 5V At VREF e VSENSE e 15V signal input range drops to b11V to a 13 5V The reference and sense pins can be as much as 10V above V a as long as a restricted signal common-mode range (b10V min) can be tolerated For maximum bipolar output swing at g 15V supplies the reference pin should be returned to a voltage close to ground At lower supply voltages the reference pin need not be halfway between the supplies for maximum output swing For example at V a e a 12V and Vb e b5V grounding the reference pin still allows a a 11V to b4V swing For single-supply systems the reference pin can be tied to either supply if a single output polarity is all that is required For a bipolar input and output create a low impedance reference with an op amp and voltage divider or a regulator (e g LM336 LM385 LM317L) This forms the reference for all succeeding signal-processing stages (Don’t connect the reference terminal directly to a voltage divider this degrades gain error ) See Figure 1 a Usual configuration maximizes bipolar output swing TL H 5609 – 8 b Unequal supplies output ground referred Full output swing preserved referred to supplies FIGURE 1 Reference Connections 9 Application Hints (Continued) TL H 5609 – 9 c Single Supply Unipolar Output d Single Supply Bipolar Output FIGURE 1 Reference Connections (Continued) OUTPUTS The LM363’s output can typically swing within 1V of the supplies at light loads While specified to drive a 2 kX load to g 10V current limit is typically 15 mA at room temperature The output can stably drive capacitive loads up to 400 pF For higher load capacitance the amplifier may be overcompensated (see COMPENSATION section following) The output may be continuously shorted to ground without damaging the device OFFSET VOLTAGE The LM363’s offset voltage is internally trimmed to a very low value Note that data sheet values are given at Tj e 25 C VCM e 0V and V a e Vb e 15V For other conditions warm-up drift temperature drift common-mode rejection and power supply rejection must be taken into account Warm-up drift due to chip and package thermal gradients is an effect separate from temperature drift Typical warm-up drift is tabulated in the Electrical Characteristics settling time is approximately 5 minutes in still air At load currents up to 5 mA thermal feedback effects are negligible (DVOSs2mV at G e 1000) Care must be taken in measuring the extremely low offset voltages of the high gain amplifiers Input leads must be held isothermal to eliminate thermocouple effects Oscillations due to either heavy capacitive loading or stray capacitance from input to output can cause erroneous readings In either case overcompensation will help High frequency noise fed into the inputs may be rectified internally and produce an offset shift A simple low-pass RC filter will usually cure this problem (Figure 2 ) Use film type resistors for their low thermal EMF In highly noisy environments LC filters can be substituted for increased RF attenuation TL H 5609 – 10 FIGURE 2 Low Pass Filter Prevents RF Rectification Instrumentation amplifiers have both an input offset voltage (VIOS) and an output offset voltage (VOOS) The total inputreferred offset voltage (VOSRTI) is related to the instrumentation amplifier gain (G) as follows VOSRTI e VIOS a VOOS G The offset voltage given in the LM363 specifications is the total input-referred offset As long as only one gain is used offset voltage can be nulled at either input or output as shown in Figures 3a and 3b When the 16-pin device is used at multiple gain settings both VIOS and VOOS should be nulled to get minimum offset at all gains as shown in Figure 3c The correct procedure is to trim VOOS for zero output at G e 10 then trim VIOS at G e 1000 TL H 5609 – 11 FIGURE 3 Offset Voltage Trimming 10 Application Hints (Continued) Because the LM363’s offset voltage is so low to begin with offset nulling has a negligible effect on offset temperature drift For example zeroing a 100 mV offset assuming external resistor TC of 200 ppm C and worst-case internal resistor TC results in an additional drift component of 0 08 mV C For this reason drift specifications are guaranteed with or without external offset nulling GAIN ADJUSTMENT Gain may be increased by adding an external voltage divider between output force and sense and reference the preferred connection is shown in Figure 4 Since both the sense and reference pins look like 50 kX ( g 20 kX) to Vb impedances presented to both pins must be equal to avoid offset error For example a 100X imbalance can create a worst-case output offset of 50 mV creating an input-referred error of 5 mV at G e 10 or 50 mV at G e 1000 Increasing gain this way increases output offset error An LM363H-100 may have an output offset of 5 mV resulting in input referred offset component of 50 mV Raising the gain to 200 yields a 10 mV error at the output and changes input referred error by an additional 50 mV External resistors connected to the reference and sense pins can only increase the gain If ultra-low output impedance is not critical the technique in Figure 5 can be used to trim the gain to nominal value Alternatively the VOS adjustment terminals on the 16-pin package may be used to trim the gain (Figure 10b ) R1 and R2 should be as low as possible to avoid errors due to 50 kX input impedance of reference and sense pins Total resistance (R2 a 2R1) should be above 4 kX however to prevent excessive load on the LM363 output The exact formula for calculating gain (G) is G e GO 1 a GO e preset gain  2R1 R1 a R2 50k J The last term may be ignored in applications where gain accuracy is not critical The table below gives suggested values for R1 and R2 along with the calculated error due to ‘‘closest value’’ standard 1% resistors Total gain error tolerance includes contributions from LM363 GO error and resistor tolerance ( g 1%) and works out to approximately 2 5% in every case Pinout shown is for 16-pin package This same technique can also be used with 8-pin versions TL H 5609–12 Gain Increase R1 R2 Error (typ) 15 1 21k 5k a 0 6% 2 1 21k 2 49k b 0 2% 25 2k 2 74k 0 3 2k 2 05k b 0 3% 4 1 78k 1 21k b 0 6% 5 2k 1k a 0 8% 6 2 49k 1k a 0 5% 7 2 94k 1k b 0 9% 8 3 48k 1k a 0 4% 9 3 92k 1k b 0 9% 10 4 42k 1k b 0 7% FIGURE 4 Increasing Gain Pinout shown is for 8-pin versions This same technique can also be used with 16-pin version TL H 5609 – 13 FIGURE 5 Adjusting Gain Alternate Technique 11 Application Hints (Continued) COMPENSATION AND OUTPUT CLAMPING The LM363 is internally compensated for unity feedback from output to sense Increasing gain with external dividers will decrease the bandwidth and increase stability margin Without external compensation the amplifier can stably drive capacitive loads up to 400 pF When used as an op amp (sense and reference pins grounded feedback to inverting input) the LM363 is stable for gains of 100 or more For greater stability the device may be over-compensated as in Figure 6 Tables I and II depict suggested compensation components along with the resulting changes in large and small signal bandwidth for the 8-pin and 16-pin packages respectively Note that the RC network from pin 8 of the 8-pin device to ground has a large effect on power bandwidth especially at low gains The Miller capacitance utilized for overcompensating the 16-pin device permits higher slew rate and larger load capacitance for the same bandwidth and is preferred when bandwidth must be greatly reduced (e g to reduce output noise) Heavy Miller overcompensation on the 16-pin package can degrade AC PSRR A large capacitor between pins 15 and 16 couples transients on the positive supply to the output buffer Since the amplifier bandwidth is severely rolled off it cannot keep the output at the correct state at moderate frequencies Hence for good PSRR either keep the Miller capacitance under 1000 pF or use the pin 15-to-ground compensation shown in Table I TL H 5609 – 14 FIGURE 6 Overcompensation TABLE I Overcompensation on 8-Pin Package Compensation Network (Pin 8 to Ground) Small Signal 3 dB Bandwidth (kHz) 125 95 45 10 1 240 170 80 20 2 240 170 90 20 2 Power Bandwidth ( g 10V Swing) (Hz) 100k 15k 1 8k 200 20 100k 15k 1 8k 200 20 100k 15k 1 8k 200 20 Maximum Capacitive Load (pF) 400 600 800 1000 1000 400 900 1200 1600 2000 400 900 1200 1600 2000 Gain 500 100 pF 15k 1000 pF 5k 0 01 mF 500X 0 1 mF 100 pF 15k 1000 pF 5k 0 01 mF 500X 0 1 mF 100 pF 15k 1000 pF 5k 0 01 mF 500X 0 1 mF 100 10 Also stable for CL t 0 05 mF Pin 15 to ground on 16-pin package TABLE II Overcompensation on 16-Pin Package Compensation Capacitor (Pin 15 to 16) 10 pF 100 pF 1000 pF 0 01 mF 10 pF 100 pF 1000 pF 0 01 mF 10 pF 100 pF 1000 pF 0 01 mF Small Signal 3 dB Bandwidth (Hz) 45k 16k 2 5k 250 25 140k 50k 7 5k 750 75 180k 60k 9k 900 90 Power Bandwidth ( g 10V Swing) (Hz) 45k 16k 2 5k 250 25 100k 50k 7 5k 750 75 90k 50k 9k 900 90 Maximum Capacitive Load (pF) 1000 2000 2500 3000 3000 900 1600 2000 2000 2000 600 1100 1600 2000 2000 Gain 1000 100 10 Also stable for CL t 0 05 mF 12 Application Hints (Continued) Because the LM363’s output voltage is approximately one diode drop below the voltage at pin 15 (pin 8 for the 8-pin device) this point may be used to limit output swing as seen in Figure 7a Current available from this pin is only 50 mA so that zeners must have a sharp breakdown to clamp accurately Alternatively a diode tied to a voltage source could be used as in Figure 7b 50 pF to ground at both shield driver outputs Do not use only one shield driver for a single-ended signal as oscillations can result shield driver to input capacitance must be roughly balanced ( g 30%) To further reduce noise pickup the shielded signal lines may be enclosed together in a grounded shield If a large amount of RF noise is the problem the only sure cure is a filter capacitor at both inputs otherwise the RFI may be internally rectified producing an offset DC loading on the shield drivers should be minimized The drivers can only source approximately 40 mA above this value the input stage bias voltages change degrading VOS and CMRR While the shield drivers can sink several mA VOS may degrade severely at loads above 100 mA (see Shield Driver Loading Error curve in Typical Performance Characteristics) Because the shield drivers are one diode drop above the input levels unbalanced leakage paths from shield to input can produce an input offset at high source impedances Buffering with emitter-followers (Figure 8b ) reduces this leakage current by reducing the voltage differential and eliminates any loading on the amplifier TL H 5609 – 15 FIGURE 7 Output Clamp SHIELD DRIVERS When differential signals are sent through long cables three problems occur First noise both common-mode and differential is picked up Second signal bandwidth is reduced by the RC low-pass filter formed by the source impedance and the cable capacitance Finally when these RC time constants are not identical (unbalanced source impedance and or unbalanced capacitance) AC common-mode rejection is degraded amplifying both induced noise and ‘‘ground’’ noise Either filtering at the amplifier inputs or slowing down the amplifier by overcompensating will indeed reduce the noise but the price is slower response The LM363D’s dual shield drivers can actually increase bandwidth while reducing noise The way this is done is by bootstrapping out shield capacitance The shield drivers follow the input signal Since both sides of the shield capacitance swing the same amount it is effectively out of the circuit at frequencies of interest Hence the input signal is not rolled off and AC CMRR is not degraded (Figure 8 ) The LM363D’s shield drivers can handle capacitances (shield to center conductor) as high as 1000 pF with source resistances up to 100 kX For best results identical shielded cables should be used for both signal inputs although small mismatches in shield driver to ground capacitance (s500 pF) do not cause problems At certain low values of cable capacitance (50 pF – 200 pF) high frequency oscillations can occur at high source resistance (t 10 kX) This is alleviated by adding TL H 5609 – 16 FIGURE 8 Driving Shielded Cables MISCELLANEOUS TRIMMING The VOS adjust and shield driver pins available on the 16pin package may be used to trim the other parameters besides offset voltage as illustrated in Figure 10 The bias-current trim relies on the fact that the voltage on the shield driver and gain setting pins is one diode drop respectively above and below the input voltage Input bias current can be held to within 100 pA over the entire common-mode range and input offset current always stays under 30 pA The CMRR trims use the shield driver pins to drive the VOS adjust pins thus maintaining the LM363’s ultra-high input impedance 13 Application Hints (Continued) If power supply rejection is critical frequently only the negative PSRR need be adjusted since the positive PSRR is more tightly specified Any or all of the trim schemes of Figure 10 can be combined as desired As long as the center tap of the 100k trimpot is returned to a voltage 200 mV below V a the trim schemes shown will not greatly affect VOS Both the gain and DC CMRR trims can degrade positive PSRR the positive PSRR can then be nulled out if desired The correct order of trimming from first to last is bias current gain CMRR negative PSRR positive PSRR and VOS Top Trace Cable Shield Grounded Bottom Trace Cable Shield Bootstrapped TL H 5609–17 TL H 5609 – 18 FIGURE 9 Improved Response using Shield Drivers TL H 5609 – 19 FIGURE 10 Other Trims for 16-Pin Package 14 Typical Applications 4 mA-20 mA Two Wire Current Transmitter TL H 5609 – 20 The LM329 reference provides excellent line regulation and gain stability When bridge is balanced (IOUT e 4 mA) there’s no drop across R3 and R4 so that gain and offset adjustments are non-interactive The LM334 configured as a zero-TC current source supplies quiescent current to circuit R11 provides current limiting Design Equations IOS e (IR6 a IR7) Gain e DIOUT AV R2 a R3 a R4 10 mA jX j DVIN R1 R3 a R4 mV 0 68V 68 mV j 3 8 mA a R9 R10 1 a R2 e 4 mA R1 J when AV e LM363 voltage gain Pick I334 e VZ b 2 4V e 26 mA IMAX e I334 a R11 IBRIDGE(MAX) j I334-I363-IZ j 1 5mA Precision Current Source (Low Output Current) R1 e R2 IOUT e VIN GR1 lVINl s 10V TL H 5609 – 21 Precision Voltage to Current Converter (Low Input Voltage) R1 e R2 Req e R1 ll 50 kX IOUT e G VIN G VIN e Req 1 kX TL H 5609 – 22 15 Typical Applications (Continued) Curvature Corrected Platinum RTD Thermometer 70k and 2k should track to 5 ppm C Less than 5 ppm C drift Less than 100 ppm C drift These resistors should track to 20 ppm C Equivalent circuit showing lead resistance This thermometer is capable of 0 01 C accuracy over b 50 C to a 150 C A unique trim arrangement eliminates cumbersome trim interactions so that zero gain and nonlinearity correction can be trimmed in one oven trip Extra op amps provide full Kelvin sensing on the sensor without adding drift and offset terms found in other designs A2 is configured as a Howland current pump biasing the sensor with a fixed current TL H 5609 – 23 Resistors R2 R3 R4 and R5 from a bridge driven into balance by A1 In balance both inputs of A1 are at the same voltage Since R6 e R7 A1 draws equal currents from both legs of the bridge Any loading of the R4 R5 leg by the sensor would unbalance the bridge therefore both bridge taps are given to the sensor open circuit voltage and no current is drawn Precision Temperature Controller Ultronix 105A wirewound Thermistor e Yellow Springs 44032 Setpoint stability e 2 5X10b4 C Hr TL H 5609 – 24 16 Typical Applications (Continued) Low Frequency Rolloff (AC Coupling) f1 e 1 e 1 Hz 2qC1(50 kX) f2 e 100 f1 e 100Hz Reduced DC voltage gain attenuates offset error and 1 f noise by a factor of 100 TL H 5609 – 25 Precision Comparator with Balanced Inputs and Variable Offset Boosted Current Source with Limiting R1 e R2 IO e G VIN R2 VBE R2 IMAX e tpd j 15 mS at 1 mV overdrive DVOUT e V2 a 0 6V Hysteresis e DVOUT e 2 mV G(R1 a R2) j 60 mA Offset e VSENSE G g 1 3V range TL H 5609 – 26 Thermocouple Amplifier with Cold Junction Compensation Input protection circuitry allows thermocouple to short to 120 VAC without damaging amplifier Calibration 1) Apply 50 mV signal in place of thermocouple Trim R3 for VOUT e 12 25V 2) Reconnect thermocouple Trim R9 for correct output TL H 5609 – 27 17 Typical Applications (Continued) Synchronous Demodulator TL H 5609 – 28 Use square wave drive produced by optical chopper to run LF13333 switch inputs Pulsed Bridge Driver Amplifier TL H 5609 – 29 18 Typical Applications (Continued) Precision Barometer Parallel trim for 28 00 Hg e 0V Parallel trim for 32 00 Hg e 4V out B L H Electronics DHF-444114 Pressure Transducer 350X input impedance Output e 1 mV volt excitation psi TL H 5609 – 30 Removing Large DC Offsets Optional bandlimiting to reduce noise Pick R1C1 e R2C2 e R3C3 10 e 1 2 q fl TL H 5609 – 31 fl e 0 1 Hz for values shown Integrator nulls out offset error to LM363 bias currents flowing into R1 and R2 Removing Small DC Offsets Optional bandlimiting to reduce noise Low frequency break frequency fl e 1 e 0 01 Hz 2qR1C1 TL H 5609 – 32 Accommodates out referred offset of several volts Limit is set by max differential between reference and sense terminals 19 20 Physical Dimensions inches (millimeters) Metal Can Package (H) Order Number LM363H-10 LM363H-100 or LM363H-500 NS Package Number H08C 21 LM363 Precision Instrumentation Amplifier Physical Dimensions inches (millimeters) (Continued) Hermetic Dual-In-Line Package (D) Order Number LM363D NS Package Number D16C LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness 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