54ABT574

54ABT574 Octal D-Type Flip-Flop with TRI-STATE Outputs July 1998 54ABT574 Octal D-Type Flip-Flop with TRI-STATE ® Outputs General Description The ’ABT574 is an octal flip-flop with a buffered common Clock (CP) and a buffered common Output Enable (OE). The information presented to the D inputs is stored in the flip-flops on the LOW-to-HIGH Clock (CP) transition. The device is functionally identical to the ’ABT374 except for the pinouts. n TRI-STATE outputs for bus-oriented applications n Output sink capability of 48 mA, source capability of 24 mA n Guaranteed multiple output switching specifications n Output switching specified for both 50 pF and 250 pF loads n Guaranteed simultaneous switching, noise level and dynamic threshold performance n Guaranteed latchup protection n High impedance glitch free bus loading during entire power up and power down cycle n Non-destructive hot insertion capability n Standard Microcircuit Drawing (SMD) 5962-9322001 Features n Inputs and outputs on opposite sides of package allowing easy interface with microprocessors n Useful as input or output port for microprocessors n Functionally identical to ’ABT374 Ordering Code Military 54ABT574J/883 54ABT574W/883 54ABT574E/883 Package Number J20A W20A E20A 20-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier, Type C Package Description 20-Lead Ceramic Dual-In-Line Connection Diagrams Pin Assignment for DIP and Flatpak Pin Assignment for LCC DS100208-1 DS100208-2 Pin Descriptions Pin Names D0–D7 CP OE O0–O7 Data Inputs Clock Pulse Input (Active Rising Edge) TRI-STATE Output Enable Input (Active LOW) TRI-STATE Outputs Description FAST ® and TRI-STATE ® are registered trademarks of National Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100208 www.national.com Functional Description The ’ABT574 consists of eight edge-triggered flip-flops with individual D-type inputs and TRI-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold times requirements on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs are in a high impedance state. Operation of the OE input does not affect the state of the flip-flops. OE H H H L L L L Inputs CP H or L N N N N Internal Outputs D H L H L H L H Q NC L H L H NC NC O Z Z Z L H NC NC Hold Load Load Function Data Available Data Available No Change in Data No Change in Data H or L H or L Function Table Inputs OE H CP H or L D L Internal Outputs Q NC O Z Hold Function H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance N = LOW-to-HIGH Transition NC = No Change Logic Diagram DS100208-3 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.national.com 2 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias Ceramic VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Any Output in the Disabled or Power-Off State in the HIGH State Current Applied to Output in LOW State (Max) DC Latchup Source Current −65˚C to +150˚C −55˚C to +125˚C −55˚C to +175˚C −0.5V to +7.0V −0.5V to +7.0V −30 mA to +5.0 mA −0.5V to 5.5V −0.5V to VCC twice the rated IOL (mA) −500 mA Over Voltage Latchup (I/O) 10V Recommended Operating Conditions Free Air Ambient Temperature Military Supply Voltage Military Minimum Input Edge Rate Data Input Enable Input Clock Input −55˚C to +125˚C +4.5V to +5.5V (∆V/∆t) 50 mV/ns 20 mV/ns 100 mV/ns Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Symbol VIH VIL VCD VOH VOL IIH IBVI IIL VID IOZH IOZL IOS ICEX IZZ ICCH ICCL ICCZ ICCT Parameter Min Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Input LOW Current Input Leakage Test Output Leakage Current Output Leakage Current Output Short-Circuit Current Output High Leakage Current Bus Drainage Test Power Supply Current Power Supply Current Power Supply Current Additional ICC/Input Outputs Enabled Outputs TRI-STATE Outputs TRI-STATE ICCD Dynamic ICC (Note 4) Note 3: For 8-bit toggling, ICCD < 0.8 mA/MHz. Note 4: Guaranteed, but not tested. ABT574 Typ Max 2.0 0.8 −1.2 54ABT 54ABT 54ABT 2.5 2.0 0.55 5 5 7 −5 −5 4.75 50 −50 −100 −275 50 100 50 30 50 2.5 2.5 2.5 Units V V V V V V µA µA µA V µA µA mA µA µA µA mA µA mA mA mA mA/ VCC Conditions Recognized HIGH Signal Min Min Min Min Max Max Max 0.0 0 − 5.5V 0 − 5.5V Max Max 0.0 Max Max Max Recognized LOW Signal IIN = −18 mA IOH = −3 mA IOH = −24 mA IOL = 48 mA VIN = 2.7V (Note 4) VIN = VCC VIN = 7.0V VIN = 0.5V (Note 4) VIN = 0.0V IID = 1.9 µA All Other Pins Grounded VOUT = 2.7V; OE = 2.0V VOUT = 0.5V; OE = 2.0V VOUT = 0.0V VOUT = VCC VOUT = 5.5V; All Other GND All Outputs HIGH All Outputs LOW OE = VCC All Others at VCC or GND VI = VCC − 2.1V Max Enable Input VI = VCC − 2.1V Data Input VI = VCC − 2.1V All Others at VCC or GND Outputs Open, OE = GND, One Bit Toggling (Note 3), 50% Duty Cycle No Load Max 0.30 MHz 3 www.national.com AC Electrical Characteristics 54ABT TA = −55˚C to +125˚C VCC = 4.5V to 5.5V CL = 50 pF Min fmax tPLH tPHL tPZH tPZL tPHZ tPLZ Output Disable Time Max Clock Frequency Propagation Delay CP to On Output Enable Time 150 1.5 1.5 1.0 1.0 1.0 1.0 7.0 7.4 6.5 7.2 7.2 6.7 ns ns Max MHz ns Symbol Parameter Units AC Operating Requirements 54ABT TA = −55˚C to +125˚C VCC = 4.5V to 5.5V CL = 50 pF Min ts(H) ts(L) th(H) th(L) tw(H) tw(L) Setup Time, HIGH or LOW Dn to CP Hold Time, HIGH or LOW Dn to CP Pulse Width, CP, HIGH or LOW 1.5 2.0 2.0 2.0 3.3 3.3 ns ns Max ns Symbol Parameter Units Capacitance Symbol CIN COUT (Note 5) Parameter Input Capacitance Output Capacitance Typ 5.0 9.0 Units pF pF Conditions TA = 25˚C VCC = 0V VCC = 5.0V Note 5: COUT is measured at frequency f = 1 MHz, per MIL-STD-883B, Method 3012. TPHL vs Temperature (TA) CL = 50 pF, 1 Output Switching, Clock to Output TPLH vs Temperature (TA) CL = 50 pF, 1 Output Switching, Clock to Output DS100208-12 DS100208-13 www.national.com 4 Capacitance (Continued) TPZL vs Temperature (TA) CL = 50 pF, 1 Output Switching, OE to Output TPZH vs Temperature (TA) CL = 50 pF, 1 Output Switching, OE to Output DS100208-14 DS100208-15 TPHZ vs Temperature (TA) CL = 50 pF, 1 Output Switching, OE to Output TPLZ vs Temperature (TA) CL = 50 pF, 1 Output Switching, OE to Output DS100208-16 DS100208-17 TSET LOW vs Temperature (TA) CL = 50 pF, 1 Output Switching, Data to Clock TSET vs Temperature (TA) CL = 50 pF, 1 Output Switching, Data to Clock DS100208-18 DS100208-19 THOLD HIGH vs Temperature (TA) CL = 50 pF, 1 Output Switching, Data to Clock THOLD LOW vs Temperature (TA) CL = 50 pF, 1 Output Switching, Data to Clock DS100208-20 DS100208-21 5 www.national.com Capacitance (Continued) TPHL vs Temperature (TA) CL = 50 pF, 8 Outputs Switching, Clock to Output TPLH vs Temperature (TA) CL = 50 pF, 8 Outputs Switching, Clock to Output DS100208-22 DS100208-23 TPZH vs Temperature (TA) CL = 50 pF, 8 Outputs Switching, OE to Output TPZL vs Temperature (TA) CL = 50 pF, 8 Outputs Switching, OE to Output DS100208-24 DS100208-25 TPHZ vs Temperature (TA) CL = 50 pF, 8 Outputs Switching, OE to Output TPLZ vs Temperature (TA) CL = 50 pF, 8 Outputs Switching, OE to Output DS100208-26 DS100208-27 TPLH vs Load Capacitance TA = 25˚C, 1 Output Switching, Clock to Output TPHL vs Load Capacitance TA = 25˚C, 1 Output Switching, Clock to Output DS100208-28 DS100208-29 www.national.com 6 Capacitance (Continued) TPHL vs Load Capacitance TA = 25˚C, 8 Outputs Switching, Clock to Output TPLH vs Load Capacitance TA = 25˚C, 8 Outputs Switching, Clock to Output DS100208-30 DS100208-31 TPZH vs Load Capacitance TA = 25˚C, 8 Outputs Switching, OE to Output TPZL vs Load Capacitance TA = 25˚C, 8 Outputs Switching, OE to Output DS100208-32 DS100208-33 TPLH and TPHL vs Number Outputs Switching CL = 50 pF, TA = 25˚C, VCC = 5.0V, Outputs In Phase, Clock to Output Typical ICC vs Output Switching Frequency CL = 0 pF, VCC = VIH = 5.5V, 1 Output Switching at 50% Duty Cycle DS100208-34 DS100208-35 7 www.national.com AC Loading DS100208-4 *Includes jig and probe capacitance DS100208-6 FIGURE 1. Standard AC Test Load FIGURE 2. VM = 1.5V Input Pulse Requirements Amplitude 3.0V Rep. Rate 1 MHz tw 500 ns tr 2.5 ns tf 2.5 ns FIGURE 3. Test Input Signal Requirements DS100208-8 FIGURE 4. Propagation Delay Waveforms for Inverting and Non-Inverting Functions DS100208-5 FIGURE 5. Propagation Delay, Pulse Width Waveforms DS100208-7 FIGURE 6. TRI-STATE Output HIGH and LOW Enable and Disable Times FIGURE 7. Setup Time, Hold Time and Recovery Time Waveforms DS100208-9 www.national.com 8 Physical Dimensions inches (millimeters) unless otherwise noted 20-Terminal Ceramic Chip Carrier (L) NS Package Number E20A 20-Lead Ceramic Dual-In-Line Package (D) NS Package Number J20A 9 www.national.com 54ABT574 Octal D-Type Flip-Flop with TRI-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Ceramic Flatpak (F) NS Package Number W20A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness. ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Français Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: sea.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5620-6175 Fax: 81-3-5620-6179 www.national.com National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.