54F283LL

54F 74F283 4-Bit Binary Full Adder with Fast Carry November 1994 54F 74F283 4-Bit Binary Full Adder with Fast Carry General Description The ’F283 high-speed 4-bit binary full adder with internal carry lookahead accepts two 4-bit binary words (A0 –A3 B0 – B3) and a Carry input (C0) It generates the binary Sum outputs (S0 – S3) and the Carry output (C4) from the most significant bit The ’F283 will operate with either active HIGH or active LOW operands (positive or negative logic) Features Y Guaranteed 4000V minimum ESD protection Commercial 74F283PC Military Package Number N16E Package Description 16-Lead (0 300 Wide) Molded Dual-In-Line 16-Lead Ceramic Dual-In-Line 16-Lead (0 150 Wide) Molded Small Outline JEDEC 16-Lead (0 300 Wide) Molded Small Outline EIAJ 16-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C 54F283DM (Note 2) 74F283SC (Note 1) 74F283SJ (Note 1) 54F283FM (Note 2) 54F283LL (Note 2) J16A M16A M16D W16A E20A Note 1 Devices also available in 13 reel Use suffix e SCX and SJX Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB Logic Symbols Connection Diagrams Pin Assignment for DIP SOIC and Flatpak Pin Assignment for LCC TL F 9513–1 IEEE IEC TL F 9513 – 2 TL F 9513 – 3 TL F 9513–4 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9513 RRD-B30M105 Printed in U S A Unit Loading Fan Out 54F 74F Pin Names Description UL HIGH LOW 10 20 10 20 10 10 50 33 3 50 33 3 Input IIH IIL Output IOH IOL 20 mA b1 2 mA 20 mA b1 2 mA 20 mA b0 6 mA b 1 mA 20 mA b 1 mA 20 mA A 0 – A3 B 0 – B3 C0 S0 – S3 C4 A Operand Inputs B Operand Inputs Carry Input Sum Outputs Carry Output Functional Description The ’F283 adds two 4-bit binary words (A plus B) plus the incoming Carry (C0) The binary sum appears on the Sum (S0 – S3) and outgoing carry (C4) outputs The binary weight of the various inputs and outputs is indicated by the subscript numbers representing powers of two 20 (A0 a B0 a C0) a 21 (A1 a B1) a 22 (A2 a B2) a 23 (A3 a B3) e S0 a 2S1 a 4S2 a 8S3 a 16C4 Where ( a ) e plus Interchanging inputs of equal weight does not affect the operation Thus C0 A0 B0 can be arbitrarily assigned to pins 5 6 and 7 for DIPS and 7 8 and 9 for chip carrier packages Due to the symmetry of the binary add function the ’F283 can be used either with all inputs and outputs active HIGH (positive logic) or with all inputs and outputs active LOW (negative logic) See Figure 1 Note that if C0 is not used it must be tied LOW for active HIGH logic or tied HIGH for active LOW logic Due to pin limitations the intermediate carries of the ’F283 are not brought out for use as inputs or outputs However other means can be used to effectively insert a carry into or bring a carry out from an intermediate stage Figure 2 shows how to make a 3-bit adder Tying the operand inputs of the fourth adder (A3 B3) LOW makes S3 dependent only on and equal to the carry from the third adder Using somewhat the same principle Figure 3 shows a way of dividing the ’F283 into a 2-bit and a 1-bit adder The third stage adder (A2 B2 S2) is used merely as a means of getting a carry (C10) signal into the fourth stage (via A2 and B2) and bringing out the carry from the second stage on S2 Note that as long as A2 and B2 are the same whether HIGH or LOW they do not influence S2 Similarly when A2 and B2 are the same the carry into the third stage does not influence the carry out of the third stage Figure 4 shows a method of implementing a 5-input encoder where the inputs are equally weighted The outputs S0 S1 and S2 present a binary number equal to the number of inputs I1 –I5 that are true Figure 5 shows one method of implementing a 5-input majority gate When three or more of the inputs I1 –I5 are true the output M5 is true C0 Logic Levels Active HIGH Active LOW L 0 1 A0 L 0 1 A1 H 1 0 A2 L 0 1 A3 H 1 0 B0 H 1 0 B1 L 0 1 B2 L 0 1 B3 H 1 0 S0 H 1 0 S1 H 1 0 S2 L 0 1 S3 L 0 1 C4 H 1 0 Active HIGH 0 a 10 a 9 e 3 a 16 Active LOW 1 a 5 a 6 e 12 a 0 FIGURE 1 Active HIGH versus Active LOW Interpretation 2 Functional Description (Continued) TL F 9513 – 5 FIGURE 2 3-Bit Adder TL F 9513 – 6 FIGURE 3 2-Bit and 1-Bit Adders TL F 9513 – 7 FIGURE 4 5-Input Encoder TL F 9513 – 8 FIGURE 5 5-Input Majority Gate 3 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays 4 TL F 9513 – 9 Logic Diagram Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias Plastic VCC Pin Potential to Ground Pin b 65 C to a 150 b 55 C to a 125 b 55 C to a 175 b 55 C to a 150 Recommended Operating Conditions Free Air Ambient Temperature Military Commercial Supply Voltage Military Commercial b 55 C to a 125 C 0 C to a 70 C a 4 5V to a 5 5V a 4 5V to a 5 5V C C C C b 0 5V to a 7 0V b 0 5V to a 7 0V Input Voltage (Note 2) b 30 mA to a 5 0 mA Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC e 0V) b 0 5V to VCC Standard Output b 0 5V to a 5 5V TRI-STATE Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA) ESD Last Passing Voltage (Min) 4000V Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired Functional operation under these conditions is not implied Note 2 Either voltage limit or current limit is sufficient to protect inputs DC Electrical Characteristics Symbol VIH VIL VCD VOH Parameter Min Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current Output Short-Circuit Current Power Supply Current Power Supply Current b 60 54F 74F Typ Max Units V 08 b1 2 VCC Conditions Recognized as a HIGH Signal Recognized as a LOW Signal 20 V V V Min Min IIN e b18 mA IOH e b1 mA IOH e b1 mA IOH e b1 mA IOL e 20 mA IOL e 20 mA VIN e 2 7V VIN e 7 0V VOUT e VCC IID e 1 9 mA All Other Pins Grounded VIOD e 150 mV All Other Pins Grounded VIN e 0 5V (CO) VIN e 0 5V (An Bn) VOUT e 0V VO e HIGH VO e LOW 54F 10% VCC 74F 10% VCC 74F 5% VCC 54F 10% VCC 74F 10% VCC 54F 74F 54F 74F 54F 74F 74F 74F 25 25 27 05 05 20 0 50 100 70 250 50 4 75 3 75 b0 6 b1 2 b 150 VOL IIH IBVI ICEX VID IOD IIL IOS ICCH ICCL V mA mA mA V mA mA mA mA mA Min Max Max Max 00 00 Max Max Max Max 36 36 55 55 5 AC Electrical Characteristics 74F Symbol Parameter Min tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Propagation Delay C0 to Sn Propagation Delay An or Bn to Sn Propagation Delay C0 to C4 Propagation Delay An or Bn to C4 35 30 30 30 30 30 30 25 TA e a 25 C VCC e a 5 0V CL e 50 pF Typ 70 70 70 70 57 54 57 53 Max 95 95 95 95 75 70 75 70 54F TA VCC e Mil CL e 50 pF Min 35 30 30 30 30 25 30 25 Max 14 0 14 0 17 0 14 0 10 5 10 0 10 5 10 0 74F TA VCC e Com CL e 50 pF Min 35 30 30 30 30 30 30 25 Max 11 0 11 0 13 0 11 5 85 80 85 80 ns ns ns ns Units Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows 74F Temperature Range Family 74F e Commercial 54F e Military Device Type Package Code P e Plastic DIP D e Ceramic DIP F e Flatpak L e Leadless Chip Carrier (LCC) S e Small Outline SOIC JEDEC SJ e Small Outline SOIC EIAJ 283 S C X Special Variations QB e Military grade device with environmental and burn-in processing X e Devices shipped in 13 reel Temperature Range C e Commercial (0 C to a 70 C) M e Military (b55 C to a 125 C) 6 Physical Dimensions inches (millimeters) 20-Lead Ceramic Leadless Chip Carrier (L) NS Package Number E20A 16-Lead Ceramic Dual-In-Line Package (D) NS Package Number J16A 7 Physical Dimensions inches (millimeters) (Continued) 16-Lead (0 150 Wide) Molded Small Outline Package JEDEC (S) NS Package Number M16A 16-Lead (0 300 Wide) Molded Small Outline Package EIAJ (SJ) NS Package Number M16D 8 Physical Dimensions inches (millimeters) (Continued) 16-Lead (0 300 Wide) Molded Dual-In-Line Package (P) NS Package Number N16E 9 54F 74F283 4-Bit Binary Full Adder with Fast Carry Physical Dimensions inches (millimeters) (Continued) 16-Lead Ceramic Flatpak (F) NS Package Number W16A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax (a49) 0-180-530 85 86 Email cnjwge tevm2 nsc com Deutsch Tel (a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications