7493

DM5490 DM7490A DM7493A Decade and Binary Counters July 1992 DM5490 DM7490A DM7493A Decade and Binary Counters General Description Each of these monolithic counters contains four masterslave flip-flops and additional gating to provide a divide-bytwo counter and a three-stage binary counter for which the count cycle length is divide-by-five for the 90A and divideby-eight for the 93A All of these counters have a gated zero reset and the 90A also has gated set-to-nine inputs for use in BCD nine’s complement applications To use their maximum count length (decade or four-bit binary) the B input is connected to the QA output The input count pulses are applied to input A and the outputs are as described in the appropriate truth table A symmetrical divide-by-ten count can be obtained from the 90A counters by connecting the QD output to the A input and applying the input count to the B input which gives a divide-by-ten square wave at output QA Features Y Y Typical power dissipation 90A 145 mW 93A 130 mW Count frequency 42 MHz Connection Diagrams Dual-In-Line Package TL F 6533 – 1 Order Number DM5490J DM5490W or DM7490AN See NS Package Number J14A N14A or W14B Dual-In-Line Package TL F 6533 – 2 Order Number DM7493AN See NS Package Number N14A C1995 National Semiconductor Corporation TL F 6533 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage 7V Input Voltage 5 5V Operating Free Air Temperature Range b 55 C to a 125 C DM54 DM74 0 C to a 70 C Storage Temperature Range b 65 C to a 150 C Note The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed The device should not be operated at these limits The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation Recommended Operating Conditions Symbol VCC VIH VIL IOH IOL fCLK tW Supply Voltage High Level Input Voltage Low Level Input Voltage High Level Output Current Low Level Output Current Clock Frequency (Note 5) Pulse Width (Note 5) A B A B Reset tREL TA Reset Release Time (Note 5) Free Air Operating Temperature 0 0 15 30 15 25 b 55 Parameter Min 45 2 DM5490 Nom 5 Max 55 08 b0 8 DM7490A Min 4 75 2 08 b0 8 Units Max 5 25 V V V mA mA MHz Nom 5 16 32 16 0 0 15 30 15 25 125 0 16 32 16 ns ns 70 C ’90A Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol VI VOH VOL II IIH Parameter Input Clamp Voltage High Level Output Voltage Low Level Output Voltage Input Current Input Voltage Max Conditions VCC e Min II e b12 mA VCC e Min IOH e Max VIL e Max VIH e Min VCC e Min IOL e Max VIH e Min VIL e Max (Note 4) VCC e Max VI e 5 5V VCC e Max VI e 2 7V A Reset B IIL Low Level Input Current VCC e Max VI e 0 4V A Reset B IOS ICC Short Circuit Output Current Supply Current VCC e Max (Note 2) VCC e Max (Note 3) DM54 DM74 b 20 b 18 Min Typ (Note 1) Max b1 5 Units V V 24 34 02 04 1 80 40 120 b3 2 b1 6 b4 8 b 57 b 57 V mA High Level Input Current mA mA mA mA 29 42 Note 1 All typicals are at VCC e 5V TA e 25 C Note 2 Not more than one output should be shorted at a time Note 3 ICC is measured with all outputs open both RO inputs grounded following momentary connection to 4 5V and all other inputs grounded Note 4 QA outputs are tested at IOL e Max plus the limit value of IIL for the B input This permits driving the B input while maintaining full fan-out capability Note 5 TA e 25 C and VCC e 5V 2 ’90A Switching Characteristics at VCC e 5V and TA e 25 C (See Section 1 for Test Waveforms and Output Load) Symbol Parameter From (Input) To (Output) Min fMAX tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPHL Maximum Clock Frequency Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time High to Low Level Output A to QA B to QB A to QA A to QA A to QD A to QD B to QB B to QB B to QC B to QC B to QD B to QD SET-9 to QA QD SET-9 to QB QC SET-0 Any Q 32 16 16 18 48 50 16 21 32 35 32 35 30 40 40 ns ns ns ns ns ns ns ns ns ns ns ns ns RL e 400X CL e 15 pF Max MHz Units 3 Recommended Operating Conditions Symbol VCC VIH VIL IOH IOL fCLK tW Supply Voltage High Level Input Voltage Low Level Input Voltage High Level Output Current Low Level Output Current Clock Frequency (Note 5) Pulse Width (Note 5) A B A B Reset tREL TA Reset Release Time (Note 5) Free Air Operating Temperature 0 0 15 30 15 25 0 70 ns C ns Parameter Min 4 75 2 08 b0 8 DM7493A Nom 5 Max 5 25 Units V V V mA mA MHz 16 32 16 ’93A Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol VI VOH VOL II IIH Parameter Input Clamp Voltage High Level Output Voltage Low Level Output Voltage Input Current Input Voltage Max Conditions VCC e Min II e b12 mA VCC e Min IOH e Max VIL e Max VIH e Min VCC e Min IOL e Max VIH e Min VIL e Max (Note 4) VCC e Max VI e 5 5V VCC e Max VI e 2 4V Reset A B IIL Low Level Input Current VCC e Max VI e 0 4V Reset A B IOS ICC Short Circuit Output Current Supply Current VCC e Max (Note 2) VCC e Max (Note 3) b 18 Min Typ (Note 1) Max b1 5 Units V V 24 34 02 04 1 40 80 80 b1 6 b3 2 b3 2 b 57 V mA High Level Input Current mA mA mA mA 26 39 Note 1 All typicals are at VCC e 5V TA e 25 C Note 2 Not more than one output should be shorted at a time Note 3 ICC is measured with all outputs open both R0 inputs grounded following momentary connection to 4 5V and all other inputs grounded Note 4 QA outputs are tested at IOL e Max plus the limit value of IIL for the B input This permits driving the B input while maintaining full fan-out capability Note 5 TA e 25 C and VCC e 5V 4 ’93A Switching Characteristics at VCC e 5V and TA e 25 C (See Section 1 for Test Waveforms and Output Load) Symbol Parameter From (Input) To (Output) Min fMAX tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPHL Maximum Clock Frequency Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time High to Low Level Output A to QA B to QB A to QA A to QA A to QD A to QD B to QB B to QB B to QC B to QC B to QD B to QD SET-0 to Any Q 32 16 16 18 70 70 16 21 32 35 51 51 ns ns ns ns ns ns ns ns ns ns RL e 400X CL e 15 pF Max MHz Units 40 ns 5 Function Tables (Note D) 90A BCD Count Sequence (See Note A) Count QD 0 1 2 3 4 5 6 7 8 9 L L L L L L L L H H Outputs QC L L L L H H H H L L QB L L H H L L H H L L QA L H L H L H L H L H 0 1 2 3 4 5 6 7 8 9 90A BCD Bi-Quinary (5-2) (See Note B) Count QA L L L L L H H H H H Outputs QD L L L L H L L L L H QC L L H H L L L H H L QB L H L H L L H L H L 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Count QD L L L L L L L L H H H H H H H H 93A Count Sequence (See Note C) Outputs QC L L L L H H H H L L L L H H H H QB L L H H L L H H L L H H L L H H QA L H L H L H L H L H L H L H L H 90A Reset Count Function Table Reset Inputs R0(1) H H X X L L X R0(2) H H X L X X L R9(1) L X H X L X L R9(2) X L H L X L X QD L L H Outputs QC QB QA L L H 93A Reset Count Function Table Reset Inputs R0(1) H L X R0(2) H X L QD L Outputs QC L COUNT COUNT QB L QA L L L L L L L COUNT COUNT COUNT COUNT Note A Output QA is connected to input B for BCD count Note B Output QD is connected to input A for bi-quinary count Note C Output QA is connected to input B Note D H e High Level L e Low Level X e Don’t Care 6 Logic Diagrams 90A 93A TL F 6533 – 4 TL F 6533 – 3 The J and K inputs shown without connection are for reference only and are functionally at a high level 7 8 Physical Dimensions inches (millimeters) 14-Lead Ceramic Dual-In-Line Package (J) Order Number DM5490J NS Package Number J14A 14-Lead Molded Dual-In-Line Package (N) Order Number DM7490AN or DM7493AN NS Package Number N14A 9 DM5490 DM7490A DM7493A Decade and Binary Counters Physical Dimensions inches (millimeters) (Continued) 14-Lead Ceramic Flat Package (W) Order Number DM5490W NS Package Number W14B LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National 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