74ABT16952 16-Bit Registered Transceiver with TRI-STATE Outputs
September 1996
74ABT16952 16-Bit Registered Transceiver with TRI-STATE Outputs
General Description
The ’ABT16952 is a 16-bit registered transceiver Two 8-bit back to back registers store data flowing in both directions between two bidirectional buses Separate clock clock enable and TRI-STATE output enable signals are provided for each register The output pins are guaranteed to source 32 mA (24 mA mil ) and to sink 64 mA (48 mA mil)
Features
Y Y
Y Y
Y
Separate clock clock enable and TRI-STATE output enable provided for each register A and B output sink capability of 64 mA source capability of 32 mA Guaranteed latchup protection High impedance glitch free bus loading during entire power up and power down cycle Nondestructive hot insertion capability
Commercial 74ABT16952CSSC (Note 1) 74ABT16952CMTD (Notes 1 2)
Package Number MS56A MTD56
Package Description 56-Lead (0 300 Wide) Molded Shrink Small Outline JEDEC (SSOP) 56-Lead Molded Thin Shrink Small Outline JEDEC (TSSOP)
Note 1 Devices also available in 13 reel Use suffix e SSCX and MTDX Note 2 Contact factory for package availability
Pin Descriptions
Pin Names A0 – A16 B0 – B16 CPABn CPBAn CEAn CEBn OEABn OEBAn Description Data Register A Inputs B-Register TRI-STATE Outputs Data Register B Inputs A-Register TRI-STATE Outputs Clock Pulse Inputs Clock Enable Output Enable Inputs
Connection Diagram
Pin Assignment for SSOP
TL F 11647 – 1
TRI-STATE is a registered trademark of National Semiconductor Corporation C1996 National Semiconductor Corporation
TL F 11647
RRD-B30M96 Printed in U S A
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Pin Descriptions (Continued)
Output Control OE H L L Internal Q X L H Output Z L H
Z L NC
Register Function Table (Applies to A or B Register) Function D Disable Outputs Enable Outputs X L H Inputs CP X L L CE H L L Internal Q NC L H Function Hold Data Load Data
H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial
e HIGH Impedance e LOW-to-HIGH Transition e No Change
Block Diagram
TL F 11647 – 2
n for either byte 1 or byte 2
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2
Absolute Maximum Ratings (Note 1)
Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias Plastic VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Any Output in the Disable or Power-Off State in the HIGH State
b 65 C to a 150 C b 55 C to a 125 C b 55 C to a 150 C b 0 5V to a 7 0V b 0 5V to a 7 0V b 30 mA to a 5 0 mA b 0 5V to a 5 5V b 0 5V to VCC
Current Applied to Output in LOW State (Max) DC Latchup Source Current Over Voltage Latchup (I O)
twice the rated IOL (mA) b 500 mA 10V
Recommended Operating Conditions
Free Air Ambient Temperature Commercial Supply Voltage Commercial Minimum Input Edge Rate Data Input Enable Input Clock Input
b 40 C to a 85 C a 4 5V to a 5 5V
Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired Functional operation under these conditions is not implied Note 2 Either voltage limit or current limit is sufficient to protect inputs
(DV Dt) 50 mV ns 20 mV ns 100 mV ns
DC Electrical Characteristics
Symbol VIH VIL VCD VOH VOL VID IIH IBVI IBVIT IIL IIH a IOZH IIL a IOZL IOS ICEX IZZ ICCH ICCL ICCZ ICCT Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input Leakage Test Input HIGH Current Input HIGH Current Breakdown Test Input HIGH Current Breakdown Test (I O) Input LOW Current Output Leakage Current Output Leakage Current Output Short-Circuit Current Output HIGH Leakage Current Bus Drainage Test Power Supply Current Power Supply Current Power Supply Current Additional ICC Input
b 100
ABT16952 Min 20 08
b1 2
Typ
Max
Units V V V
VCC
Conditions Recognized HIGH Signal Recognized LOW Signal
Min
IIN e b18 mA (Non I O Pins) IOH e b3 mA (An Bn) IOH e b32 mA (An Bn)
74ABT 74ABT 74ABT
25 20 0 55 4 75 5 7 100
b5
IOL e 64 mA (An Bn) V mA mA mA mA mA mA mA mA mA mA mA mA mA 00 Max Max Max Max 0V – 5 5V 0V – 5 5V Max Max 0 0V Max Max Max Max IID e 1 9 mA (Non-I O Pins) All Other Pins Grounded VIN e 2 7V (Non-I O Pins) (Note 2) VIN e VCC (Non-I O Pins) VIN e 7 0V (Non-I O Pins) VIN e 5 5V (An Bn) VIN e 0 5V (Non-I O Pins) (Note 2) VIN e 0 0V (Non-I O Pins) VOUT e 2 7V (An Bn) OEA or OEB e 2 0V VOUT e 0 5V (An Bn) OEA or OEB e 2 0V VOUT e 0V (An Bn) VOUT e VCC (An Bn) VOUT e 5 5V (An Bn) All Others GND All Outputs HIGH All Outputs LOW Outputs TRI-STATE All Others GND VI e VCC b 2 1V All Others at VCC or GND
50
b 50 b 275
50 100 10 60 10 25
3
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DC Electrical Characteristics
Symbol ICCD Parameter Dynamic ICC (Note 2) No Load Min
(Continued) ABT16952 Typ Max 0 18 Units VCC Conditions Outputs Open OEA or OEB e GND Non-I O e GND or VCC One Bit toggling 50% duty cycle (Note 1)
mA MHz
Max
Note 1 For 8-bit toggling ICCD k 1 4 mA MHz Note 2 Guaranteed but not tested
AC Electrical Characteristics
74ABT Symbol Parameter Min fmax tPLH tPHL tPZH tPZL tPHZ tPLZ Max Clock Frequency Propagation Delay CPABn or CPBAn to An or Bn Output Enable Time OEABn or OEBAn to An or Bn Output Disable Time OEABn or OEBAn to An or Bn 200 15 15 15 15 15 15 53 53 55 55 60 60 TA e a 25 C VCC e a 5 0V CL e 50 pF Max 74ABT TA e b40 C to a 85 C VCC e 4 5V to 5 5V CL e 50 pF Min 200 15 15 15 15 15 15 53 53 55 55 60 60 Max MHz ns Units
ns
ns
AC Operating Requirements
74ABT Symbol Parameter TA e a 25 C VCC e a 5 0V CL e 50 pF Min ts(H) ts(L) th(H) th(L) ts(H) ts(L) th(H) th(L) tw(H) tw(L) Setup Time HIGH or LOW An or Bn to CPABn or CPBAn Hold Time HIGH or LOW An or Bn to CPABn or CPBAn Setup Time HIGH or LOW CEAn or CEBn to CPABn or CPBAn Hold Time HIGH or LOW CEAn or CEBn to CPABn or CPBAn Pulse Width HIGH or LOW to CPABn or CPBAn 25 25 15 15 25 25 15 15 30 30 Max 74ABT TA e b40 C to a 85 C VCC e 4 5V to 5 5V CL e 50 pF Min 25 25 15 15 25 25 15 15 30 30 Max ns Units
ns
ns
ns
ns
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4
Capacitance
Symbol CIN CI O (Note 1) Parameter Input Capacitance Output Capacitance Typ 5 11 Units pF pF Conditions TA e 25 C VCC e 0V (Non I O Pins) VCC e 5 0V (An Bn)
Note 1 CI O is measured at frequency f e 1 MHz per MIL-STD-883B Method 3012
AC Loading
TL F 11647 – 3
Includes jig and probe capacitance
TL F 11647 – 4
FIGURE 1 Standard AC Test Load
FIGURE 2a Test Input Signal Levels Amplitude 3 0V Rep Rate 1 MHz tW 500 ns tr 2 5 ns tf 2 5 ns
FIGURE 2b Input Signal Requirements
TL F 11647 – 5
FIGURE 3 Propagation Delay Waveforms for Inverting and Non-Inveting Functions
TL F 11647 – 6
FIGURE 4 Propagation Delay Pulse Width Waveforms
5
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AC Loading (Continued)
TL F 11647–7
FIGURE 5 TRI-STATE Output HIGH and LOW Enable and Disable Times FIGURE 6 Setup Time Hold Time and Recovery Time Waveforms
TL F 11647 – 8
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows
TL F 11647 – 9
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6
Physical Dimensions inches (millimeters) unless otherwise noted
56-Lead SSOP (0 300 Wide) (SS) 74ABT16952CSSC or 74ABT16952CSSCX NS Package Number MS56A
7
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74ABT16952 16-Bit Registered Transceiver with TRI-STATE Outputs
Physical Dimensions millimeters (Continued)
56-Lead Molded Thin Shrink Small Outline Package JEDEC 74ABT16952CMTD NS Package Number MTD56
LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user
National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018
2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness
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National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications
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