74F399PC

54F 74F398  54F 74F399 Quad 2-Port Register May 1995 54F 74F398  54F 74F399 Quad 2-Port Register General Description The ’F398 and ’F399 are the logical equivalents of a quad 2-input multiplexer feeding into four edge-triggered flipflops A common Select input determines which of the two 4-bit words is accepted The selected data enters the flipflops on the rising edge of the clock The ’F399 is the 16-pin version of the ’F398 with only the Q outputs of the flip-flops available Features Y Y Y Y Select inputs from two data sources Fully positive edge-triggered operation Both true and complement outputs ’F398 Guaranteed 4000V minimum ESD protection ’F399 Commercial 74F398PC Military Package Number N20A Package Description 20-Lead (0 300 Wide) Molded Dual-In-Line 20-Lead Ceramic Dual-In-Line 20-Lead (0 300 Wide) Molded Small Outline JEDEC 20-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C 20-Lead (0 300 Wide) Molded Dual-In-Line 20-Lead Ceramic Dual-In-Line 20-Lead (0 300 Wide) Molded Small Outline JEDEC 20-Lead (0 300 Wide) Molded Small Outline EIAJ 20-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C 54F398DM (Note 2) 74F398SC (Note 1) 54F398FM (Note 2) 54F398LM (Note 2) 74F399PC 54F399DM (Note 2) 74F399SC (Note 1) 74F399SJ (Note 1) 54F399FM (Note 2) 54F399LM (Note 2) J20A M20B W20A E20A N20A J20A M20B M20D W20A E20A Note 1 Devices also available in 13 reel Use suffix e SCX and SJX Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB Connection Diagrams ’F398 Pin Assignment for LCC Pin Assignment for DIP SOIC and Flatpak TL F 9533 – 5 TL F 9533 – 6 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9533 RRD-B30M75 Printed in U S A Connection Diagrams (Continued) ’F399 TL F 9533 – 8 TL F 9533–7 Logic Symbols ’F398 IEEE IEC ’F398 TL F 9533–2 ’F399 TL F 9533 – 1 ’F399 TL F 9533–4 TL F 9533 – 3 Unit Loading Fan Out 54F 74F Pin Names Description UL HIGH LOW 10 10 10 10 10 10 10 10 50 33 3 50 33 3 Input IIH IIL Output IOH IOL 20 mA b0 6 mA 20 mA b0 6 mA 20 mA b0 6 mA 20 mA b0 6 mA b 1 mA 20 mA b 1 mA 20 mA S CP I0a – I0d I1a – I1d Qa – Qd Qa – Qd Common Select Input Clock Pulse Input (Active Rising Edge) Data Inputs from Source 0 Data Inputs from Source 1 Register True Outputs Register Complementary Outputs (’F398) 2 Functional Description The ’F398 and ’F399 are high-speed quad 2-port registers They select four bits of data from either of two sources (Ports) under control of a common Select input (S) The selected data is transferred to a 4-bit output register synchronous with the LOW-to-HIGH transition of the Clock input (CP) The 4-bit D-type output register is fully edge-triggered The Data inputs (I0x I1x) and Select input (S) must be stable only a setup time prior to and hold time after the LOW-to-HIGH transition of the Clock input for predictable operation The ’F398 has both Q and Q outputs Inputs S I I h h I0 I h X X Function Table Outputs I1 X X I h Q L H L H Q H L H L H e HIGH Voltage Level L e LOW Voltage Level h e HIGH Voltage Level one setup time prior to the LOW-to-HIGH clock transition I e LOW Voltage Level one setup time prior to the LOW-to-HIGH clock transition X e Immaterial ’F398 only Logic Diagram TL F 9533 – 9 ’F398 Only Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays 3 Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias Plastic VCC Pin Potential to Ground Pin b 65 C to a 150 b 55 C to a 125 b 55 C to a 175 b 55 C to a 150 Recommended Operating Conditions Free Air Ambient Temperature Military Commercial Supply Voltage Military Commercial b 55 C to a 125 C 0 C to a 70 C a 4 5V to a 5 5V a 4 5V to a 5 5V C C C C b 0 5V to a 7 0V b 0 5V to a 7 0V Input Voltage (Note 2) b 30 mA to a 5 0 mA Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC e 0V) b 0 5V to VCC Standard Output b 0 5V to a 5 5V TRI-STATE Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA) ESD Last Passing Voltage (Min) ’F399 4000V Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired Functional operation under these conditions is not implied Note 2 Either voltage limit or current limit is sufficient to protect inputs DC Electrical Characteristics Symbol VIH VIL VCD VOH Parameter Min Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current Output Short-Circuit Current Power Supply Current (’F398) Power Supply Current (’F398) Power Supply Current (’F399) Power Supply Current (’F399) b 60 54F 74F Typ Max Units V 08 b1 2 VCC Conditions Recognized as a HIGH Signal Recognized as a LOW Signal 20 V V V Min Min IIN e b18 mA IOH e b1 mA IOH e b1 mA IOH e b1 mA IOL e 20 mA IOL e 20 mA VIN e 2 7V VIN e 7 0V VOUT e VCC IID e 1 9 mA All Other Pins Grounded VIOD e 150 mV All Other Pins Grounded VIN e 0 5V VOUT e 0V VO e HIGH VO e LOW VO e HIGH VO e LOW 54F 10% VCC 74F 10% VCC 74F 5% VCC 54F 10% VCC 74F 10% VCC 54F 74F 54F 74F 54F 74F 74F 74F 25 25 27 05 05 20 0 50 100 70 250 50 4 75 3 75 b0 6 b 150 VOL IIH IBVI ICEX VID IOD IIL IOS ICCH ICCL ICCH ICCL V mA mA mA V mA mA mA mA mA mA mA Min Max Max Max 00 00 Max Max Max Max Max Max 25 25 22 22 38 38 34 34 4 AC Electrical Characteristics 74F Symbol Parameter Min fmax tPLH tPHL ’F398 3 3 ns 54F TA VCC e Mil CL e 50 pF Max Min 80 75 90 30 30 95 11 5 Max 74F TA VCC e Com CL e 50 pF Min 100 30 30 85 10 0 Max MHz ns Units TA e a 25 C VCC e a 5 0V CL e 50 pF Typ 140 57 68 Input Clock Frequency Propagation Delay CP to Q or Q 100 30 30 AC Operating Requirements 74F Symbol Parameter TA e a 25 C VCC e a 5 0V Min ts(H) ts(L) th(H) th(L) ts(H) ts(L) ts(H) ts(L) th(H) th(L) tw(H) tw(L) Setup Time HIGH or LOW In to CP Hold Time HIGH or LOW In to CP Setup Time HIGH or LOW S to CP (’F398) Setup Time HIGH or LOW S to CP (’F399) Hold Time HIGH or LOW S to CP CP Pulse Width HIGH or LOW 30 30 10 10 75 75 75 75 0 0 40 50 Max 54F TA VCC e Mil Min 45 45 15 15 10 5 10 5 95 95 0 0 40 70 Max 74F TA VCC e Com Min 30 30 10 10 85 85 85 85 0 0 40 50 ns ns Max Units ns 5 Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows 74F Temperature Range Family 74F e Commercial 54F e Military Device Type Package Code P e Plastic DIP D e Ceramic DIP F e Flatpak L e Leadless Chip Carrier (LCC) S e Small Outline SOIC JEDEC SJ e Small Outline SOIC EIAJ (74F399 only) 398 399 S C X Special Variations QB e Military grade device with environmental and burn-in processing X e Devices shipped in 13 reel Temperature Range C e Commercial (0 C to a 70 C) M e Military (b55 C to a 125 C) 6 Physical Dimensions inches (millimeters) 20-Lead Ceramic Leadless Chip Carrier (L) NS Package Number E20A 20-Lead Ceramic Dual-In-Line Package (D) NS Package Number J20A 7 Physical Dimensions inches (millimeters) (Continued) 20-Lead (0 300 Wide) Molded Small Outline Package JEDEC (S) NS Package Number M20B 20-Lead (0 300 Wide) Molded Small Outline Package EIAJ (SJ) NS Package Number M20D 8 Physical Dimensions inches (millimeters) (Continued) 20-Lead (0 300 Wide) Molded Dual-In-Line Package (P) NS Package Number N20A 9 54F 74F398  54F 74F399 Quad 2-Port Register Physical Dimensions inches (millimeters) (Continued) 20-Lead Ceramic Flatpak (F) NS Package Number W20A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 2900 Semiconductor Drive P O Box 58090 Santa Clara CA 95052-8090 Tel 1(800) 272-9959 TWX (910) 339-9240 National Semiconductor GmbH Livry-Gargan-Str 10 D-82256 F4urstenfeldbruck Germany Tel (81-41) 35-0 Telex 527649 Fax (81-41) 35-1 National Semiconductor Japan Ltd Sumitomo Chemical Engineering Center Bldg 7F 1-7-1 Nakase Mihama-Ku Chiba-City Ciba Prefecture 261 Tel (043) 299-2300 Fax (043) 299-2500 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductores Do Brazil Ltda Rue Deputado Lacorda Franco 120-3A Sao Paulo-SP Brazil 05418-000 Tel (55-11) 212-5066 Telex 391-1131931 NSBR BR Fax (55-11) 212-1181 National Semiconductor (Australia) Pty Ltd Building 16 Business Park Drive Monash Business Park Nottinghill Melbourne Victoria 3168 Australia Tel (3) 558-9999 Fax (3) 558-9998 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications