54F 74F545 Octal Bidirectional Transceiver with TRI-STATE Outputs
May 1995
54F 74F545 Octal Bidirectional Transceiver with TRI-STATE Outputs
General Description
The ’F545 is an 8-bit TRI-STATE high-speed transceiver It provides bidirectional drive for bus-oriented microprocessor and digital communications systems Straight through bidirectional transceivers are featured with 24 mA (20 mA Mil) bus drive capability on the A ports and 64 mA (48 mA Mil) bus drive capability on the B ports One input Transmit Receive (T R) determines the direction of logic signals through the bidirectional transceiver Transmit enables data from A ports to B ports Receive enables data from B ports to A ports The Output Enable input disables both A and B ports by placing them in a TRI-STATE condition
Features
Y Y
Y
Y
Y
Y Y
Higher drive than 8304 8-bit bidirectional data flow reduces system package count TRI-STATE inputs outputs for interfacing with bus-oriented systems 24 mA (20 mA Mil) and 64 mA (48 mA Mil) bus drive capability on A and B ports respectively Transmit Receive and Output Enable simplify control logic Guaranteed 4000V minimum ESD protection Pin for Pin compatible with Intel 8286
Commercial 74F545PC
Military
Package Number N20A
Package Description 20-Lead (0 300 Wide) Molded Dual-In-Line 20-Lead Ceramic Dual-In-Line 20-Lead (0 300 Wide) Molded Small Outline JEDEC 20-Lead (0 300 Wide) Molded Small Outline EIAJ 20-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C
54F545DM (Note 2) 74F545SC (Note 1) 74F545SJ (Note 1) 54F545FM (Note 2) 54F545LM (Note 2)
Note 1 Devices also available in 13
J20A M20B M20D W20A E20A
reel Use suffix e SCX and SJX
Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB
Logic Symbols
TL F 9556 – 3
IEEE IEC
TL F 9556 – 5
TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation
TL F 9556
RRD-B30M105 Printed in U S A
Connection Diagrams
Pin Assignment for DIP SOIC and Flatpak Pin Assignment for LCC
TL F 9556 – 2 TL F 9556–1
Truth Table Inputs OE L L H TR L H X Bus B Data to Bus A Bus A Data to Bus B High Z
H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial Z e High Impedance
Outputs
Unit Loading Fan Out
54F 74F Pin Names OE TR A 0 – A7 B0 – B7 Description UL HIGH LOW Input IIH IIL Output IOH IOL
Output Enable Input (Active LOW) 10 20 20 mA b1 2 mA Transmit Receive Input 10 20 20 mA b1 2 mA Side A TRI-STATE Inputs or 3 5 1 083 70 mA b650 mA TRI-STATE Outputs 150 40 (33 3) b3 mA 24 mA (20 mA) Side B TRI-STATE Inputs or 3 5 1 083 70 mA b650 mA TRI-STATE Outputs 600 106 6 (80) b12 mA 64 mA (48 mA)
2
Absolute Maximum Ratings (Note 1)
If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias Plastic VCC Pin Potential to Ground Pin
b 65 C to a 150 C b 55 C to a 125 C b 55 C to a 175 C b 55 C to a 150 C
Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired Functional operation under these conditions is not implied Note 2 Either voltage limit or current limit is sufficient to protect inputs
Recommended Operating Conditions
Free Air Ambient Temperature Military Commercial Supply Voltage Military Commercial
b 55 C to a 125 C 0 C to a 70 C a 4 5V to a 5 5V a 4 5V to a 5 5V
b 0 5V to a 7 0V b 0 5V to a 7 0V Input Voltage (Note 2) b 30 mA to a 5 0 mA Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC e 0V) b 0 5V to VCC Standard Output b 0 5V to a 5 5V TRI-STATE Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA)
ESD Last Passing Voltage (Min)
4000V
DC Electrical Characteristics
Symbol VIH VIL VCD VOH Parameter Min Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage 54F 10% VCC 54F 10% VCC 54F 10% VCC 74F 10% VCC 74F 10% VCC 74F 10% VCC 74F 5% VCC 74F 5% VCC 54F 10% VCC 54F 10% VCC 74F 10% VCC 74F 10% VCC 54F 74F 54F 74F 54F 74F 54F 74F 74F 74F 4 75 3 75
b1 2
54F 74F Typ Max 20 08
b1 2
Units V V V
VCC
Conditions Recognized as a HIGH Signal Recognized as a LOW Signal
Min
IIN e b18 mA (OE T R) IOH IOH IOH IOH IOH IOH IOH IOH IOL IOL IOL IOL
e e e e e e e e e e e e b 1 mA (An) b 3 mA (An) b 12 mA (Bn) b 1 mA (An) b 3 mA (An) b 15 mA (Bn) b 1 mA (An) b 3 mA (An)
25 24 20 25 24 20 27 27 05 0 55 05 0 55 20 0 50 100 70 10 05 250 50
V
Min
VOL
Output LOW Voltage
V
Min
20 mA (An) 48 mA (Bn) 24 mA (An) 64 mA (Bn)
IIH IBVI IBVIT ICEX VID IOD IIL IIH a IOZH IIL a IOZL IOS
Input HIGH Current Input HIGH Current Breakdown Test Input HIGH Current Breakdown (I O) Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current
mA mA mA mA V mA mA mA mA mA
Max Max Max Max 00 00 Max Max Max Max
VIN e 2 7V (OE T R) VIN e 7 0V (OE T R) VIN e 5 5V (An Bn) VOUT e VCC IID e 1 9 mA All Other Pins Grounded VIOD e 150 mV All Other Pins Grounded VIN e 0 5V (OE T R) VOUT e 2 7V (An Bn) VOUT e 0 5V (An Bn) VOUT e 0V (An) VOUT e 0V (Bn)
Output Leakage Current Output Leakage Current Output Short-Circuit Current
b 60 b 100
70
b 650 b 150 b 225
3
DC Electrical Characteristics (Continued)
Symbol IZZ ICCH ICCL ICCZ Parameter Min Bus Drainage Test Power Supply Current Power Supply Current Power Supply Current 70 95 85 54F 74F Typ Max 500 90 120 110 mA mA mA mA Units VCC 0 0V Max Max Max Conditions VOUT e 5 25V VO e HIGH VO e LOW VO e HIGH Z
AC Electrical Characteristics
74F Symbol Parameter Min tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation Delay An to Bn or Bn to An Output Enable Time Output Disable Time 25 25 30 35 30 20 TA e a 25 C VCC e a 5 0V CL e 50 pF Typ 42 46 53 60 50 50 Max 60 60 70 80 65 65 54F TA VCC e Mil CL e 50 pF Min 20 20 25 30 25 20 Max 75 75 90 10 0 90 10 0 74F TA VCC e Com CL e 50 pF Min 25 25 30 35 30 20 Max 70 70 80 90 75 75 ns Units
ns
Logic Diagram
TL F 9556 – 4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows 74F 545 S C X Temperature Range Family 74F e Commercial 54F e Military Device Type Package Code P e Plastic DIP D e Ceramic DIP F e Flatpak L e Leadless Chip Carrier (LCC) S e Small Outline SOIC JEDEC SJ e Small Outline SOIC EIAJ 4 Special Variations QB e Military grade device with environmental and burn-in processing X e Devices shipped in 13 reel Temperature Range C e Commercial (0 C to a 70 C) M e Military (b55 C to a 125 C)
Physical Dimensions inches (millimeters)
20-Lead Ceramic Leadless Chip Carrier (L) NS Package Number E20A
20-Lead Ceramic Dual-In-Line Package (D) NS Package Number J20A
5
Physical Dimensions inches (millimeters) (Continued)
20-Lead (0 300 Wide) Molded Small Outline Package JEDEC (S) NS Package Number M20B
20-Lead (0 300 Wide) Molded Small Outline Package EIAJ NS Package Number M20D 6
Physical Dimensions inches (millimeters) (Continued)
20-Lead (0 300 Wide) Molded Dual-In-Line Package (P) NS Package Number N20A
7
54F 74F545 Octal Bidirectional Transceiver with TRI-STATE Outputs
Physical Dimensions inches (millimeters) (Continued)
20-Lead Ceramic Flatpak (F) NS Package Number W20A
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