74F646

54F 74F646  74F646B  54F 74F648 Octal Transceiver Register with TRI-STATE Outputs December 1994 54F 74F646  74F646B  54F 74F648 Octal Transceiver Register with TRI-STATE Outputs General Description These devices consist of bus transceiver circuits with TRISTATE D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to a high logic level Control G and direction pins are provided to control the transceiver function In the transceiver mode data present at the high impedance port may be stored in either the A or the B register or in both The select controls can multiplex stored and real-time (transparent mode) data The direction control determines which bus will receive data when the enable control G is Active LOW In the isolation mode (control G HIGH) A data may be stored in the B register and or B data may be stored in the A register Features Y Y Y Y Y Y Y Y Independent registers for A and B buses Multiplexed real-time and stored data ’F648 has inverting data paths ’F646 ’F646B have non-inverting data paths ’F646B is a faster version of the ’F646 TRI-STATE outputs 300 mil slim DIP Guaranteed 4000V minimum ESD protection Commercial 74F646SPC Military Package Number N24C Package Description 24-Lead (0 300 Wide) Molded Dual-In-Line 24-Lead (0 300 Wide) Ceramic Dual-In-Line 24-Lead (0 300 Wide) Molded Small Outline JEDEC 24-Lead Molded Shrink Small Outline EIAJ Type II 24-Lead Cerpack 28-Lead Ceramic Leadless Chip Carrier Type C 24-Lead (0 300 Wide) Molded Dual-In-Line 24-Lead (0 300 Wide) Molded Small Outline JEDEC 24-Lead (0 300 Wide) Molded Dual-In-Line 24-Lead (0 300 Wide) Ceramic Dual-In-Line 24-Lead (0 300 Wide) Molded Small Outline JEDEC 24-Lead Cerpack 24-Lead Ceramic Leadless Chip Carrier Type C 54F646DM (Note 2) 74F646SC (Note 1) 74F646MSA (Note 1) 54F646FM (Note 2) 54F646LM (Note 2) 74F646BSPC 74F646BSC (Note 1) 74F648SPC 54F648SDM (Note 2) 74F648SC (Note 1) 54F648FM (Note 2) 54F648LM (Note 2) Note 1 Devices also available in 13 reel Use suffix e SCX J24F M24B MSA24 W24C E28A N24C M24B N24C J24F M24B W24C E28A Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB Logic Symbols ’F646 ’F646B ’F648 TL F 9580 – 1 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9580 TL F 9580 – 7 RRD-B30M75 Printed in U S A Logic Symbols (Continued) IEEE IEC ’F646 ’F646B IEEE IEC ’F648 TL F 9580–4 TL F 9580 – 9 Connection Diagrams Pin Assignment for DIP SOIC and Flatpak ’F646 ’F646B Pin Assignment for DIP SOIC and Flatpak ’F648 TL F 9580–2 TL F 9580 – 8 Pin Assignment for LCC ’F646 ’F646B Pin Assignment for LCC ’F648 TL F 9580–3 TL F 9580 – 10 2 Unit Loading Fan Out 54F 74F Pin Names Description UL HIGH LOW Input IIH IIL Output IOH IOL Data Register A Inputs TRI-STATE Outputs B0 – B7 Data Register B Inputs TRI-STATE Outputs CPAB CPBA Clock Pulse Inputs SAB SBA Select Inputs G Output Enable Input DIR Direction Control Input A0 – A7 3 5 1 083 70 mA b650 mA 600 106 6 (80) b12 mA 64 mA (48 mA) 3 5 1 083 70 mA b650 mA 600 106 6 (80) b12 mA 64 mA (48 mA) 10 10 20 mA b0 6 mA 10 10 20 mA b0 6 mA 10 10 20 mA b0 6 mA 10 10 20 mA b0 6 mA Function Table Inputs G H H H L L L L L L L L DIR X X X H H H H L L L L CPAB H or L L X X L H or L L X X X X CPBA H or L X L X X X X X L H or L L SAB X X X L L H H X X X X SBA X X X X X X X L L H H Data I O A0 –A7 Input B0 –B7 Input Function Isolation Clock An Data into A Register Clock Bn Data into B Register An to Bn Real Time (Transparent Mode) Clock An Data into A Register A Register to Bn (Stored Mode) Clock An Data into A Register and Output to Bn Bn to An Real Time (Transparent Mode) Clock Bn Data into B Register B Register to An (Stored Mode) Clock Bn Data into B Register and Output to An Input Output Output Input The data output functions may be enabled or disabled by various signals at the G and DIR Inputs Data input functions are always enabled i e data at the bus pins will be stored on every LOW-to-HIGH transition of the clock inputs H e HIGH Voltage Level L e LOW Voltage Level X e Irrelevant L e LOW-to-HIGH Transition 3 Logic Diagrams (Continued) ’F646 ’F646B TL F 9580 – 5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays 4 Logic Diagrams (Continued) ’F648 TL F 9580 – 6 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays 5 Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias Plastic VCC Pin Potential to Ground Pin b 65 C to a 150 b 55 C to a 125 b 55 C to a 175 b 55 C to a 150 Recommended Operating Conditions Free Air Ambient Temperature Military Commercial Supply Voltage Military Commercial b 55 C to a 125 C 0 C to a 70 C a 4 5V to a 5 5V a 4 5V to a 5 5V C C C C b 0 5V to a 7 0V b 0 5V to a 7 0V Input Voltage (Note 2) b 30 mA to a 5 0 mA Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC e 0V) b 0 5V to VCC Standard Output b 0 5V to a 5 5V TRI-STATE Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA) ESD Last Passing Voltage (Min) 4000V Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired Functional operation under these conditions is not implied Note 2 Either voltage limit or current limit is sufficient to protect inputs DC Electrical Characteristics Symbol VIH VIL VCD VOH VOL IIH IBVI IBVIT ICEX VID IOD IIL IIH a IOZH IIL a IOZL IOS IZZ ICCH ICCL ICCZ Parameter Min Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Input HIGH Current Breakdown (I O) Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current Output Leakage Current Output Leakage Current Output Short-Circuit Current Bus Drainage Test Power Supply Current Power Supply Current Power Supply Current 6 b 100 54F 74F Typ Max Units V 08 b1 2 VCC Conditions Recognized as a HIGH Signal Recognized as a LOW Signal 20 V V V Min Min Min Max Max Max Max 00 00 Max Max Max Max 0 0V Max Max Max IIN e b18 mA (Non I O Pins) IOH e b12 mA (An Bn) IOH e b15 mA (An Bn) IOL e 48 mA (An Bn) IOL e 64 mA (An Bn) VIN e 2 7V (Non I O Pins) VIN e 7 0V (Non I O Pins) VIN e 5 5V (An Bn) VOUT e VCC IID e 1 9 mA All Other Pins Grounded VIOD e 150 mV All Other Pins Grounded VIN e 0 5V (Non I O Pins) VOUT e 2 7V (An Bn) VOUT e 0 5V (An Bn) VOUT e 0V VOUT e 5 25V VO e HIGH VO e LOW VO e HIGH Z 54F 10% VCC 74F 10% VCC 54F 10% VCC 74F 10% VCC 54F 74F 54F 74F 54F 74F 54F 74F 74F 74F 20 20 0 55 0 55 20 0 50 100 70 10 05 250 50 4 75 3 75 b0 6 V mA mA mA mA V mA mA mA mA mA mA mA mA mA 70 b 650 b 225 500 135 150 150 ’F646 ’F648 AC Electrical Characteristics 74F Symbol Parameter TA e a 25 C VCC e a 5 0V CL e 50 pF Min fmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ Maximum Clock Frequency Propagation Delay Clock to Bus Propagation Delay Bus to Bus (’F646) Propagation Delay Bus to Bus (’F648) Propagation Delay SBA or SAB to A or B Enable Time OE to A or B Disable Time OE to A or B Enable Time DIR to A or B Disable Time DIR to A or B 90 20 20 10 10 20 10 20 20 20 20 10 20 20 20 10 20 70 80 70 65 85 75 85 80 85 12 0 75 90 14 0 13 0 90 11 0 Max 54F TA VCC e Mil CL e 50 pF Min 75 20 20 10 10 10 10 20 20 20 20 10 20 20 20 10 20 85 95 80 80 10 0 90 11 0 10 0 10 0 13 5 90 11 0 16 0 15 0 10 0 12 0 Max 74F TA VCC e Com CL e 50 pF Min 90 20 20 10 10 20 10 20 20 20 20 10 20 20 20 10 20 80 90 75 70 90 80 95 90 90 12 5 85 95 15 0 14 0 95 11 5 Max MHz ns ns ns ns ns ns ns ns Units ’F646 ’F648 AC Operating Requirements 74F Symbol Parameter TA e a 25 C VCC e a 5 0V Min ts(H) ts(L) th(H) th(L) tw(H) tw(L) Setup Time HIGH or LOW Bus to Clock Hold Time HIGH or LOW Bus to Clock Clock Pulse Width HIGH or LOW 50 50 20 20 50 50 Max 54F TA VCC e Mil Min 50 50 25 25 50 50 Max 74F TA VCC e Com Min 50 50 20 20 50 50 Max ns ns ns Units 7 ’F646B AC Electrical Characteristics 74F Symbol Parameter TA e a 25 C VCC e a 5 0V CL e 50 pF Min fmax tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ Maximum Clock Frequency Propagation Delay Clock to Bus Propagation Delay Bus to Bus Propagation Delay SBA or SAB to A or B Enable Time OE to A or B Disable Time OE to A or B Enable Time DIR to A or B Disable Time DIR to A or B 165 25 30 20 20 25 25 25 25 15 20 20 30 15 25 70 75 60 60 75 75 65 90 65 70 70 95 75 85 Max 54F TA VCC e Mil CL e 50 pF Min Max 74F TA VCC e Com CL e 50 pF Min 150 25 30 20 20 25 25 25 25 15 20 20 30 15 25 80 80 70 70 85 85 80 10 0 75 85 85 10 0 85 95 Max MHz ns ns ns ns ns ns ns Units ’F646B AC Operating Requirements 74F Symbol Parameter TA e a 25 C VCC e a 5 0V Min ts(H) ts(L) th(H) th(L) tw(H) tw(L) Setup Time HIGH or LOW Bus to Clock Hold Time HIGH or LOW Bus to Clock Clock Pulse Width HIGH or LOW 50 50 15 15 50 50 Max 54F TA VCC e Mil Min Max 74F TA VCC e Com Min 40 40 15 15 50 50 Max ns ns ns Units Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows 74F Temperature Range Family 74F e Commercial 54F e Military Device Type Package Code SP e Slim Plastic DIP SD e Slim Ceramic DIP S e Small Outline (SOIC) MSA e Shrink Small Outline SOIC EIAJ Type II (M646 only) L e Leadless Chip Carrier F e Flatpak 8 646 646B 648 S C X Special Variations QB e Military grade device with environmental and burn-in processing X e Devices shipped in 13 reel Temperature Range C e Commercial (0 C to a 70 C) M e Military (b55 C to a 125 C) Physical Dimensions inches (millimeters) 28-Lead Ceramic Leadless Chip Carrier Type C NS Package Number E28A 24-Lead (0 300 Wide) Ceramic Dual-In-Line Package (SD) NS Package Number J24F 9 Physical Dimensions inches (millimeters) (Continued) 24-Lead (0 300 Wide) Molded Small Outline Package JEDEC (S) NS Package Number M24B 10 Physical Dimensions inches (millimeters) (Continued) 24-Lead Molded Shrink Small Outline Package EIAJ Type II NS Package Number MSA24 24-Lead (0 300 Wide) Molded Dual-In-Line Package (SP) NS Package Number N24C 11 54F 74F646  74F646B  54F 74F648 Octal Transceiver Register with TRI-STATE Outputs Physical Dimensions inches (millimeters) (Continued) 24-Lead Cerpack NS Package Number W24C LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 2900 Semiconductor Drive P O Box 58090 Santa Clara CA 95052-8090 Tel 1(800) 272-9959 TWX (910) 339-9240 National Semiconductor GmbH Livry-Gargan-Str 10 D-82256 F4urstenfeldbruck Germany Tel (81-41) 35-0 Telex 527649 Fax (81-41) 35-1 National Semiconductor Japan Ltd Sumitomo Chemical Engineering Center Bldg 7F 1-7-1 Nakase Mihama-Ku Chiba-City Ciba Prefecture 261 Tel (043) 299-2300 Fax (043) 299-2500 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductores Do Brazil Ltda Rue Deputado Lacorda Franco 120-3A Sao Paulo-SP Brazil 05418-000 Tel (55-11) 212-5066 Telex 391-1131931 NSBR BR Fax (55-11) 212-1181 National Semiconductor (Australia) Pty Ltd Building 16 Business Park Drive Monash Business Park Nottinghill Melbourne Victoria 3168 Australia Tel (3) 558-9999 Fax (3) 558-9998 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications