74F74SC

54F 74F74 Dual D-Type Positive Edge-Triggered Flip-Flop December 1994 54F 74F74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description The ’F74 is a dual D-type flip-flop with Direct Clear and Set inputs and complementary (Q Q) outputs Information at the input is transferred to the outputs on the positive edge of the clock pulse Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse After the Clock Pulse input threshold voltage has been passed the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input Asynchronous Inputs LOW input to SD sets Q to HIGH level LOW input to CD sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on CD and SD makes both Q and Q HIGH Features Y Guaranteed 4000V minimum ESD protection Commercial 74F74PC Military Package Number N14A Package Description 14-Lead (0 300 Wide) Molded Dual-In-Line 14-Lead Ceramic Dual-In-Line 14-Lead (0 150 Wide) Molded Small Outline JEDEC 14-Lead (0 300 Wide) Molded Small Outline EIAJ 14-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C 54F74DM (Note 2) 74F74SC (Note 1) 74F74SJ (Note 1) 54F74FM (Note 2) 54F74LM (Note 2) J14A M14A M14D W14B E20A Note 1 Devices also available in 13 reel Use Suffix e SCX Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB Logic Symbols IEEE IEC TL F 9469 – 6 TL F 9469–3 TL F 9469 – 4 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9469 RRD-B30M75 Printed in U S A Connection Diagrams Pin Assignment for DIP SOIC and Flatpak Pin Assignment for LCC TL F 9469–1 TL F 9469 – 2 Unit Loading Fan Out 54F 74F Pin Names Description UL HIGH LOW 10 10 10 10 10 30 10 30 50 33 3 Input IIH IIL Output IOH IOL 20 mA b0 6 mA 20 mA b0 6 mA 20 mA b1 8 mA 20 mA b1 8 mA b 1 mA 20 mA D1 D2 CP1 CP2 CD1 CD2 SD1 SD2 Q1 Q1 Q2 Q2 Data Inputs Clock Pulse Inputs (Active Rising Edge) Direct Clear Inputs (Active LOW) Direct Set Inputs (Active LOW) Outputs Truth Table Inputs SD L H L H H H CD H L L H H H CP X X X L L L D X X X h l X Outputs H (h) e HIGH Voltage Level Q H L H H L Q0 Q L H H L H Q0 L (l) e LOW Voltage Level X e Immaterial Q0 e Previous Q (Q) before LOW-to-HIGH Clock Transition Lower case letters indicate the state of the referenced input or output one setup time prior to the LOW-to-HIGH clock transition Logic Diagram TL F 9469 – 5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays 2 Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias Plastic VCC Pin Potential to Ground Pin b 65 C to a 150 b 55 C to a 125 b 55 C to a 175 b 55 C to a 150 Recommended Operating Conditions Free Air Ambient Temperature Military Commercial Supply Voltage Military Commercial b 55 C to a 125 C 0 C to a 70 C a 4 5V to a 5 5V a 4 5V to a 5 5V C C C C b 0 5V to a 7 0V b 0 5V to a 7 0V Input Voltage (Note 2) b 30 mA to a 5 0 mA Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC e 0V) b 0 5V to VCC Standard Output b 0 5V to a 5 5V TRI-STATE Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA) ESD Last Passing Voltage (Min) 4000V Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired Functional operation under these conditions is not implied Note 2 Either voltage limit or current limit is sufficient to protect inputs DC Electrical Characteristics Symbol VIH VIL VCD VOH Parameter Min Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current Output Short-Circuit Current Power Supply Current b 60 54F 74F Typ Max Units V 08 b1 2 VCC Conditions Recognized as a HIGH Signal Recognized as a LOW Signal 20 V V V Min Min IIN e b18 mA IOH e b1 mA IOH e b1 mA IOH e b1 mA IOL e 20 mA IOL e 20 mA VIN e 2 7V VIN e 7 0V VOUT e VCC IID e 1 9 mA All Other Pins Grounded VIOD e 150 mV All Other Pins Grounded VIN e 0 5V (D CP) VIN e 0 5V (CD SD) VOUT e 0V 54F 10% VCC 74F 10% VCC 74F 5% VCC 54F 10% VCC 74F 10% VCC 54F 74F 54F 74F 54F 74F 74F 74F 25 25 27 05 05 20 0 50 100 70 250 50 4 75 3 75 b0 6 b1 8 b 150 VOL IIH IBVI ICEX VID IOD IIL IOS ICC V mA mA mA V mA mA mA mA Min Max Max Max 00 00 Max Max Max 10 5 16 0 3 AC Electrical Characteristics 74F Symbol Parameter Min fmax tPLH tPHL tPLH tPHL Maximum Clock Frequency Propagation Delay CPn to Qn or Qn Propagation Delay CDn or SDn to Qn or Qn 100 38 44 32 35 TA e a 25 C VCC e a 5 0V CL e 50 pF Typ 125 53 62 46 70 68 80 61 90 Max 54F TA VCC e Mil CL e 50 pF Min 80 38 44 32 35 85 10 5 80 11 5 Max 74F TA VCC e Com CL e 50 pF Min 100 38 44 32 35 78 92 71 10 5 Max MHz ns ns Units AC Operating Requirements 74F Symbol Parameter TA e a 25 C VCC e a 5 0V Min ts(H) ts(L) th(H) th(L) tw(H) tw(L) tw(L) trec Setup Time HIGH or LOW Dn to CPn Hold Time HIGH or LOW Dn to CPn CPn Pulse Width HIGH or LOW CDn or SDn Pulse Width LOW Recovery Time CDn or SDn to CP 20 30 10 10 40 50 40 20 Max 54F TA VCC e Mil Min 30 40 20 20 40 60 40 30 Max 74F TA VCC e Com Min 20 30 10 10 40 50 40 20 ns ns ns Max Units ns 4 Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows 74F Temperature Range Family 74F e Commercial 54F e Military Device Type Package Code P e Plastic DIP D e Ceramic DIP F e Flatpak Le Leadless Chip Carrier (LCC) S e Small Outline SOIC JEDEC SJ e Small Outline SOIC EIAJ 74 S C X Special Variations QB e Military grade device with environmental and burn-in processing X e Devices shipped in 13 reel Temperature Range C e Commercial (0 C to a 70 C) M e Military (b55 C to a 125 C) Physical Dimensions inches (millimeters) 20-Lead Ceramic Leadless Chip Carrier (L) NS Package Number E20A 5 Physical Dimensions inches (millimeters) (Continued) 14-Lead Ceramic Dual-In-Line Package (D) NS Package Number J14A 14-Lead (0 150 Wide) Molded Small Outline JEDEC (S) NS Package Number M14A 6 Physical Dimensions inches (millimeters) (Continued) 14-Lead (0 300 Wide) Molded Small Outline EIAJ (SJ) NS Package Number M14D 14-Lead (0 300 Wide) Molded Dual-In-Line Package (P) NS Package Number N14A 7 54F 74F74 Dual D-Type Positive Edge-Triggered Flip-Flop Physical Dimensions inches (millimeters) (Continued) 14-Lead Ceramic Flatpak (F) NS Package Number W14B LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 2900 Semiconductor Drive P O Box 58090 Santa Clara CA 95052-8090 Tel 1(800) 272-9959 TWX (910) 339-9240 National Semiconductor GmbH Livry-Gargan-Str 10 D-82256 F4urstenfeldbruck Germany Tel (81-41) 35-0 Telex 527649 Fax (81-41) 35-1 National Semiconductor Japan Ltd Sumitomo Chemical Engineering Center Bldg 7F 1-7-1 Nakase Mihama-Ku Chiba-City Ciba Prefecture 261 Tel (043) 299-2300 Fax (043) 299-2500 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductores Do Brazil Ltda Rue Deputado Lacorda Franco 120-3A Sao Paulo-SP Brazil 05418-000 Tel (55-11) 212-5066 Telex 391-1131931 NSBR BR Fax (55-11) 212-1181 National Semiconductor (Australia) Pty Ltd Building 16 Business Park Drive Monash Business Park Nottinghill Melbourne Victoria 3168 Australia Tel (3) 558-9999 Fax (3) 558-9998 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications