74LVX4245MTCX

74LVX4245 8-Bit Dual Supply Translating Transceiver with TRI-STATE Outputs October 1995 74LVX4245 8-Bit Dual Supply Translating Transceiver with TRI-STATE Outputs General Description The LVX4245 is a dual-supply 8-bit translating transceiver that is designed to interface between a 5V bus and a 3V bus in a mixed 3V 5V supply environment The Transmit Receive (T R) input determines the direction of data flow Transmit (active-HIGH) enables data from A ports to B ports Receive (active-LOW) enables data from B ports to A ports The Output Enable input when HIGH disables both A and B ports by placing them in a HIGH Z condition The A port interfaces with the 5V bus the B port interfaces with the 3V bus The LVX4245 is suitable for mixed voltage applications such as laptop computers using 3 3V CPU’s and 5V LCD displays Features Y Y Y Y Y Y Y Y Bidirectional interface between 5V and 3V buses Control inputs compatible with TTL level 5V data flow at A port and 3V data flow at B port Outputs source sink 24 mA at 5V bus 12 mA at 3V bus Guaranteed simultaneous switching noise level and dynamic threshold performance Available in SOIC QSOP and TSSOP packages Implements patented Quiet Series EMI reduction circuitry Functionally compatible with the 74 series 245 Logic Symbol Connection Diagram Pin Assignment for SOIC QSOP and TSSOP TL F 11540 – 1 Pin Names OE TR A0 – A7 B0 – B7 Description Output Enable Input Transmit Receive Input Side A Inputs or TRI-STATE Outputs Side B Inputs or TRI-STATE Outputs TL F 11540 – 2 SOIC JEDEC Order Number See NS Package Number 74LVX4245WM 74LVX4245WMX M24B QSOP 74LVX4245QSC 74LVX4245QSCX MQA24 TSSOP 74LVX4245MTC 74LVX4245MTCX MTC24 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 11540 RRD-B30M115 Printed in U S A Truth Table Inputs OE L L H TR L H X Bus B Data to Bus A Bus A Data to Bus B HIGH-Z State Outputs Logic Diagram TL F 11540 – 6 2 Absolute Maximum Ratings (Note) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications b 0 5V to a 7 0V Supply Voltage (VCCA VCCB) b 0 5V to VCCA a 0 5V DC Input Voltage (VI) OE T R DC Input Output Voltage (VI O) b 0 5V to VCCA a 0 5V A(n) b 0 5V to VCCB a 0 5V B(n) g 20 mA DC Input Diode Current (IIN) OE T R g 50 mA DC Output Diode Current (IOK) g 50 mA DC Output Source or Sink Current (IO) DC VCC or Ground Current g 50 mA per Output Pin (ICC or IGND) g 200 mA and Max Current ICCA g 100 mA ICCB b 65 C to a 150 C Storage Temperature Range (TSTG) g 300 mA DC Latch-Up Source or Sink Current Note The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed The device should not be operated at these limits The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation Recommended Operating Conditions Supply Voltage VCCA VCCB Input Voltage (VI) OE T R Input Output Voltage (VI O) A(n) B(n) Free Air Operating Temperature (TA) 74LVX Minimum Input Edge Rate (Dt DV) VIN from 30% to 70% of VCC VCC 3 0V 4 5V 5 5V 4 5V to 5 5V 2 7V to 3 6V 0V to VCCA 0V to VCCA 0V to VCCB b 40 C to a 85 C 8 ns V DC Electrical Characteristics 74LVX4245 Symbol Parameter VCCA (V) VCCB (V) TA a 25 C Typ VIHA VIHB VILA VILB VOHA VOHB Minimum High Level Output Voltage Minimum High Level Input Voltage A(n) T R OE B(n) A(n) T R OE B(n) 55 45 50 50 55 45 50 50 45 45 45 45 45 Maximum Low Level Output Voltage 45 45 45 45 45 Maximum Input Leakage Current OE T R Maximum TRI-STATE Output Leakage A(n) 55 33 33 36 27 33 33 27 36 30 30 30 30 27 30 30 30 30 27 36 45 4 25 2 99 28 25 0 002 0 18 0 002 01 01 74LVX4245 TA e b40 C to a 85 C Units Conditions Guaranteed Limits 20 20 20 20 08 08 08 08 44 3 86 29 24 24 01 0 36 01 0 31 0 31 g0 1 20 20 20 20 08 08 08 08 44 3 76 29 24 24 01 0 44 01 04 04 g1 0 V VOUT s 0 1V or t VCC b 0 1V Maximum Low Level Input Voltage V VOUT s 0 1V or t VCC b 0 1V V IOUT e b100 mA IOH e b24 mA IOUT e b100 mA IOH e b12 mA IOL e b8 mA IOUT e 100 mA IOL e 24 mA IOUT e 100 mA IOL e 12 mA IOL e 8 mA VI e VCCA GND V VOLA VOLB V V IIN mA VI e VIL VIH OE e VCCA VO e VCCA GND IOZA 55 36 g0 5 g5 0 mA 3 DC Electrical Characteristics (Continued) 74LVX4245 Symbol Parameter VCCA (V) VCCB (V) TA e a 25 C Typ IOZB Maximum TRI-STATE Output Leakage B(n) Maximum ICCT Input A(n) T R OE Input ICCA B(n) 55 36 74LVX4245 TA e b40 C to a 85 C Units Conditions Guaranteed Limits g0 5 g5 0 mA VI e VIL VIH OE e VCCA VO e VCCB GND VI e VCCA b 2 1V VI e VCCB b 0 6V A(n) e VCCA or GND B(n) e VCCB or GND OE e GND T R e GND A(n) e VCCA or GND B(n) e VCCB or GND OE e GND T R e VCCA (Notes 1 2) (Notes 1 2) (Notes 1 3) (Notes 1 3) DICC 55 55 55 36 36 36 10 1 35 0 35 8 15 05 80 mA mA mA Quiescent VCCA Supply Current Quiescent VCCB Supply Current Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum High Level Dynamic Input Voltage Maximum Low Level Dynamic Input Voltage ICCB 55 50 50 50 50 50 50 50 50 36 33 33 33 33 33 33 33 33 5 15 08 b1 2 b0 8 50 mA VOLPA VOLPB VOLVA VOLVB VIHDA VIHDB VILDA VILDB V V V V 20 20 08 08 Maximum test duration 2 0 ms one output loaded at a time Note 1 Worst case package Note 2 Max number of outputs defined as (n) Data inputs are driven 0V to VCC level one output at GND Note 3 Max number of Data Inputs (n) switching (n b 1) inputs switching 0V to VCC level Input-under-test switching VCC level to threshold (VIHD) OV to threshold (VILD) f e 1 MHz 4 AC Electrical Characteristics 74LVX4245 TA e a 25 C CL e 50 pF VCCA e 5V VCCB e 3 3V Min tPHL tPLH tPHL tPLH tPZL tPZH tPZL tPZH tPHZ tPLZ tPHZ tPLZ tOSHL tOSLH Propagation Delay A to B Propagation Delay B to A Output Enable Time OE to B Output Enable Time OE to A Output Disable Time OE to B Output Disable Time OE to A Output to Output Skew Data to Output 10 10 10 10 10 10 10 10 10 10 10 10 Typ 51 53 54 55 65 67 52 58 60 33 39 29 10 Max 85 85 85 85 10 0 10 0 90 90 95 65 70 65 15 74LVX4245 TA e b40 C to a 85 C CL e 50 pF VCCA e 5V VCCB e 3 3V Min 10 10 10 10 10 10 10 10 10 10 10 10 Max 90 90 90 90 10 5 10 5 95 95 10 0 70 75 70 15 74LVX4245 TA e b40 C to a 85 C CL e 50 pF VCCA e 5V VCCB e 2 7V Min 10 10 10 10 10 10 10 10 10 10 10 10 Max 10 0 10 0 10 0 10 0 11 5 11 5 10 0 10 0 10 0 75 75 75 15 ns ns ns ns ns ns Symbol Parameters Units ns Voltage Range 5 0V is 5 0V g 0 5V Voltage Range 3 3V is 3 3V g 0 3V Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device The specification applies to any outputs switching in the same direction either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH) Parameter guaranteed by design Capacitance Symbol CIN CI O CPD Parameter Input Capacitance Input Output Capacitance Power Dissipation Capacitance BxA AxB Typ 45 15 55 40 Units pF pF pF pF Conditions VCC e Open VCCA e 5 0V VCCB e 3 3V VCCA e 5 0V VCCB e 3 3V CPD is measured at 10 MHz 8-Bit Dual Supply Translating Transceiver The LVX4245 is a dual supply device capable of bidirectional signal translation This level shifting ability provides an efficient interface between low voltage CPU local bus with memory and a standard bus defined by 5V I O levels The device control inputs can be controlled by either the low voltage CPU and core logic or a bus arbitrator with 5V I O levels Manufactured on a sub-micron CMOS process the LVX4245 is ideal for mixed voltage applications such as notebook computers using 3 3V CPU’s and 5V peripheral devices TL F 11540 – 3 5 Applications Mixed Mode Dual Supply Interface Solution LVX4245 is designed to solve 3V 5V interfacing issues when CMOS devices cannot tolerate I O levels above their applied VCC If an I O pin of 3V ICs is driven by 5V ICs the P-Channel transistor in 3V ICs will conduct causing current flow from I O bus to the 3V power supply The resulting high current flow can cause destruction of 3V ICs through latchup effects To prevent this problem a current limiting resistor is used typically under direct connection of 3V ICs and 5V ICs but it causes speed degradation In a better solution the LVX4245 configures two different output levels to handle the dual supply interface issues The ‘‘A’’ port is a dedicated 5V port to interface 5V ICs The ‘‘B’’ port is a dedicated port to interface 3V ICs Figure 1 shows how LVX4245 fits into a system with 3V subsystem and 5V subsystem This device is also configured as an 8-bit 245 transceiver giving the designer TRI-STATE capabilities and the ability to select either bidirectional or unidirectional modes Since the center 20 pins are also pin compatible to 74 series 245 as shown in Figure 2 the designer could use this device in either a 3V system or a 5V system without any further work to re-layout the board TL F 11540 – 4 FIGURE 2 LVX4245 Pin Arrangment is Compatible to 20-Pin 74 Series 245 TL F 11540 – 5 FIGURE 1 LVX4245 Fits into a System with 3V Subsystem and 5V Subsystem 6 74LVX4245 Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows 74LVX Temperature Range Family 74 e Commercial Device Type Package Code WM e Small Outline JEDEC SOIC (0 300 Wide) QSC e Molded Shrink Small Outline Package JEDEC (also known as QSOP) 4245 MW X Special Variations ‘‘X’’ e Tape and Reel ‘‘ ’’ e Rail Tube inches Physical Dimensions millimeters 24-Lead (0 300 Wide) Small Outline Package (WM) Order Number 74LVX4245WM or 74LVX4245WMX NS Package Number M24B 7 74LVX4245 8-Bit Dual Supply Translating Transceiver with TRI-STATE Outputs Physical Dimensions inches (Continued) 24-Lead Molded Shrink Small Outline Package JEDEC (QSC) (also known as QSOP) Order Number 74LVX4245QSC or 74LVX4245QSCX NS Package Number MQA24 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(a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications