9308J

9308 DM9308 Dual 4-Bit Latch June 1989 9308 DM9308 Dual 4-Bit Latch General Description The 9308 is a dual 4-bit D-type latch designed for general purpose storage applications in digital systems Each latch contains both an active LOW Master Reset input an active LOW Enable inputs The 74116 is a pin for pin equivalent of the 9308 Connection Diagram Dual-In-Line Package Logic Symbol TL F 10208 – 2 VCC e Pin 24 GND e Pin 12 TL F 10208 – 1 Order Number 9308DMQB 9308FMQB or DM9308N See NS Package Number J24A N24A or W24C Pin Names D0a – D3a D0b – D3b E0a E1a E0b E1b MRa MRb Q0a – Q3a Q0b – Q3b Description Parallel Latch Inputs AND Enable Inputs (Active LOW) Master Reset Inputs (Active LOW) Parallel Latch Outputs ( ( C1995 National Semiconductor Corporation TL F 10208 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage 7V Input Voltage 5 5V Operating Free Air Temperature Range b 55 C to a 125 C MIL COM 0 C to a 70 C Storage Temperature Range b 65 C to a 150 C Note The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed The device should not be operated at these limits The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation Recommended Operating Conditions Symbol VCC VIH VIL IOH IOL TA ts (H) th (H) ts (L) th (L) tw (L) tw (L) trec Parameter Min Supply Voltage High Level Input Voltage Low Level Input Voltage High Level Output Current Low Level Output Current Free Air Operating Temperature Setup Time HIGH Dn to En Hold Time HIGH Dn to En Setup Time LOW Dn to En Hold Time LOW Dn to En En Pulse Width LOW MR Pulse Width LOW Recovery Time MR to En b 55 Military Nom 5 Max 55 Min 4 75 2 08 b0 8 Commercial Nom 5 Max 5 25 Units V V 08 b0 8 45 2 V mA mA C ns ns ns ns ns ns ns 16 125 0 10 b2 0 16 70 6 4 10 4 18 18 10 12 8 18 18 8 Electrical Characteristics over recommended operating free air temperature (unless otherwise noted) Symbol VI VOH VOL II IIH IIL IOS ICC Parameter Input Clamp Voltage High Level Output Voltage Low Level Output Voltage Input Current Input Voltage Max Conditions VCC e Min II e b18 mA VCC e Min IOH e Max VIL e Max VIH e Min VCC e Min IOL e Max VIH e Min VIL e Max VCC e Max VI e 5 5V VCC e Max VI e 2 4V VCC e Max VI e 0 4V VCC e Max (Note 2) VCC e Max (Note 3) MIL COM b 20 b 20 Min Typ (Note 1) Max b1 5 Units V V 24 04 1 40 b1 6 b 70 b 57 V mA mA mA mA mA High Level Input Current Low Level Input Current Short Circuit Output Current Supply Current 100 Note 1 All typicals are at VCC e 5V TA e 25 C Note 2 Not more than one output should be shorted at a time and the duration should not exceed one second Note 3 ICC is measured with all outputs open and all inputs grounded 2 Functional Description Data can be entered into the latch when both of the enable inputs are LOW As long as this logic condition exists the output of the latch will follow the input If either of the enable inputs goes HIGH the data present in the latch at that time is held in the latch and is no longer affected by data input The master reset overrides all other input conditions and forces the outputs of all the latches LOW when a LOW signal is applied to the Master Reset input Truth Table MR H H H H H L E0 L L L H H X E1 L L H L H X D L H X X X X Qn L H Qnb1 Qnb1 Qnb1 L Operation Data Entry Data Entry Hold Hold Hold Reset Qnb1 e Previous Output State Qn e Present Output State H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial Logic Diagram TL F 10208 – 3 Switching Characteristics VCC e a 5 0V Symbol Parameter TA e a 25 C (See Section 5 for test waveforms and output load ) 9308 CL e 15 pF RL e 400X Min Max 30 22 15 18 22 ns ns ns Units tPLH tPHL tPLH tPHL tPHL Propagation Delay En to Qn Propagation Delay Dn to Qn Propagation Delay MR to Qn 3 4 Physical Dimensions inches (millimeters) 24-Lead Ceramic Dual-In-Line Package (J) Order Number 9308DMQB NS Package Number J24A 24-Lead Molded Dual-In-Line Package (N) Order Number DM9308N NS Package Number N24A 5 9308 DM9308 Dual 4-Bit Latch Physical Dimensions inches (millimeters) (Continued) 24-Lead Ceramic Flat Package (W) Order Number 9308FMQB NS Package Number W24C LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax (a49) 0-180-530 85 86 Email cnjwge tevm2 nsc com Deutsch Tel (a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications