ADC12EU050CILQ

ADC12EU050 Ultra-Low Power, Octal, 12-bit, 40-50 MSPS Analog-to-Digital Converter ADVANCE INFORMATION January 25, 2008 ADC12EU050 Ultra-Low Power, Octal, 12-bit, 40-50 MSPS Analog-toDigital Converter General Description NOTE: This is Advance Information for a product currently in development. ALL specifications are design targets and are subject to change. The ADC12EU050 is a 12-bit, ultra-low power, octal A/D converter for use in high performance analog to digital applications. The ADC12EU050 uses an innovative continuous time sigma delta architecture offering ultra low power consumption and an alias free sample bandwidth up to 25MHz. The input stage of each channel features a proprietary system to ensure instantaneous recovery from overdrive. Instant overload recovery (IOR) with no memory effect guarantees the elimination of phase errors resulting from out of range input signals. The ADC12EU050 reduces interconnection complexity by using programmable serialized outputs which offer the industry standard LVDS and SLVS modes. Power consumption of only 44mW per channel(@ 50MSPS) gives a total chip power consumption of 350mW. The ADC12EU050 can operate entirely from a 1.2V supply, although a separate output driver supply of up to 1.8V can be used. The device operates from -40 to +85 °C and is supplied in a 10 x 10 mm2, 68 pin package. Features ■ ■ ■ ■ ■ ■ ■ CT∑ΔADC architecture with 40-50MSPS throughput Anti-alias filter free Nyquist sample range Unique Instant Overload Recovery (IOR) Wide 2.10 VPP input range 1.2V supply voltage Integrated precision LC PLL Serial control via SPI compatible interface Key Specifications ■ ■ ■ ■ ■ ■ ■ 12 Bits 40 to 50 MSPS 70 dBFS (typ) @ (fIN = 3.5MHz) –70 dB (typ) @ (fIN = 3.5MHz) 44 mW/ch (typ) @ 50MSPS 40 mW/ch (typ) @ 40MSPS Total Active Power 350 mW (typ) @ 50MSPS Consumption (Equalizer off) >110 dB @ (fIN = 3.5MHz) ■ Inter-Channel Isolation -40 to +85 °C ■ Operating Temp. Range Resolution Conversion Rate SNR THD Power Consumption Applications ■ ■ ■ ■ Battery powered portable systems Medical imaging, ultrasound Industrial ultrasound, such as non-destructive testing Communications © 2008 National Semiconductor Corporation 300511 www.national.com ADC12EU050 Block Diagram 30051102 www.national.com 2 ADC12EU050 Connection Diagram 30051101 Ordering Information Industrial (−40°C ≤ TA ≤ +85°C) ADC12EU050CILQ Note: The ADC12EU050 evaluation systems comprise a fully populated & tested device board (DUT), a data capture card with USB 2.0 interface, a SPI control daughter board, Merlin® time and frequency Package 68 Pin LLP domain measurement software and 2 USB connection cables. The ADC12EU050 evaluation kit is not compatible with National Semiconductor’s Wavevision capture board and software. 3 www.national.com ADC12EU050 Pin Descriptions Pin No. ANALOG I/O 2 3 67 68 64 65 61 62 58 59 55 56 52 53 49 50 VIN0+ VIN0VIN1+ VIN1VIN2+ VIN2VIN3+ VIN3VIN4+ VIN4VIN5+ VIN5VIN6+ VIN6VIN7+ VIN7VREFB Name Type Function and Connection Input Differential analog inputs to the ADC, for channels 0 to 7. The negative input pin may be connected to AGND or the inputs may be transformer coupled for single ended operation. A differential input is recommended for best performance. 4 Optional negative reference voltage to improve multi-channel ADC matching. If no reference is supplied, this pin must be connected to AGND. Optional positive reference voltage to improve multi-channel ADC matching. If using the internal reference, this pin should be left unconnected. If using an external reference voltage, this pin should be connected to the positive reference voltage, which must lie in the range specified in the Electrical Characteristics table. This pin provides the capacitance for the low pass filter in the modulator’s DAC. It must be connected to AGND through a minimum 100nF capacitor. It is possible to decrease the noise close to the carrier by increasing this capacitor, up to a maximum of 10μF. External bias reference resistor. This pin must always be connected to AGND through a resistor, whether the internal or an external reference voltage is used. The resistor value must be 10kΩ ±1%. This pin is an active low reset for the entire ADC, both analog and digital components. The pin must be held low for 500ns then returned to high in order to ensure that the chip is reset correctly. Sleep mode. Toggling this pin to high will cause the ADC to enter the low power sleep mode. When the pin is returned to low, the chip will, after the specified time to exit sleep mode, return to normal operation. 5 VREFT 6 DCAP Input 7 RREF Input/Output DIGITAL I/O 9 RST Input 10 SLEEP Input www.national.com 4 ADC12EU050 Pin No. 15 16 18 19 20 21 23 24 25 26 28 29 31 32 33 34 Name DO0+ DO0DO1+ DO1DO2+ DO2DO3+ DO3DO4+ DO4DO5+ DO5DO6+ DO6DO7+ DO7- Type Function and Connection Output Differential Serial Outputs for channels 0 to 7. Each pair of outputs provides the serial output for the specific channel. The default output is LVDS format, but programming the appropriate control registers, the output format can be changed to SLVS. By programming TX_term (bit 4) in the LVDS Control register, it is possible to internally terminate these outputs with 100 ohm resistors. 36 37 BCLK+ BCLK- Output Bit clock. Differential output clock to be used for sampling the serial outputs. Information on timing can be seen in the Electrical Specifications section of the datasheet. By programming TX_term (bit 4) in the LVDS Control register, it is possible to internally terminate these outputs with 100 ohm resistors. Word Clock. Differential output frame clock. Information on timing can be seen in the Electrical Specifications section of the datasheet. By programming TX_term (bit 4) in the LVDS Control register, it is possible to internally terminate these outputs with 100 ohm resistors. SPI data input and output. This pin is used to send and receive SPI address and data information. The direction of the pin is controlled internally by the ADC based on the SPI protocol. SPI clock. In order to use the SPI interface, a clock must be provided on this pin. The maximum frequency of operation for the serial interface is 1MHz. SPI chip select. This active low pin is used to enable the serial interface. Differential Input Clock. The input clock must lie in the range of 40MHz to 50MHz. It is used by the PLL to generate the internal sampling clocks. A single ended clock can also be used, and should be connected to pin 47. Analog Power Supply. All pins should be connected to the same 1.2V supply, with voltage limits as in the Electrical Specification. Analog Ground Return. Digital Power Supply. Connect to 1.2V, with voltage limits as in the Electrical Specification. Digital and Output Driver Ground Return. Output Driver Power Supply. Can be connected to 1.2V – 1.8V, depending on application requirements. Voltage limits are described in more detail in the Electrical Specification. 38 39 WCLK+ WCLK- Output 44 SDATA Input/Output 45 SCLK SSEL CLK+ (SE) CLK- Input 46 Input 47 48 POWER SUPPLY 1, 8, 51, 54, 57, 60, 63, 66 0 11, 12, 42, 43 13, 14, 22, 30, 40, 41 17, 27, 35 Input VA AGND VD DGND Power Ground Power Ground VDR Power 5 www.national.com ADC12EU050 Physical Dimensions inches (millimeters) unless otherwise noted TOP View...............................SIDE View...............................BOTTOM View 68-Lead LLP Package 10x10x1.0mm, 0.5mm Pitch Ordering Numbers ADC12EU050CILQ NS Package Number LQA68A www.national.com 6 ADC12EU050 Notes 7 www.national.com ADC12EU050 Ultra-Low Power, Octal, 12-bit, 40-50 MSPS Analog-to-Digital Converter Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Amplifiers Audio Clock Conditioners Data Converters Displays Ethernet Interface LVDS Power Management Switching Regulators LDOs LED Lighting PowerWise Serial Digital Interface (SDI) Temperature Sensors Wireless (PLL/VCO) www.national.com/amplifiers www.national.com/audio www.national.com/timing www.national.com/adc www.national.com/displays www.national.com/ethernet www.national.com/interface www.national.com/lvds www.national.com/power www.national.com/switchers www.national.com/ldo www.national.com/led www.national.com/powerwise www.national.com/sdi www.national.com/tempsensors www.national.com/wireless WEBENCH Analog University App Notes Distributors Green Compliance Packaging Design Support www.national.com/webench www.national.com/AU www.national.com/appnotes www.national.com/contacts www.national.com/quality/green www.national.com/packaging www.national.com/quality www.national.com/refdesigns www.national.com/feedback Quality and Reliability Reference Designs Feedback THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS, IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT NATIONAL’S PRODUCT WARRANTY. EXCEPT WHERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL PARAMETERS OF EACH PRODUCT IS NOT NECESSARILY PERFORMED. NATIONAL ASSUMES NO LIABILITY FOR APPLICATIONS ASSISTANCE OR BUYER PRODUCT DESIGN. BUYERS ARE RESPONSIBLE FOR THEIR PRODUCTS AND APPLICATIONS USING NATIONAL COMPONENTS. PRIOR TO USING OR DISTRIBUTING ANY PRODUCTS THAT INCLUDE NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING AND OPERATING SAFEGUARDS. EXCEPT AS PROVIDED IN NATIONAL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NATIONAL ASSUMES NO LIABILITY WHATSOEVER, AND NATIONAL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO THE SALE AND/OR USE OF NATIONAL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. Copyright© 2008 National Semiconductor Corporation For the most current product information visit us at www.national.com National Semiconductor Americas Technical Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 www.national.com National Semiconductor Europe Technical Support Center Email: europe.support@nsc.com German Tel: +49 (0) 180 5010 771 English Tel: +44 (0) 870 850 4288 National Semiconductor Asia Pacific Technical Support Center Email: ap.support@nsc.com National Semiconductor Japan Technical Support Center Email: jpn.feedback@nsc.com