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CD4023M

CD4023M

  • 厂商:

    NSC

  • 封装:

  • 描述:

    CD4023M - Triple 3-Input NAND(NOR) Gate - National Semiconductor

  • 数据手册
  • 价格&库存
CD4023M 数据手册
CD4023M CD4023C Triple 3-Input NAND Gate CD4025M CD4025C Triple 3-Input NOR Gate February 1988 CD4023M CD4023C Triple 3-Input NAND Gate CD4025M CD4025C Triple 3-Input NOR Gate General Description These triple gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors All inputs are protected against static discharge with diodes to VDD and VSS Features Y Y Y Y Wide supply voltage range High noise immunity 5V – 10V parametric ratings Low power 3 0V to 15V 0 45 VDD (typ ) Connection Diagrams Dual-In-Line Packages CD4023M CD4023C CD4025M CD4025C TL F 5955 – 1 TL F 5955 – 2 Top View Order Number CD4023 or CD4025 Top View C1995 National Semiconductor Corporation TL F 5955 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Voltage at Any Pin Operating Temperature Range CD4023M CD4025M CD4023C CD4025C VSSb to VDD a 0 3V b 55 C to a 125 C b 40 C to a 85 C Storage Temperature Range Power Dissipation (PD) Dual-In-Line Small Outline Operating VDD Range Lead Temperature (Soldering 10 seconds) b 65 C to a 150 C 700 mW 500 mW VSS a 3 0V to VSS a 15V 260 C DC Electrical Characteristics CD4023M Symbol Parameter Conditions CD4025M Limits b 55 C a 25 C a 125 C Units Min IL PD VOL VOH VNL VNH IDN IDP IDN IDP II Quiescent Device Current Quiescent Device Dissipation Package Output Voltage Low Level Output Voltage High Level Noise Immunity (All Inputs) Noise Immunity (All Inputs) VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VDD e 5 0V VI e VDD IO e 0A VDD e 10V VI e VDD IO e 0A VDD e 5 0V VI e VSS IO e 0A VDD e 10V VI e VSS IO e 0A VDD e 5 0V VO e 3 6V IO e 0A VDD e 10V VO e 7 2V IO e 0A VDD e 5 0V VO e 0 95V IO e 0A VDD e 10V VO e 2 9V IO e 0A 4 95 9 95 15 30 14 29 05 11 Max 0 05 01 0 25 10 0 05 0 05 Min Typ Max Min Max 30 60 15 60 0 05 0 05 mA mA mW mW V V V V V V V V mA mA mA mA mA mA mA mA pA 0 001 0 05 0 001 0 1 0 005 0 25 0 01 1 0 0 0 4 95 9 95 15 30 15 30 0 40 09 b0 5 b0 5 0 05 0 05 4 95 9 95 14 29 15 30 0 28 0 65 b 0 35 b 0 35 50 10 2 25 45 2 25 45 10 25 b2 0 b1 0 Output Drive Current VDD e 5 0V VO e 0 4V VI e VDD N-Channel (4025) (Note 2) VDD e 10V VO e 0 5V VI e VDD Output Drive Current VDD e 5 0V VO e 2 5V VI e VSS b0 62 P-Channel (4025) (Note 2) VDD e 10V VO e 9 5V VI e VSS b0 62 Output Drive Current VDD e 5 0V VO e 0 4V VI e VDD N-Channel (4023) (Note 2) VDD e 10V VO e 0 5V VI e VDD 0 31 0 63 0 25 05 05 06 0 175 0 35 b 0 175 b0 4 Output Drive Current VDD e 5 0V VO e 2 5V VI e VSS b0 31 P-Channel (4023) (Note 2) VDD e 10V VO e 9 5V VI e VSS b0 75 Input Current b 0 25 b 0 5 b0 6 b1 2 10 Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed They are not meant to imply that the devices should be operated at these limits The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for actual device operation Note 2 IDN and IDP are tested one output at a time 2 DC Electrical Characteristics CD4023C Symbol Parameter Conditions CD4025C Limits b 40 C a 25 C a 85 C Units Min IL PD VOL VOH II VNL VNH IDN IDP IDN IDP II Quiescent Device Current Quiescent Device Dissipation Package Output Voltage Low Level Output Voltage High Level Input Current Noise Immunity (All Inputs) Noise Immunity (All Inputs) VDD e 5 0V VO e 3 6V IO e 0A VDD e 10V VO e 7 2V IO e 0A VDD e 5 0V VO e 0 95V IO e 0A VDD e 10V VO e 2 9V IO e 0A 15 30 14 29 0 35 0 72 b 0 35 b0 3 Max 0 05 50 25 50 0 01 0 01 Min Typ Max Min Max 15 30 75 300 0 05 0 05 mA mA mW mW V V V V pA VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VDD e 5 0V VI e VDD IO e 0A VDD e 10V VI e VDD IO e 0A VDD e 5 0V VI e VSS IO e 0A VDD e 10V VI e VSS IO e 0A 4 99 9 99 0 005 0 5 0 005 5 0 0 025 2 5 0 05 50 0 0 4 99 9 99 50 10 10 15 30 15 30 03 06 2 25 45 2 25 45 10 25 14 29 15 30 0 24 0 48 b 0 24 b0 2 0 01 0 01 4 95 9 95 V V V V mA mA mA mA mA mA mA mA pA Output Drive Current VDD e 5 0V VO e 0 4V VI e VDD N-Channel (4025) (Note 2) VDD e 10V VO e 0 5V VI e VDD Output Drive Current VDD e 5 0V VO e 2 5V VI e VSS P-Channel (4025) (Note 2) VDD e 10V VO e 9 5V VI e VSS Output Drive Current VDD e 5 0V VO e 0 4V VI e VDD N-Channel (4023) (Note 2) VDD e 10V VO e 0 5V VI e VDD b0 3 b2 0 b 0 25 b 1 0 0 145 03 0 12 0 25 05 06 0 095 02 b 0 095 b 0 24 Output Drive Current VDD e 5 0V VO e 2 5V VI e VSS b0 145 P-Channel (4023) (Note 2) VDD e 10V VO e 9 5V VI e VSS b0 35 Input Current b 0 12 b 0 5 b0 3 b1 2 10 Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed They are not meant to imply that the devices should be operated at these limits The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for actual device operation Note 2 IDN and IDP are tested one output at a time 3 AC Electrical Characteristics TA e 25 C CL e 15 pF and input rise and fall times e 20 ns Typical temperature coefficient for all values of VDD e 0 3% C Symbol CD4025M tPHL tPLH tTHL tTLH CI CD4025C tPHL tPLH tTHL tTLH CI CD4023M tPHL tPLH tTHL tTLH CI CD4023C tPHL tPLH tTHL tTLH CI Propagation Delay Time High to Low Level Propagation Delay Time Low to High Level Transition Time High to Low Level Transition Time Low to High Level Input Capacitance VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V Any Input 50 25 50 25 75 50 75 40 50 100 50 100 50 150 100 125 75 ns ns ns ns ns ns ns ns pF Propagation Delay Time High to Low Level Propagation Delay Time Low to High Level Transition Time High to Low Level Transition Time Low to High Level Input Capacitance VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V Any Input 50 25 50 25 75 50 75 40 50 75 40 75 40 125 75 100 60 ns ns ns ns ns ns ns ns pF Propagation Delay Time High to Low Level Propagation Delay Time Low to High Level Transition Time High to Low Level Transition Time Low to High Level Input Capacitance VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V Any Input 35 25 35 25 65 35 65 35 50 80 55 120 65 200 115 300 125 ns ns ns ns ns ns ns ns pF Propagation Delay Time High to Low Level Propagation Delay Time Low to High Level Transition Time High to Low Level Transition Time Low to High Level Input Capacitance VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V Any Input 35 25 35 25 65 35 65 35 50 50 40 40 70 125 70 175 75 ns ns ns ns ns ns ns ns pF Parameter Conditions Min Typ Max Units AC Parameters are guaranteed by DC correlated testing 4 Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number CD4023MJ CD4023CJ CD4025MJ or CD4025CJ NS Package Number J14A 5 CD4023M CD4023C Triple 3-Input NAND Gate CD4025M CD4025C Triple 3-Input NOR Gate Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number CD4023MN CD4023CN CD4025MN or CD4025CN NS Package Number N14A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax (a49) 0-180-530 85 86 Email cnjwge tevm2 nsc com Deutsch Tel (a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications
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