CD4029BM CD4029BC Presettable Binary Decade Up Down Counter
February 1988
CD4029BM CD4029BC Presettable Binary Decade Up Down Counter
General Description
The CD4029BM CD4029BC is a presettable up down counter which counts in either binary or decade mode depending on the voltage level applied at binary decade input When binary decade is at logical ‘‘1’’ the counter counts in binary otherwise it counts in decade Similarly the counter counts up when the up down input is at logical ‘‘1’’ and vice versa A logical ‘‘1’’ preset enable signal allows information at the ‘‘jam’’ inputs to preset the counter to any state asynchronously with the clock The counter is advanced one count at the positive-going edge of the clock if the carry in and preset enable inputs are at logical ‘‘0’’ Advancement is inhibited when either or both of these two inputs is at logical ‘‘1’’ The carry out signal is normally at logical ‘‘1’’ state and goes to logical ‘‘0’’ state when the counter reaches its maximum count in the ‘‘up’’ mode or the minimum count in the ‘‘down’’ mode provided the carry input is at logical ‘‘0’’ state All inputs are protected against static discharge by diode clamps to both VDD and VSS
Features
Y Y Y
Wide supply voltage range High noise immunity Low power TTL compatibility
3V to 15V 0 45 VDD (typ ) fan out of 2 driving 74L or 1 driving 74LS
Y Y
Parallel jam inputs Binary or BCD decade up down counting
Logic Diagram
TL F 5960 – 1
C1995 National Semiconductor Corporation
TL F 5960
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings
(Notes 1 and 2) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications b 0 5V to a 18 VDC DC Supply Voltage (VDD)
b 0 5V to VDD a 0 5 VDC Input Voltage (VIN) b 65 C to a 150 C Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line 700 mW Small Outline 500 mW Lead Temperature (TL) (Soldering 10 seconds) 260 C
Recommended Operating Conditions (Note 2)
DC Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) CD4029BM CD4029BC 3V to 15 VDC 0V to VDD VDC
b 55 C to a 125 C b 40 C to a 85 C
DC Electrical Characteristics CD4029BM (Note 2)
Symbol IDD Parameter Conditions
b 55 C a 25 C a 125 C
Units mA mA mA V V V V V V
Min Quiescent Device Current VDD e 5V VDD e 10V VDD e 15V Low Level Output Voltage
Max 5 10 20 0 05 0 05 0 05
Min
Typ
Max 5 10 20
Min 5
Max 150 300 600 0 05 0 05 0 05
VOL
l IO l k 1 m A VDD e 5V VDD e 10V VDD e 15V l IO l k 1 m A VDD e 5V VDD e 10V VDD e 15V
VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1V or 9V VDD e 15V VO e 1 5V or 13 5V VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1V or 9V VDD e 15V VO e 1 5V or 13 5V VDD e 5V VO e 0 4V VDD e 10V VO e 0 5V VDD e 15V VO e 1 5V VDD e 5V VO e 4 6V VDD e 10V VO e 9 5V VDD e 15V VO e 13 5V VDD e 15V VIN e 0V VDD e 15V VIN e 15V 35 70 11 0 0 64 16 42
b 0 64 b1 6 b4 2
0 0 0 4 95 9 95 14 95 5 10 15
0 05 0 05 0 05 4 95 9 95 14 95 15 30 40
VOH
High Level Output Voltage
4 95 9 95 14 95 15 30 40
VIL
Low Level Input Voltage High Level Input Voltage Low Level Output Current (Note 3) High Level Output Current (Note 3) Input Current
15 30 40 35 70 11 0
V V V V V V mA mA mA mA mA mA
VIH
35 70 11 0 0 51 13 34
b 0 51 b1 3 b3 4 b0 1
IOL
0 88 2 25 88
b 0 88 b 2 25 b8 8 b 10 b 5 b 0 1
0 36 09 24
b 0 36 b0 9 b2 4 b1 0
IOH
IIN
01
10b5
01
10
mA mA
DC Electrical Characteristics CD4029BC (Note 2)
Symbol IDD Parameter Quiescent Device Current Conditions VDD e 5V VDD e 10V VDD e 15V
b 40 C a 25 C a 85 C
Units mA mA mA V V V V V V
Min
Max 20 40 80 0 05 0 05 0 05
Min
Typ
Max 20 40 80
Min
Max 150 300 600 0 05 0 05 0 05
VOL
Low Level Output Voltage
l IO l k 1 m A VDD e 5V VDD e 10V VDD e 15V l IO l k 1 m A VDD e 5V VDD e 10V VDD e 15V
4 95 9 95 14 95
0 0 0 4 95 9 95 14 95 5 10 15
0 05 0 05 0 05 4 95 9 95 14 95
VOH
High Level Output Voltage
Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation Note 2 VSS e 0V unless otherwise specified Note 3 IOH and IOL are tested one output at a time
2
DC Electrical Characteristics CD4029BC (Note 2) (Continued)
Symbol VIL Parameter Low Level Input Voltage High Level Input Voltage Low Level Output Current (Note 3) High Level Output Current (Note 3) Input Current Conditions VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1V or 9V VDD e 15V VO e 1 5V or 13 5V VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1V or 9V VDD e 15V VO e 1 5V or 13 5V VDD e 5V VO e 0 4V VDD e 10V VO e 0 5V VDD e 15V VO e 1 5V VDD e 5V VO e 4 6V VDD e 10V VO e 9 5V VDD e 15V VO e 13 5V VDD e 15V VIN e 0V VDD e 15V VIN e 15V 35 70 11 0 0 52 13 36
b 0 52 b1 3 b3 6 b0 3 b 40 C a 25 C a 85 C
Units V V V V V V mA mA mA mA mA mA
Min
Max 15 30 40
Min
Typ
Max 15 30 40
Min
Max 15 30 40
VIH
35 70 11 0 0 44 11 30
b 0 44 b1 1 b3 0
35 70 11 0 0 88 2 25 88
b 0 88 b 2 25 b8 8 b 10 b 5 b0 3
IOL
0 36 09 24
b 0 36 b0 9 b2 4 b1 0
IOH
IIN
03
10b5
03
10
mA mA
AC Electrical Characteristics
TA e 25 C CL e 50 pF RL e 200k Input trCL e tfCL e 20 ns unless otherwise specified Symbol CLOCKED OPERATION tPHL or tPLH Propagation Delay Time to Q Outputs Propagation Delay Time to Carry Output Propagation Delay Time to Carry Output VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V CL e 15 pF VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V Any Input Per Package (Note 4) 15 37 45 15 10 5 180 70 55 31 74 9 5 65 75 360 140 110 200 85 70 320 135 110 285 120 95 100 50 40 160 70 55 400 170 140 640 270 220 570 240 190 200 100 80 320 135 110 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms ms ms ns ns ns MHz MHz MHz pF pF Parameter Conditions Min Typ Max Units
tPHL or tPLH
tPHL or tPLH
tTHL or tTLH
Transition Time Q or Carry Output Minimum Clock Pulse Width Maximum Clock Rise and Fall Time Minimum Set-Up Time
tWH or tWL
trCL or tfCL
tSU
fCL
Maximum Clock Frequency
CIN CPD
Average Input Capacitance Power Dissipation Capacitance
Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation Note 2 VSS e 0V unless otherwise specified Note 3 IOH and IOL are tested one output at a time
3
AC Electrical Characteristics
TA e 25 C CL e 50 pF RL e 200 k Input trCL e tfCL e 20 ns unless otherwise specified (Continued) Symbol Parameter Conditions Min Typ Max Units
PRESET ENABLE OPERATION tPHL or tPLH Propagation Delay Time to Q output Propagation Delay Time to Carry Output Minimum Preset Enable Pulse Width Minimum Preset Enable Removal Time VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V 285 115 95 400 165 135 80 30 25 150 60 50 570 230 195 800 330 260 160 60 50 300 120 100 ns ns ns ns ns ns ns ns ns ns ns ns
tPHL or tPLH
tWH
tREM
CARRY INPUT OPERATION tPHL or tPLH Propagation Delay Time to Carry Output Propagation Delay Time to Carry Output VDD e 5V VDD e 10V VDD e 15V CL e 15 pF VDD e 5V VDD e 10V VDD e 15V 265 110 90 200 85 70 530 220 180 400 170 140 ns ns ns ns ns ns
tPHL tPLH
AC Parameters are guaranteed by DC correlated testing Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation Note 2 VSS e 0V unless otherwise specified Note 3 IOH and IOL are tested one output at a time Note 4 CPD determines the no load AC power consumption of any CMOS device For complete explanation see 54C 74C Family Characteristics application note AN-90
Connection Diagram
Dual-In-Line Package
Order Number CD4029B
TL F 5960–2
Top View
4
Logic Waveforms
Decade Mode
TL F 5960 – 3
Binary Mode
TL F 5960 – 4
5
Switching Time Waveforms
TL F 5960 – 5
Cascading Packages
Parallel Clocking
TL F 5960 – 6
Ripple Clocking
TL F 5960 – 7
Carry out lines at the 2nd or later stages may have a negative-going spike due to differential internal delays These spikes do not affect counter operation but if the carry out is used to trigger external circuitry the carry out should be gated with the clock
6
7
CD4029BM CD4029BC Presettable Binary Decade Up Down Counter
Physical Dimensions inches (millimeters)
Order Number CD4029BMJ or CD4029BCJ NS Package Number J16A
Order Number CD4029BMN or CD4029BCN NS Package Number N16E
LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user
National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018
2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness
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National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications
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