CD4069UBM CD4069UBC Inverter Circuits
February 1988
CD4069UBM CD4069UBC Inverter Circuits
General Description
The CD4069UB consists of six inverter circuits and is manufactured using complementary MOS (CMOS) to achieve wide power supply operating range low power consumption high noise immunity and symmetric controlled rise and fall times This device is intended for all general purpose inverter applications where the special characteristics of the MM74C901 MM74C903 MM74C907 and CD4049A Hex Inverter Buffers are not required In those applications requiring larger noise immunity the MM74C14 or MM74C914 Hex Schmitt Trigger is suggested All inputs are protected from damage due to static discharge by diode clamps to VDD and VSS
Features
Y Y Y
Y
Wide supply voltage range 3 0V to 15V High noise immunity 0 45 VDD typ Low power TTL Fan out of 2 driving 74L compatibility or 1 driving 74LS Equivalent to MM54C04 MM74C04
Schematic and Connection Diagram
Dual-In-Line Package
TL F 5975 – 1 TL F 5975 – 2
Order Number CD4069UB
AC Test Circuits and Switching Time Waveforms
TL F 5975 – 3 TL F 5975 – 4
C1995 National Semiconductor Corporation
TL F 5975
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings (Notes 1
2)
If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications
b 0 5V to a 18 VDC DC Supply Voltage (VDD) b 0 5V to VDD a 0 5 VDC Input Voltage (VIN) b 65 C to a 150 C Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line 700 mW Small Outline 500 mW Lead Temperature (TL) (Soldering 10 seconds) 260 C
Recommended Operating Conditions (Note 2)
DC Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) CD4069UBM CD4069UBC 3V to 15VDC 0V to VDD VDC
b 55 C to a 125 C b 40 C to a 85 C
DC Electrical Characteristics CD4069UBM (Note 2)
Symbol IDD Parameter Quiescent Device Current Conditions VDD e 5V VIN e VDD or VSS VDD e 10V VIN e VDD or VSS VDD e 15V VIN e VDD or VSS
b 55 C a 25 C a 125 C
Units mA mA mA
Min
Max 0 25 05 10
Min
Typ
Max 0 25 05 10
Min
Max 75 15 30
VOL
Low Level Output Voltage
l IO l k 1 m A VDD e 5V VDD e 10V VDD e 15V l IO l k 1 m A VDD e 5V VDD e 10V VDD e 15V l IO l k 1 m A VDD e 5V VO e 4 5V VDD e 10V VO e 9V VDD e 15V VO e 13 5V l IO l k 1 m A VDD e 5V VO e 0 5V VDD e 10V VO e 1V VDD e 15V VO e 1 5V
VDD e 5V VO e 0 4V VDD e 10V VO e 0 5V VDD e 15V VO e 1 5V 40 80 12 0 0 64 16 42 4 95 9 95 14 95
0 05 0 05 0 05 4 95 9 95 14 95 10 20 30 40 80 12 0 0 51 13 34
b 0 51 b1 3 b3 4 b 0 10
0 0 0 5 10 15
0 05 0 05 0 05 4 95 9 95 14 95 10 20 30 40 80 12 0
0 05 0 05 0 05
V V V V V V
VOH
High Level Output Voltage
VIL
Low Level Input Voltage
10 20 30
V V V V V V mA mA mA mA mA mA
VIH
High Level Input Voltage
IOL
Low Level Output Current (Note 3) High Level Output Current (Note 3) Input Current
0 88 2 25 88
b 0 88 b 2 25 b8 8 b 10 b 5 b 0 10
0 36 09 24
b 0 36 b0 9 b2 4 b1 0
IOH
b 0 64 VDD e 5V VO e 4 6V b1 6 VDD e 10V VO e 9 5V VDD e 15V VO e 13 5V b4 2
IIN
VDD e 15V VIN e 0V VDD e 15V VIN e 15V
0 10
10b5
0 10
10
mA mA
Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed They are not meant to imply that the devices should be operated at these limits The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual device operation Note 2 VSS e 0V unless otherwise specified Note 3 IOH and IOL are tested one output at a time
2
DC Electrical Characteristics CD4069UBC (Note 2)
Symbol IDD Parameter Quiescent Device Current Conditions VDD e 5V VIN e VDD or VSS VDD e 10V VIN e VDD or VSS VDD e 15V VIN e VDD or VSS
b 40 C a 25 C a 85 C
Units mA mA mA
Min
Max 10 20 40
Min
Typ
Max 10 20 40
Min
Max 75 15 30
VOL
Low Level Output Voltage
l IO l k 1 m A VDD e 5V VDD e 10V VDD e 15V l IO l k 1 m A VDD e 5V VDD e 10V VDD e 15V l IO l k 1 m A VDD e 5V VO e 4 5V VDD e 10V VO e 9V VDD e 15V VO e 13 5V l IO l k 1 m A VDD e 5V VO e 0 5V VDD e 10V VO e 1V VDD e 15V VO e 1 5V
VDD e 5V VO e 0 4V VDD e 10V VO e 0 5V VDD e 15V VO e 1 5V 40 80 12 0 0 52 13 36 4 95 9 95 14 95
0 05 0 05 0 05 4 95 9 95 14 95 10 20 30 40 80 12 0 0 44 11 30
b 0 44 b1 1 b3 0 b 0 30
0 0 0
0 05 0 05 0 05 4 95 9 95 14 95 10 20 30 40 80 12 0
0 05 0 05 0 05
V V V V V V
VOH
High Level Output Voltage
VIL
Low Level Input Voltage
10 20 30
V V V V V V mA mA mA mA mA mA
VIH
High Level Input Voltage
IOL
Low Level Output Current (Note 3) High Level Output Current (Note 3) Input Current
0 88 2 25 88
b 0 88 b 2 25 b8 8 b 10 b 5 b 0 30
0 36 09 24
b 0 36 b0 9 b2 4 b1 0
IOH
b 0 52 VDD e 5V VO e 4 6V b1 3 VDD e 10V VO e 9 5V VDD e 15V VO e 13 5V b3 6
IIN
VDD e 15V VIN e 0V VDD e 15V VIN e 15V
0 30
10b5
0 30
10
mA mA
AC Electrical Characteristics
TA e 25 C CL e 50 pF RL e 200 kX tr and tf s 20 ns unless otherwise specified Symbol tPHL or tPLH Parameter Propagation Delay Time from Input to Output Transition Time Conditions VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V Any Gate Any Gate (Note 4) Min Typ 50 30 25 80 50 40 6 12 Max 90 60 50 150 100 80 15 Units ns ns ns ns ns ns pF pF
tTHL or tTLH
CIN CPD
Average Input Capacitance Power Dissipation Capacitance
AC Parameters are guaranteed by DC correlated testing Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed They are not meant to imply that the devices should be operated at these limits The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual device operation Note 2 VSS e 0V unless otherwise specified Note 3 IOH and IOL are tested one output at a time Note 4 CPD determines the no load AC power consumption of any CMOS device For complete explanation see 54C 74C Family Characteristics application note AN-90
3
Typical Performance Characteristics
Gate Transfer Characteristics Power Dissipation vs Frequency Propagation Delay vs Ambient Temperature
TL F 5975–5
TL F 5975 – 6 TL F 5975 – 7
Propagation Delay vs Ambient Temperature
Propagation Delay Time vs Load Capacitance
TL F 5975 – 8
TL F 5975 – 9
4
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J) Order Number CD4069UBMJ or CD4069UBCJ NS Package Number J14A
5
CD4069UBM CD4069UBC Inverter Circuits
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package (N) Order Number CD4069UBMN or CD4069UBCN NS Package Number N14A
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National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications
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