CD4514BM

CD4514BM CD4514BC CD4515BM CD4515BC 4-Bit Latched 4-to-16 Line Decoders February 1988 CD4514BM CD4514BC CD4515BM CD4515BC 4-Bit Latched 4-to-16 Line Decoders General Description The CD4514B and CD4515B are 4-to-16 line decoders with latched inputs implemented with complementary MOS (CMOS) circuits constructed with N- and P-channel enhancement mode transistors These circuits are primarily used in decoding applications where low power dissipation and or high noise immunity is required The CD4514B (output active high option) presents a logical ‘‘1’’ at the selected output whereas the CD4515B presents a logical ‘‘0’’ at the selected output The input latches are R – S type flip-flops which hold the last input data presented prior to the strobe transition from ‘‘1’’ to ‘‘0’’ This input data is decoded and the corresponding output is activated An output inhibit line is also available Features Y Y Y Y Wide supply voltage range High noise immunity Low power TTL compatibility Low quiescent power dissipation 3 0V to 15V 0 45 VDD (typ ) fan out of 2 driving 74L 0 025 mW package 5 0 VDC Y Y Y Single supply operation Input impedance e 1012X typically Plug-in replacement for MC14514 MC14515 Logic and Connection Diagrams TL F 5994 – 1 Dual-In-Line Package Order Number CD4514B or CD4515B TL F 5994 – 2 Top View TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 5994 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Notes 1 and 2) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications DC Supply Voltage (VDD) Input Voltage (VIN) Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Lead Temperature (TL) (Soldering 10 seconds) b 0 5V to a 18V b 0 5V to VDD a 0 5V b 65 C to a 150 C Recommended Operating Conditions (Note 2) DC Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) CD4514BM CD4515BM CD4514BC CD4515BC 3V to 15V 0V to VDD b 55 C to a 125 C b 40 C to a 85 C 700 mW 500 mW 260 C CD4515BM (Note 2) b 55 C a 25 C a 125 C DC Electrical Characteristics CD4514BM Symbol IDD Parameter Quiescent Device Current Low Level Output Voltage Conditions VDD e 5V VIN e VDD or VSS VDD e 10V VIN e VDD or VSS VDD e 15V VIN e VDD or VSS VIH e VDD lIOl k 1 mA VDD e 5V VIL e 0V VDD e 10V VDD e 15V VIH e VDD lIOl k 1 mA VDD e 5V VIL e 0V VDD e 10V VDD e 15V VO e 0 5V or 4 5V VDD e 5V lIOl k 1 mA VDD e 10V VO e 1 0V or 9 0V VDD e 15V VO e 1 5V or 13 5V VO e 0 5V or 4 5V VDD e 5V lIOl k 1 mA VDD e 10V VO e 1 0V or 9 0V VDD e 15V VO e 1 5V or 13 5V VDD e 5V VO e 0 4V VDD e 10V VO e 0 5V VDD e 15V VO e 1 5V VDD e 5V VO e 4 6V VDD e 10V VO e 9 5V VDD e 15V VO e 13 5V VDD e 15V VIN e 0V VDD e 15V VIN e 15V Units mA mA mA V V V V V V Min Max 5 10 20 0 05 0 05 0 05 Min Typ 0 005 0 010 0 015 0 0 0 Max 5 10 20 0 05 0 05 0 05 Min Max 150 300 600 0 05 0 05 0 05 VOL VOH High Level Output Voltage 4 95 9 95 14 95 15 30 40 35 70 11 0 0 64 16 42 b 0 64 b1 6 b4 2 b0 1 4 95 9 95 14 95 5 10 15 2 25 4 50 6 75 15 30 40 4 95 9 95 14 95 15 30 40 35 70 11 0 0 36 0 90 2 40 b 0 36 b 0 90 b 2 40 b0 1 b1 0 VIL Low Level Input Voltage V V V V V V mA mA mA mA mA mA VIH High Level Input Voltage 35 70 11 0 0 51 13 34 b 0 51 b1 3 b3 4 2 75 5 50 8 25 0 88 2 25 8 80 b 0 88 b 2 25 b 8 80 b 10 b 5 IOL Low Level Output Current (Note 3) High Level Output Current (Note 3) Input Current IOH IIN 01 10b5 01 10 mA mA DC Electrical Characteristics CD4514BC Symbol IDD Parameter Quiescent Device Current Low Level Output Voltage Conditions CD4515BC (Note 2) b 40 C a 25 C a 85 C Units mA mA mA Min VDD e 5V VIN e VDD or VSS VDD e 10V VIN e VDD or VSS VDD e 15V VIN e VDD or VSS VIL e 0V VIH e VDD l IO l k 1 m A VDD e 5V VDD e 10V VDD e 15V VIL e 0V VIH e VDD l IO l k 1 m A VDD e 5V VDD e 10V VDD e 15V 2 Max 20 40 80 Min Typ 0 005 0 010 0 015 Max 20 40 80 Min Max 150 300 600 VOL 0 05 0 05 0 05 0 0 0 0 05 0 05 0 05 0 05 0 05 0 05 V V V VOH High Level Output Voltage 4 95 9 95 14 95 4 95 9 95 14 95 50 10 0 15 0 4 95 9 95 14 95 V V V DC Electrical Characteristics CD4514BC Symbol VIL Parameter Low Level Input Voltage Conditions CD4515BC (Note 2) (Continued) b 40 C a 25 C a 85 C Units Min Max 15 30 40 Min Typ 2 25 4 50 6 75 Max 15 30 40 Min Max 15 30 40 V V V V V V mA mA mA mA mA mA b1 0 l IO l k 1 m A VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1 0V or 9 0V VDD e 15V VO e 1 5V or 13 5V l IO l k 1 m A VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1 0V or 9 0V VDD e 15V VO e 1 5V or 13 5V VDD e 5V VO e 0 4V VDD e 10V VO e 0 5V VDD e 15V VO e 1 5V VDD e 5V VO e 4 6V VDD e 10V VO e 9 5V VDD e 15V VO e 13 5V VDD e 15V VIN e 0V VDD e 15V VIN e 15V 35 70 11 0 0 52 13 36 b 0 52 b1 3 b3 6 VIH High Level Input Voltage 35 70 11 0 0 44 11 30 b 0 44 b1 1 b3 0 b0 3 2 75 5 50 8 25 0 88 2 25 88 b 0 88 b 2 25 b8 8 b 10 b 5 b0 3 35 70 11 0 0 36 0 90 24 b 0 36 b 0 90 b2 4 IOL Low Level Output Current (Note 3) High Level Output Current (Note 3) Input Current IOH IIN 03 10b5 03 10 mA mA AC Electrical Characteristics All types CL e 50 pF TA e 25 C tr e tf e 20 ns unless otherwise specified Symbol tTHL tTLH Parameter Transition Times Conditions VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V Per Package (Note 5) Any Input (Note 4) Min Typ 100 50 40 550 225 150 400 150 100 125 50 38 175 50 38 150 5 75 Max 200 100 80 1100 450 300 800 300 200 250 100 75 350 100 75 Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns pF pF tPLH tPHL Propagation Delay Times tPLH tPHL Inhibit Propagation Delay Times Setup Time tSU tWH Strobe Pulse Width CPD CIN Power Dissipation Capacitance Input Capacitance AC Parameters are guaranteed by DC correlated testing Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for actual device operation Note 2 VSS e 0V unless otherwise specified Note 3 IOH and IOL are tested one output at a time Note 4 Capacitance is guaranteed by periodic testing Note 5 CPD determines the no load AC power consumption of any CMOS device For complete explanation see 54C and 74C Family Characteristics application note AN-90 3 Truth Table Decode Truth Table (Strobe e 1) Data Inputs Inhibit D 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 X e Don’t Care C 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 X B 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 X A 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 X Selected Output CD4514 e Logic ‘‘1’’ CD4515 e Logic ‘‘0’’ S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 All Outputs e 0 CD4514 All Outputs e 1 CD4515 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 X AC Test Circuit and Switching Time Waveforms TL F 5994 – 4 TL F 5994 – 3 FIGURE 1 4 Applications Two CD4512 8-channel data selectors are used here with the CD4514B 4-bit latch decoder to effect a complex data routing system A total of 16 inputs from data registers are selected and transferred via a TRI-STATE data bus to a data distributor for rearrangement and entry into 16 output registers In this way sequential data can be re-routed or intermixed according to patterns determined by data select and distribution inputs Data is placed into the routing scheme via the 8 inputs on both CD4512 data selectors One register is assigned to each input The signals on A0 A1 and A2 choose 1-of-8 inputs for transfer out to the TRI-STATE data bus A fourth signal labelled Dis disables one of the CD4512 selectors assuring transfer of data from only one register In addition to a choice of input registers 1–16 the rate of transfer of the sequential information can also be varied That is if the CD4512 were addressed at a rate that is 8 times faster than the shift frequency of the input registers the most significant bit (MSB) from each register could be selected for transfer to the data bus Therefore all of the most significant bits from all of the registers can be transferred to the data bus before the next most significant bit is presented for transfer by the input registers Information from the TRI-STATE bus is redistributed by the CD4514B 4-bit latch decoder Using the 4-bit address INA – IND the information on the inhibit line can be transferred to the addressed output line to the desired output registers A – P This distribution of data bits to the output registers can be made in many complex patterns For example all of the most significant bits from the input registers can be routed into output register A all of the next most significant bits into register B etc In this way horizontal vertical or other methods of data slicing can be implemented TL F 5994 – 5 5 CD4514BM CD4514BC CD4515BM CD4515BC 4-Bit Latched 4-to-16 Line Decoders Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number CD4514BMJ CD4514BCJ CD4515BMJ or CD4515BCJ NS Package Number J24A Molded Dual-In-Line Package (N) Order Number CD4514BMN CD4514BCN CD4515BMN or CD4515BCN NS Package Number N24A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax (a49) 0-180-530 85 86 Email cnjwge tevm2 nsc com Deutsch Tel (a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications