CD4724BMN

CD4723BM CD4723BC Dual 4-Bit Addressable Latch CD4724BM CD4724BC 8-Bit Addressable Latch February 1988 CD4723BM CD4723BC Dual 4-Bit Addressable Latch CD4724BM CD4724BC 8-Bit Addressable Latch General Description The CD4723B is a dual 4-bit addressable latch with common control inputs including two address inputs (A0 A1) an active low enable input (E) and an active high clear input (CL) Each latch has a data input (D) and four outputs (Q0 – Q3) The CD4724B is an 8-bit addressable latch with three address inputs (A0–A2) an active low enable input (E) active high clear input (CL) a data input (D) and eight outputs (Q0 – Q7) Data is entered into a particular bit in the latch when that is addressed by the address inputs and the enable (E) is low Data entry is inhibited when enable (E) is high When clear (CL) and enable (E) are high all outputs are low When clear (CL) is high and enable (E) is low the channel demultiplexing occurs The bit that is addressed has an active output which follows the data input while all unaddressed bits are held low When operating in the addressable latch mode (E e CL e low) changing more than one bit of the address could impose a transient wrong address Therefore this should only be done while in the memory mode (E e high CL e low) Features Y Y Y Y Y Y Y Y Wide supply voltage range 3 0V to 15V High noise immunity 0 45 VDD (typ ) Low power TTL fan out of 2 driving 74L compatibility or 1 driving 74LS Serial to parallel capability Storage register capability Random (addressable) data entry Active high demultiplexing capability Common active high clear Connection Diagrams CD4723B Dual-In-Line Package CD4724B Dual-In-Line Package Order Number CD4723B or CD4724B TL F 6003–1 TL F 6003 – 2 Top View Top View Truth Table Mode Selection E L H L H CL L L H H Addressed Latch Follows Data Hold Previous Data Follows Data Reset to ‘0’’ Unaddressed Latch Holds Previous Data Holds Previous Data Reset to ‘‘0’’ Reset to ‘‘0’’ Mode Addressable Latch Memory Demultiplexer Clear C1995 National Semiconductor Corporation TL F 6003 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Notes 1 2) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications DC Supply Voltage (VDD) Input Voltage (VIN) Storage Temperature (TS) Power Dissipation (PD) Dual-In-Line Small Outline Lead Temperature (TL) (Soldering 10 seconds) b 0 5V to a 18 VDC b 0 5V to VDD a 0 5 VDC b 65 C to a 150 C Recommended Operating Conditions (Note 2) DC Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) CD4723BM CD4724BM CD4723BC CD4724BC 3 0V to 15 VDC 0V to VDD VDC b 55 C to a 125 C b 40 C to a 85 C 700 mW 500 mW 260 C CD4724BM (Note 2) b 55 C a 25 C a 125 C DC Electrical Characteristics CD4723BM Symbol IDD Parameter Quiescent Device Current Low Level Output Voltage Conditions VDD e 5V VDD e 10V VDD e 15V Units mA mA mA V V V V V V Min Max 50 10 20 0 05 0 05 0 05 Min Typ 0 02 0 02 0 02 0 0 0 Max 50 10 20 0 05 0 05 0 05 Min Max 150 300 600 0 05 0 05 0 05 VOL l IO l s 1 m A VDD e 5V VDD e 10V VDD e 15V l IO l s 1 m A VDD e 5V VDD e 10V VDD e 15V VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1V or 9V VDD e 15V VO e 1 5V or 13 5V VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1V or 9V VDD e 15V VO e 1 5V or 13 5V VDD e 5V VO e 0 4V VDD e 10V VO e 0 5V VDD e 15V VO e 1 5V VDD e 5V VO e 4 6V VDD e 10V VO e 9 5V VDD e 15V VO e 13 5V VDD e 15V VIN e 0V VDD e 15V VIN e 15V 35 70 11 0 0 64 16 42 b 0 64 b1 6 b4 2 VOH High Level Output Voltage 4 95 9 95 14 95 15 30 40 4 95 9 95 14 95 50 10 15 2 25 45 6 75 15 30 40 4 95 9 95 14 95 15 30 40 35 70 11 0 0 36 09 24 b 0 36 b0 9 b2 4 b0 1 b1 0 VIL Low Level Input Voltage High Level Input Voltage Low Level Output Current (Note 3) High Level Output Current (Note 3) Input Current V V V V V V mA mA mA mA mA mA VIH 35 70 11 0 0 51 13 34 b 0 51 b1 3 b3 4 b0 1 2 75 55 8 25 0 88 2 25 88 b 0 88 b 2 25 b8 8 b 10 b 5 IOL IOH IIN 01 10b5 01 10 mA mA Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed they are not meant to imply that the devices should be operated at these limits The tables of ‘‘Recommended Operating Conditions’’ and Electrical Characteristics’’ provide conditions for actual device operation Note 2 VSS e 0V unless otherwise specified Note 3 IOL and IOH are tested one output at a time 2 DC Electrical Characteristics CD4723BC Symbol IDD Parameter Quiescent Device Current Low Level Output Voltage Conditions VDD e 5V VDD e 10V VDD e 15V CD4724BC (Note 2) b 40 C a 25 C a 85 C Units mA mA mA V V V V V V Min Max 20 40 80 0 05 0 05 0 05 Min Typ 0 02 0 02 0 02 0 0 0 Max 20 40 80 0 05 0 05 0 05 Min Max 150 300 600 0 05 0 05 0 05 VOL l IO l s 1 m A VDD e 5V VDD e 10V VDD e 15V l IO l s 1 m A VDD e 5V VDD e 10V VDD e 15V VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1V or 9V VDD e 15V VO e 1 5V or 13 5V VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1V or 9V VDD e 15V VO e 1 5V or 13 5V VDD e 5V VO e 0 4V VDD e 10V VO e 0 5V VDD e 15V VO e 1 5V 35 70 11 0 0 52 13 36 b 0 52 b1 3 b3 6 VOH High Level Output Voltage 4 95 9 95 14 95 15 30 40 4 95 9 95 14 95 50 10 15 2 25 45 6 75 15 30 40 4 95 9 95 14 95 15 30 40 35 70 11 0 0 36 09 24 b 0 36 b0 9 b2 4 b 0 30 b1 0 VIL Low Level Input Voltage High Level Input Voltage Low Level Output Current (Note 3) V V V V V V mA mA mA mA mA mA VIH 35 70 11 0 0 44 11 30 b 0 44 b1 1 b3 0 b 0 30 2 75 55 8 25 0 88 2 25 88 b 0 88 b 2 25 b8 8 b 10 b 5 IOL IOH High Level Output VDD e 5V VO e 4 6V Current VDD e 10V VO e 9 5V (Note 3) VDD e 15V VO e 13 5V Input Current VDD e 15V VIN e 0V VDD e 15V VIN e 15V IIN 0 30 10b5 0 30 10 mA mA Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed they are not meant to imply that the devices should be operated at these limits The tables of ‘‘Recommended Operating Conditions’’ and Electrical Characteristics’’ provide conditions for actual device operation Note 2 VSS e 0V unless otherwise specified Note 3 IOL and IOH are tested one output at a time 3 AC Electrical Characteristics TA e 25 C CL e 50 pF RL e 200k Input tr e tf e 20 ns unless otherwise noted Symbol tPHL tPLH Parameter Propagation Delay Data to Output Propagation Delay Enable to Output Propagation Delay Clear to Output Propagation Delay Address to Output Transition Time (Any Output) Minimum Data Pulse Width Minimum Address Pulse Width Minimum Clear Pulse Width Minimum Setup Time Data to E Minimum Hold Time Data to E Minimum Setup Time Address to E Minimum Hold Time Address to E Power Dissipation Capacitance Input Capacitance Conditions VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V Per Package (Note 4) Any Input Min Typ 200 75 50 200 80 60 175 80 65 225 100 75 100 50 40 100 50 40 200 100 65 75 40 25 40 20 15 60 30 25 b 15 Max 400 150 100 400 160 120 350 160 130 450 200 150 200 100 80 200 100 80 400 200 125 150 75 50 80 40 30 120 60 50 50 30 20 15 10 5 Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns pF tPLH tPHL tPHL tPLH tPHL tTHL tTLH TWH TWL tWH tWL tWH tSU tH tSU 0 0 b 50 b 20 b 15 tH CPD CIN 100 50 75 pF AC Parameters are guaranteed by DC correlated testing Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed they are not meant to imply that the devices should be operated at these limits The tables of ‘‘Recommended Operating Conditions’’ and Electrical Characteristics’’ provide conditions for actual device operation Note 2 VSS e 0V unless otherwise specified Note 3 IOL and IOH are tested one output at a time Note 4 Dynamic power dissipation (PD) is given by PD e (CPD a CL) VCC2f a PQ where CL e load capacitance f e frequency of operation for further details see Application Note AN-90 ‘‘54C 74C Family Characteristics’’ 4 Logic Diagrams CD4723B TL F 6003 – 3 5 Logic Diagrams (Continued) CD4724B TL F 6003 – 4 6 Switching Time Waveforms TL F 6003 – 5 7 CD4723BM CD4723BC Dual 4-Bit Addressable Latch CD4724BM CD4724BC 8-Bit Addressable Latch Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number CD4723BMJ CD4723BCJ CD4724BMJ or CD4724BCJ NS Package Number J16A Molded Dual-In-Line Package (N) Order Number CD4723BMN CD4723BCN CD4724BMN or CD4724BCN NS Package Number N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax (a49) 0-180-530 85 86 Email cnjwge tevm2 nsc com Deutsch Tel (a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications