CLC5665

CLC5665 Low Distortion Amplifier with Disable June 1999 N CLC5665 Low Distortion Amplifier with Disable General Description The CLC5665 is a low-cost, wideband amplifier that provides very low 2nd and 3rd harmonic distortion at 1MHz (-89/-92dBc). The great slew rate of 1800V/µs, bandwidth of 90MHz (Av = +1) and fast disable make it an excellent choice for many high speed multiplexing applications. Like all current feedback op amps, the CLC5665 allows the frequency response to be optimized (or adjusted) by the selection of the feedback resistor. For demanding video applications, the 0.1dB bandwidth to 20MHz and differential gain/phase of 0.05%/0.05° make the CLC5665 the preferred component for broadcast quality NTSC and PAL video systems. The large voltage swing (28Vpp), continuous output current (85mA) and slew rate (1800V/µs) provide high-fidelity signal conditioning for applications such as CCDs, transmission lines and low impedance circuits. xDSL, video distribution, multimedia and general purpose applications will benefit from the CLC5665’s wide bandwidth and disable feature. Power is reduced and the output becomes a high impedance when disabled. The wide gain range of the CLC5665 makes this general purpose op amp an improved solution for circuits such as active filters, single-to-differential-ended drivers, DAC transimpedance amplifiers and MOSFET drivers. Features s s s s s s s s s s 0.1dB gain flatness to 20MHz (Av = +2) 90MHz bandwidth (Av = +1) Large signal BW 25MHz 1800V/µs slew rate 0.05%/0.05° differential gain/phase ±5V, ±15V or single supplies 200ns disable to high-impedance output Wide gain range -89/-92dBc HD2/HD3 (RL = 500Ω) Low cost xDSL driver Twisted pair driver Cable driver Video distribution CCD clock driver Multimedia systems DAC output buffers Imaging systems Non-Inverting Frequency Response Av = 1 Rf = 698 Av = 10 Rf = 100 Phase Applications s s s s s s s s Gain Magnitude (1dB/div) Phase (deg) Av = 2 Rf = 604 Av = 1 0 -45 -90 Av = 50 Av = 2 Av = 50 Rf = 500 Av = 10 -135 -180 100 1 10 Frequency (MHz) DIS Typical Application Differential Line Driver for xDSL Ro + Pinout DIP & SOIC NC 1 2 3 4 + + CLC5665 Rf1 Vin (Vpp) 604Ω Rg 1.2kΩ Rf2 604Ω - 8 DIS 7 +Vcc 6 Vout 5 NC 1:n Vo = 2Vin nVo RL Vinv Vnon-inv Ro Note: Supply and Bypassing not shown. -Vcc - CLC5665 + DIS © 1999 National Semiconductor Corporation Printed in the U.S.A. http://www.national.com CLC5665 Electrical Characteristics PARAMETERS Ambient Temperature CONDITIONS CLC5665 FREQUENCY DOMAIN RESPONSE small-signal bandwidth (Av = +1) Vout < 1.0Vpp small-signal bandwidth Vout < 1.0Vpp Vout < 1.0Vpp 0.1dB bandwidth Vout < 1.0Vpp Vout < 1.0Vpp large-signal bandwidth Vout = 10Vpp gain flatness Vout < 1.0Vpp peaking DC to 10MHz rolloff DC to 20MHz linear phase deviation DC to 20MHz differential gain 4.43MHz, RL = 4.43MHz, RL = differential phase 4.43MHz, RL = 4.43MHz, RL = TIME DOMAIN RESPONSE rise and fall time settling time to 0.05% overshoot slew rate 2V step 10V step 2V step 2V step 20V step (VCC = ±15V, Av = +2V/V; Rf = 604Ω, RL = 100Ω; unless specified) Vcc TYP +25°C 90 70 50 20 15 25 0.03 0.1 0.7 0.05 0.05 0.05 0.1 5 10 35 5 1800 -89 -92 3.0 3.2 15 MIN/MAX RATINGS UNITS NOTES +25°C 0 to 70°C -40 to 85°C MHz MHz MHz MHz MHz MHz dB dB deg % % deg deg ns ns ns % V/µs dBc dBc nV/√Hz pA/√Hz pA/√Hz 7.5 – 20 – 20 – 55 55 12 2.5 500 800 56 12.5 2.5 10.5 0.6 3.0 1.0 ±12.3 ±2.3 ±13.7 ±3.9 ±60 9.0 20 20 50 50 14 2.5 550 800 56 12.7 2.7 10.0 0.1 2.5 1.0 ±12.1 ±2.2 ±13.7 ±3.8 ±50 10.0 20 20 50 50 15 2.5 550 800 56 mV µV/°C µA nA/°C µA nA/°C dB dB mA mA ns ns dB V V V V MΩ pF V V V V mA A A A ±15 ±15 ±5 ±15 ±5 150Ω 150Ω 150Ω 150Ω ±15 ±5 ±15 ±5 DISTORTION AND NOISE RESPONSE 2nd harmonic distortion 1Vpp,1MHz, RL = 500Ω 3rd harmonic distortion 1Vpp,1MHz, RL = 500Ω input voltage noise >1MHz non-inverting input current noise >1MHz inverting input current noise >1MHz DC PERFORMANCE input offset voltage average drift input bias current average drift input bias current average drift power-supply rejection ratio common-mode rejection ratio supply current disabled SWITCHING PERFORMANCE turn on time turn off time off isolation high input voltage low input voltage ±15 non-inverting inverting DC DC RL = ∞ RL = ∞ ±15, ±5 ±15, ±5 ±15, ±5 ±15, ±5 1.0 25 3 10 3 10 60 60 11, 8.5 1.5 400 200 59 11.8 1.8 10.8 0.8 8.0 0.5 ±12.5 ±2.5 ±14 ±4.0 ±85 A A (Note 2) 10MHz VIH VIL ±15 ±5 ±15 ±5 MISCELLANEOUS PERFORMANCE non-inverting input resistance non-inverting input capacitance input voltage range common mode common mode output voltage range RL = ∞ RL = ∞ output current ±15 ±5 ±15 ±5 1.7 1.0 ±11.8 ±1.9 ±13.6 ±3.7 ±45 Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. Absolute Maximum Ratings supply voltage short circuit current common-mode input voltage maximum junction temperature storage temperature range lead temperature (soldering 10 sec) http://www.national.com Notes A) J-level: spec is 100% tested at +25°C. 1) Output is short circuit protected to ground, however maximum reliability is obtained if output current does not exceed 125mA. 2) To >50dB attenuation @ 10MHz. ±16V (see note 1) ±VCC +150°C -65°C to +150°C +300°C 2 CLC5665 Typical Performance (V Non-Inverting Frequency Response Av = 1 Rf = 698 Gain CC = ±15V, Av = +2V/V; Rf = 604Ω, RL = 100Ω; unless specified) Frequency Response vs. Load Av = -1 Rf = 500 Gain RL = 1k RL = 50 Inverting Frequency Response Gain Magnitude (1dB/div) Magnitude (1dB/div) Av = 10 Rf = 100 Phase Av = 2 Rf = 604 Av = 1 Av = -10 Rf = 500 Phase Av = -2 Rf = 500 Magnitude (1dB/div) Phase (deg) Phase (deg) Phase (deg) Phase RL = 100 RL = 1k RL = 50 RL = 100 0 -45 -90 0 -45 -90 -135 Av = -1 0 -45 -90 -135 -180 Av = 50 Av = 2 Av = 50 Rf = 500 Av = 10 Av = -50 Av = -10 Av = -50 Rf = 2.5k Av = -2 -135 -180 100 -180 100 1 10 100 1 10 1 10 Frequency (MHz) Open-Loop Transimpedance Gain (Zs) 130 120 110 100 90 80 70 60 50 40 30 0.0001 0.001 0.01 0.1 1 10 100 Phase Gain Frequency (MHz) Flatness Gain and Linear Phase 100 0 Frequency (MHz) Equivalent Input Noise Noise Current (pA/√Hz) 20 40 60 80 100 120 140 160 Noise Voltage (nV/√Hz) Magnitude (0.1dB/div) Gain Phase (0.2°/div) Gain (20 log) Phase (deg) Inverting Current 14.8pA/√Hz 10 Non-Inverting Current 3.2pA/√Hz Voltage 3.0nV/√Hz Phase 1 0 4 8 12 16 20 0.1k 1k 10k 100k 1M 10M 100M Frequency (MHz) Signal Pulse Response 70 Frequency (MHz) PSRR, CMRR and Closed Loop Ro 30 20 CMRR Frequency (MHz) Differential Gain and Phase (3.58MHz) 1 0.08 10 Gain Negative Sync 0.30 0.24 Small Signal Output (0.5V/div) Large Signal Output (2V/div) Large Signal Small Signal 60 PSRR/CMRR (dB) 50 PSRR Phase (deg) 20 log Ro Gain (%) 40 30 20 10 0 20 log Ro 0 -10 -20 0.06 0.04 0.02 Phase Positive Sync 0.18 0.12 0.06 Phase Negative Sync -30 -40 0.01 0.10 1 10 100 0 1 Gain Positive Sync 0.03 2 3 4 Time (20ns/div) Frequency (MHz) Short Term Settling Time 0.2 2V output step Number of 150Ω Loads 2-Tone, 3rd Order Intermodulation Intercept 5.0 4.5 4.0 3.5 IBN IBI, IBN. VOS vs. Temperature 7.0 6.0 5.0 4.0 60 50 0.15 Settling Error (%) VOS (mV) 0.05 0 -0.05 -0.1 -0.15 -0.2 Intercept (+dBm) 0.1 Short Term IBI, IBN (µA) 3.0 2.0 1.0 0 -1.0 -2.0 -3.0 IBI VOS 3.0 2.5 2.0 1.5 1.0 0.5 0 40 30 50Ω Pout 50Ω 20 10 750Ω 750Ω Time (10ns/div) -1dBm Compression to Load 26 0 -10 -60 -20 20 60 100 140 106 107 Temperature (°C) Harmonic Distortion vs. Frequency RL = 100Ω Vout = 2Vpp Frequency (MHz) Harmonic Distortion vs. Frequency 0 -10 RL = 500Ω Vout = 2Vpp 2nd VCC = ±5V 2nd VCC = ±15V 3rd VCC = ±15V 3rd VCC = ±5V Compression Point (dBm) 24 Distortion Level (dBc) 22 20 18 16 14 Load -20 -30 -40 -50 -60 -70 -80 -90 -100 3rd VCC = ±5V 2nd VCC = ±15V 3rd VCC = ±15V 2nd VCC = ±5V Distortion Level (dBc) -20 -30 -40 -50 -60 -70 -80 -90 -100 1 10 12 10 8 6 0 Vin 50Ω 50Ω 698Ω 698Ω 5 10 15 20 25 30 35 40 45 50 1 10 100 100 Frequency (MHz) Frequency (MHz) Frequency (MHz) 3 http://www.national.com CLC5665 Design Considerations The CLC5665 is a general purpose current-feedback amplifier for use in a variety of small- and large-signal applications. Use the feedback resistor to fine tune the gain flatness and -3dB bandwidth for any gain setting. National provides information for the performance at a gain of +2 for small and large signal bandwidths. The plots show feedback resistor values for selected gains. Gain Use the following equations to set the CLC5665’s noninverting or inverting gain: R Non − Inverting Gain = 1 + f Rg Inverting Gain = -R f Rg VCC Enable Disable ±15V >12.7V 2.7V