CLC5802IM

CLC5802 Dual Low-Noise, Voltage Feedback Op Amp May 2000 CLC5802 Dual Low-Noise, Voltage Feedback Op Amp General Description The CLC5802 is a dual op amp that offers a traditional voltage-feedback topology featuring unity-gain stability. Low noise and very low harmonic distortion combine to form a very wide dynamic-range op amp that operates within a power supply range of 5V to 12V. Each of the CLC5802’s closely matched channels provides a 140MHz unity-gain bandwidth with a very low input voltage noise density (4nV/ ). Low 2nd/3rd harmonic distortion (−69/−66dBc) as well as high channel-to-channel isolation (−61dB) make the CLC5802 a perfect wide dynamic-range amplifier for I/Q channels and other application which require low distortion and matching. With its fast and accurate settling (18ns to 0.1%), the CLC5802 is also a excellent choice for wide-dynamic range, anti-aliasing filters to buffer the inputs of hi-resolution analog-to-digital converters. Combining the CLC5802 two tightly-matched amplifiers in a single eight-pin SOIC reduces cost and board space for many composite amplifier applications such as active filters, differential line drivers/receivers, fast peak detectors and instrumentation amplifiers. Features (TA = 25˚C, VS = ± 5V, RL = 100Ω, Typical unless specified). n Wide unity-gain bandwidth: 140MHz n Ultra-low noise: 4nV/ , 2pA/ n Low distortion: −69/−66dBc (5MHz) n Settling time: 18ns to 0.1% n High output current: ± 70mA n Supply voltage range: 5V to 12V Applications n n n n n n n General purpose dual op amp Low noise active filters Low noise integrators High-speed detectors Diff-in/diff-out instrumentation amp I/Q channel amplifiers Driver/receiver for transmission systems Equivalent Input Noise DS101341-16 Typical Application Full Duplex Transmission DS101341-28 © 2000 National Semiconductor Corporation DS101341 www.national.com CLC5802 Connection Diagram 8-Pin SOIC DS101341-2 Top View Ordering Information Package 8-pin SOIC Part Number CLC5802IM CLC5802IMX Packaging Marking CLC5802IM CLC5802IM Transport Media Rails 2.5k Tape and Reel NSC Drawing M08A www.national.com 2 CLC5802 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage Short Circuit Current Common-Mode Input Voltage Differential Input Voltage Maximum Junction Temperature Storage Temperature Lead Temperature (soldering 10 sec) −65˚C to +150˚C +300˚C Operating Rating(Note 1) Thermal Resistance (θJC) Thermal Resistance (θJA) Temperature Range Supply Voltage Range 40˚C/W 115˚C/W −40˚C to +85˚C 5V to 12V ± 7V (Note 3) ± VCC ± 10V +125˚C Electrical Characteristics (TA = +25˚C, VCC = ± 5V, AV = +2V/V, Rf = 100Ω, Rg = 100Ω, RL = 100Ω; unless specified). Symbol Parameter Conditions Typ +25˚C +25˚C Min/Max Ratings (Note 2) 0˚C to +70˚C −40˚C to +85˚C Units Frequency Domain Response GBW SSBW LSBW GFP GFR LPD TRS TSS OS SR HD2 HD3 VN Gain Bandwidth Product −3dB Bandwidth (AV = +1) −3dB Bandwidth (AV = +2) −3dB Bandwidth Gain Flatness Peaking Gain Flatness Rolloff Linear Phase Deviation Rise and Fall Time Settling Time Overshoot Slew Rate 2nd Harmonic Distortion 3rd Harmonic Distortion Equivalent Input Noise Voltage VOUT < 0.5VPP VOUT < 0.5VPP VOUT < 0.5VPP VOUT < 5.0VPP DC to 200MHz, VOUT < 0.5 VPP DC to 20MHz, VOUT < 0.5 VPP DC to 20MHz 1V step 2V step to 0.1% 1V step 5V step 1VPP, 5MHz 1VPP, 5MHz 1MHz to 100MHz 120 140 75 40 0.0 0.05 0.2 6 18 1 450 −69 −66 4.0 90 110 50 25 0.6 0.5 1.0 8 22 5 275 −57 −54 4.5 dB dB Deg ns ns % V/µs dBc dBc nV/ MHz Time Domain Response Distortion And Noise Response ICN Equivalent Input Noise Current 1MHz to 100MHz 2.0 3.0 pA/ CT AOL VIO DVIO IB DIB IIO DIIO PSRR CMRR ICC Crosstalk Open-Loop Gain Input Offset Voltage (Note 4) Offset Voltage Average Drift Input Bias Current (Note 4) Bias Current Average Drift Input Offset Current Offset Current Average Drift Power Supply Rejection Ratio Common Mode Rejection Ratio Supply Current (Note 4) Input referred, 10MHz DC −61 60 −58 56 50 50 dB dB mV µV/˚C µA nA/˚C µA nA/˚C dB dB mA Static, DC Performance ± 1.0 5 1.5 150 0.3 5 DC DC Per Channel, RL = ∞ 63 60 11 ± 2.0 – 25 – 3 – 57 54 12 ± 3.0 15 40 600 5 25 55 52 13 ± 3.5 20 65 700 5 50 55 52 15 3 www.national.com CLC5802 Electrical Characteristics Symbol Parameter (Continued) (TA = +25˚C, VCC = ± 5V, AV = +2V/V, Rf = 100Ω, Rg = 100Ω, RL = 100Ω; unless specified). Conditions Typ +25˚C +25˚C Min/Max Ratings (Note 2) 0˚C to +70˚C −40˚C to +85˚C 125 25 3.0 3.0 0.2 kΩ kΩ pF pF Ω V V V mA Units Miscellaneous Performance RINC RIND CINC CIND ROUT VO VOL CMIR IO Input Voltage Range Output Current Output Resistance Output Voltage Range Input Capacitance Input Resistance Common-Mode Differential-Mode Common-Mode Differential-Mode Closed Loop RL = ∞ RL = 100Ω Common-Mode 500 200 2.0 2.0 0.05 250 50 3.0 3.0 0.1 125 25 3.0 3.0 0.2 ± 3.6 ± 3.4 ± 3.7 ± 70 ± 3.5 ± 3.2 ± 3.5 ± 50 ± 3.3 ± 2.6 ± 3.3 ± 40 ± 3.3 ± 1.3 ± 3.3 ± 20 Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed, Note 2: Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. Note 3: Output is short circuit protected to ground, however maximum reliability is obtained if output current does not exceed 160mA. Note 4: 100% tested at +25˚C. www.national.com 4 CLC5802 Typical Performance Characteristics unless otherwise specified). Non-Inverting Frequency Response (TA = 25˚C, VCC = ± 5V, Rg = 26.1Ω, Rf = 499Ω, RL = 100Ω, Inverting Frequency Response DS101341-3 DS101341-4 Frequency Response vs. Load Resistance Frequency Response vs. Output Amplitude DS101341-5 DS101341-6 Frequency Response vs. Capacitive Load Gain Flatness & Linear Phase Deviation DS101341-7 DS101341-8 5 www.national.com CLC5802 Typical Performance Characteristics unless otherwise specified).. (Continued) Maximum Output Voltage vs. Load (TA = 25˚C, VCC = ± 5V, Rg = 26.1Ω, Rf = 499Ω, RL = 100Ω, Channel-to-Channel Crosstalk DS101341-9 DS101341-10 Open-Loop Gain & Phase 2nd and 3rd Harmonic Distortion DS101341-11 DS101341-12 2nd Harmonic Distortion vs. Output Voltage 3rd Harmonic Distortion vs. Output Voltage DS101341-13 DS101341-14 www.national.com 6 CLC5802 Typical Performance Characteristics unless otherwise specified).. (Continued) Closed-Loop Output Resistance (TA = 25˚C, VCC = ± 5V, Rg = 26.1Ω, Rf = 499Ω, RL = 100Ω, Equivalent Input Noise DS101341-15 DS101341-16 2-Tone, 3rd order Intermodulation Intercept Pulse Response (VOUT = 100mV) DS101341-18 DS101341-17 Pulse Response (VOUT = 2V) Settling Time vs. Capacitive Load DS101341-19 DS101341-20 7 www.national.com CLC5802 Typical Performance Characteristics unless otherwise specified).. (Continued) Short-Term Settling Time (TA = 25˚C, VCC = ± 5V, Rg = 26.1Ω, Rf = 499Ω, RL = 100Ω, CMRR and PSRR DS101341-21 DS101341-22 Typical DC Errors vs. Temperature Output Voltage vs. Output Sourcing Current DS101341-23 DS101341-37 Output Voltage vs. Output Sinking Current DS101341-38 www.national.com 8 CLC5802 Application Information Low Noise Design Ultimate low noise performance from circuit designs using the CLC5802 requires the proper selection of external resistors. By selecting appropriate low-valued resistors for Rf and Rg, amplifier circuits using the CLC5802 can achieve output noise that is approximately the equivalent voltage input noise of 4nV/ multiplied by the desired gain (AV). Each amplifier in the CLC5802 has an equivalent input noise resistance which is optimum for matching source impedances of approximately 2k. Using a transformer, any source can be matched to achieve the lowest noise design. For even lower noise performance than the CLC5802, consider the CLC425, CLC426 or CLC5801 at 1.05, 1.6 and 2nV/ , respectively. DC Bias Currents and Offset Voltages Cancellation of the output offset voltage due to input bias currents is possible with the CLC5802. This is done by making the resistance seen from the inverting and non-inverting inputs equal. Once done, the residual output offset voltage will be the input offset voltage (VOS) multiplied by the desired gain (AV). Application Note OA-7 offers several solutions to further reduce the output offset. Output and Supply Considerations With ± 5V supplies, the CLC5802 is capable of a typical output swing of ± 3.6V under a no-load condition. Additional output swing is possible with slightly higher supply voltages. For loads of less than 50Ω, the output swing will be limited by the CLC5802’s output current capability, typically 70mA. Output settling time when driving capacitive loads can be improved by the use of a series output resistor. See the plot labeled “Settling Time vs. Capacitive Load” in the Typical Performance Characteristics section. Layout Proper power supply bypassing is critical to insure good high frequency performance and low noise. De-coupling capacitors of 0.1µF should be placed as close as possible to the power supply pins. The use of surface mounted capacitors is recommended due to their low series inductance. A good high frequency layout will keep power supply and ground traces away from the inverting input and output pins. Parasitic capacitance from these nodes to ground causes frequency response peaking and possible circuit oscillation. See OA-15 for more information. National suggests the CLC730038 (through-hole) or the CLC730036 (SOIC) dual op amp evaluation board as a guide for high frequency layout and as an aid in device evaluation. Full Duplex Digital or Analog Transmission Simultaneous transmission and reception of analog or digital signals over a single coaxial cable or twisted-pair line can reduce cabling requirements. The CLC5802’s wide bandwidth and high common-mode rejection in a differential amplifier configuration allows full duplex transmission of video, telephone, control and audio signals. In the circuit shown in Figure 1, one of the CLC5802’s amps is used as a “driver” and the other as a difference “receiver” amplifier. The output impedance of the “driver” is essentially zero. The two R’s are chosen to match the characteristic impedance of the transmission line. The “driver” op amp gain can be selected for unity or greater. Receiver amplifier A2 (B2) is connected across R and forms a differential amplifier for the signals transmitted by driver A1 (B1). If the coax cable is lossless and Rf equals Rg, receiver A2 (B2) will then reject the signals from driver A1 (B1) and pass the signals from driver B1 (A1). DS101341-28 FIGURE 1. The output of the receiver amplifier will be: (1) Care must be given to layout and component placement to maintain a high frequency common-mode rejection. The plot of Figure 2 show the simultaneous reception of signals transmitted at 1MHz and 10MHz. DS101341-25 FIGURE 2. Five Decade Integrator A composite integrator, shown in Figure 3, uses the CLC5802 dual op amp to increase the circuits usable frequency range of operation. The transfer function of this circuit is: (2) DS101341-27 FIGURE 3. 9 www.national.com CLC5802 Application Information (Continued) A resistive divider made from the 143Ω and 60.4Ω resistors was chosen to reduce the loop-gain and stabilize the network. The CLC5802 composite integrator provides integration over five decades of operation. R and C set the integrator’s gain. Figure 4 shows the frequency and phase response of the circuit in Figure 3 with R = 44.2Ω and C = 360pF. DS101341-31 FIGURE 6. A current source, built around Q1, provides the necessary bias current for the second amplifier and prevents saturation when power is applied. The resistor, R, closes the loop while diode D2 prevents negative saturation when VIN is less than VC. A MOS-type switch (not shown) can be used to reset the capacitor’s voltage. The maximum speed of detection is limited by the delay of the op amp and the diodes. The use of Schottky diodes will provide faster response. Adjustable or Bandpass Equalizer A “boost” equalizer can be made with the CLC5802 by summing a bandpass response with the input signal, as shown in Figure 7. DS101341-29 FIGURE 4. K: R2/(R1 + R2) A0: Op amp low Frequency open loop gain Positive Peak Detector The CLC5802’s dual amplifiers can be used to implement a unity-gain peak detector circuit as shown in Figure 5. DS101341-32 FIGURE 7. The overall transfer function is shown in Equation (3). DS101341-30 FIGURE 5. The acquisition speed of this circuit is limited by the dynamic resistance of the diode when charging Chold. A plot of the circuit’s performance is shown in Figure 6 with a 1MHz sinusoidal input. (3) To build a boost circuit, use the design Equation 4 and 5. (4) (5) Select R2 and C using Equation (4). Use reasonable values for high frequency circuits - R2 between 10Ω and 5kΩ, C between 10pF and 2000pF. Use Equation (5) to determine the parallel combination of Ra and Rb. Select Ra and Rb by either the 10Ω to 5kΩ criteria or by other requirements based on the impedance VIN is capable of driving. Finish the design by determining the value of K from Equation (6). www.national.com 10 CLC5802 Application Information (Continued) (6) Figure 8 shows an example of the response of the circuit of Figure 7, where fO is 2.3MHz. The component values are as follows: Ra = 2.1kΩ, Rb = 68.5Ω, R2 = 4.22kΩ, R = 500Ω, KR = 50Ω, C = 120pF. DS101341-36 FIGURE 8. 11 www.national.com CLC5802 Dual Low-Noise, Voltage Feedback Op Amp Physical Dimensions inches (millimeters) unless otherwise noted 8-Pin SOIC NS Package Number M08A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com www.national.com National Semiconductor Europe Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 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