LF347N

LF147/LF347 Wide Bandwidth Quad JFET Input Operational Amplifiers May 1999 LF147/LF347 Wide Bandwidth Quad JFET Input Operational Amplifiers General Description The LF147 is a low cost, high speed quad JFET input operational amplifier with an internally trimmed input offset voltage (BI-FET II™ technology). The device requires a low supply current and yet maintains a large gain bandwidth product and a fast slew rate. In addition, well matched high voltage JFET input devices provide very low input bias and offset currents. The LF147 is pin compatible with the standard LM148. This feature allows designers to immediately upgrade the overall performance of existing LF148 and LM124 designs. The LF147 may be used in applications such as high speed integrators, fast D/A converters, sample-and-hold circuits and many other circuits requiring low input offset voltage, low input bias current, high input impedance, high slew rate and wide bandwidth. The device has low noise and offset voltage drift. Features n n n n n n n n Internally trimmed offset voltage: 5 mV max Low input bias current: 50 pA Low input noise current: Wide gain bandwidth: 4 MHz High slew rate: 13 V/µs Low supply current: 7.2 mA High input impedance: 1012Ω Low total harmonic distortion AV = 10,: < 0.02% RL = 10k, VO = 20 Vp-p, BW = 20 Hz−20 kHz n Low 1/f noise corner: 50 Hz n Fast settling time to 0.01%: 2 µs Simplified Schematic 14 Connection Diagram Dual-In-Line Package ⁄ Quad DS005647-1 DS005647-13 Note 1: Available per SMD #8102306, JM38510/11906. Top View Order Number LF147J, LF347M, LF347BN, LF347N or LF147J/883 (Note 1) See NS Package Number J14A, M14A or N14A BI-FET II™ is a trademark of National Semiconductor Corporation. © 1999 National Semiconductor Corporation DS005647 www.national.com Absolute Maximum Ratings (Note 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage Differential Input Voltage Input Voltage Range (Note 3) Output Short Circuit Duration (Note 4) Power Dissipation (Notes 5, 11) Tj max θjA Ceramic DIP (J) Package Plastic DIP (N) Package Surface Mount Narrow (M) LF147 ± 22V ± 38V ± 19V Continuous 900 mW 150˚C LF347B/LF347 ± 18V ± 30V ± 15V Continuous 1000 mW 150˚C 70˚C/W 75˚C/W 100˚C/W (Note 7) Conditions Min VOS ∆VOS/∆T IOS IB RIN AVOL Input Offset Voltage Average TC of Input Offset Voltage Input Offset Current Input Bias Current Input Resistance Large Signal Voltage Gain Tj = 25˚C, (Notes 7, 8) Over Temperature Tj = 25˚C, (Notes 7, 8) Over Temperature Tj = 25˚C VS = ± 15V, TA = 25˚C VO = ± 10V, RL = 2 kΩ Over Temperature VO VCM CMRR PSRR IS Output Voltage Swing Input Common-Mode Voltage Range Common-Mode Rejection Ratio Supply Voltage Rejection Ratio Supply Current RS≤10 kΩ (Note 9) 80 80 VS = ± 15V, RL = 10 kΩ VS = ± 15V 25 25 50 1012 100 50 50 25 100 25 200 50 1012 100 50 25 100 4 200 8 RS = 10 kΩ, TA = 25˚C Over Temperature RS = 10 kΩ 10 LF147 Typ 1 Max 5 8 10 Min LF347B Typ 3 Max 5 7 LF147 Surface Mount Wide (WM) Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering, 10 sec.) Soldering Information Dual-In-Line Package Soldering (10 seconds) Small Outline Package Vapor Phase (60 seconds) Infrared (15 seconds) (Note 6) LF347B/LF347 85˚C/W (Note 6) −65˚C≤TA≤150˚C 260˚C 260˚C 260˚C 215˚C 220˚C See AN-450 “Surface Mounting Methods and Their Effect on Product Reliability” for other methods of soldering surface mount devices. ESD Tolerance (Note 12) 900V DC Electrical Characteristics Symbol Parameter LF347 Min Typ 5 10 25 50 1012 25 15 100 100 4 200 8 Max 10 13 Units mV mV µV/˚C pA nA pA nA Ω V/mV V/mV ± 12 ± 11 ± 13.5 +15 −12 100 100 7.2 11 ± 12 ± 11 80 80 ± 13.5 +15 −12 100 100 7.2 11 ± 12 ± 11 70 70 ± 13.5 +15 −12 100 100 7.2 11 V V V dB dB mA www.national.com 2 AC Electrical Characteristics Symbol Parameter Amplifier to Amplifier Coupling (Note 7) Conditions Min LF147 Typ −120 Max Min LF347B Typ −120 Max Min LF347 Typ −120 Max dB Units TA = 25˚C, f = 1 Hz−20 kHz (Input Referred) SR GBW en Slew Rate Gain-Bandwidth Product Equivalent Input Noise Voltage VS = ± 15V, TA = 25˚C VS = ± 15V, TA = 25˚C TA = 25˚C, RS = 100Ω, f = 1000 Hz 8 2.2 13 4 20 8 2.2 13 4 20 8 2.2 13 4 20 V/µs MHz in Equivalent Input Noise Current Tj = 25˚C, f = 1000 Hz 0.01 0.01 0.01 Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. Note 3: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage. Note 4: Any of the amplifier outputs can be shorted to ground indefinitely, however, more than one should not be simultaneously shorted as the maximum junction temperature will be exceeded. Note 5: For operating at elevated temperature, these devices must be derated based on a thermal resistance of θjA. Note 6: The LF147 is available in the military temperature range −55˚C≤TA≤125˚C, while the LF347B and the LF347 are available in the commercial temperature range 0˚C≤TA≤70˚C. Junction temperature can rise to Tj max = 150˚C. Note 7: Unless otherwise specified the specifications apply over the full temperature range and for VS = ± 20V for the LF147 and for VS = ± 15V for the LF347B/LF347. VOS, IB, and IOS are measured at VCM = 0. Note 8: The input bias currents are junction leakage currents which approximately double for every 10˚C increase in the junction temperature, Tj. Due to limited production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation, PD. Tj = TA+θjA PD where θjA is the thermal resistance from junction to ambient. Use of a heat sink is recommended if input bias current is to be kept to a minimum. Note 9: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice from VS = ± 5V to ± 15V for the LF347 and LF347B and from VS = ± 20V to ± 5V for the LF147. Note 10: Refer to RETS147X for LF147D and LF147J military specifications. Note 11: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate outside guaranteed limits. Note 12: Human body model, 1.5 kΩ in series with 100 pF. 3 www.national.com Typical Performance Characteristics Input Bias Current Input Bias Current Supply Current DS005647-14 DS005647-15 DS005647-16 Positive Common-Mode Input Voltage Limit Negative Common-Mode Input Voltage Limit Positive Current Limit DS005647-19 DS005647-17 DS005647-18 Negative Current Limit Output Voltage Swing Output Voltage Swing DS005647-20 DS005647-21 DS005647-22 www.national.com 4 Typical Performance Characteristics Gain Bandwidth Bode Plot (Continued) Slew Rate DS005647-23 DS005647-24 DS005647-25 Distortion vs Frequency Undistorted Output Voltage Swing Open Loop Frequency Response DS005647-26 DS005647-27 DS005647-28 Common-Mode Rejection Ratio Power Supply Rejection Ratio Equivalent Input Noise Voltage DS005647-29 DS005647-30 DS005647-31 5 www.national.com Typical Performance Characteristics Open Loop Voltage Gain (Continued) Inverter Settling Time Output Impedance DS005647-32 DS005647-33 DS005647-34 www.national.com 6 Pulse Response RL = 2 kΩ, CL = 10 pF Small Signal Non-Inverting Small Signal Inverting DS005647-4 DS005647-5 Large Signal Inverting Large Signal Non-Inverting DS005647-6 DS005647-7 Current Limit (RL = 100Ω) DS005647-8 Application Hints The LF147 is an op amp with an internally trimmed input offset voltage and JFET input devices (BI-FET II). These JFETs have large reverse breakdown voltages from gate to source and drain eliminating the need for clamps across the inputs. Therefore, large differential input voltages can easily be accommodated without a large increase in input current. The maximum differential input voltage is independent of the supply voltages. However, neither of the input voltages should be allowed to exceed the negative supply as this will cause large currents to flow which can result in a destroyed unit. 7 Exceeding the negative common-mode limit on either input will force the output to a high state, potentially causing a reversal of phase to the output. Exceeding the negative common-mode limit on both inputs will force the amplifier output to a high state. In neither case does a latch occur since raising the input back within the common-mode range again puts the input stage and thus the amplifier in a normal operating mode. www.national.com Application Hints (Continued) Exceeding the positive common-mode limit on a single input will not change the phase of the output; however, if both inputs exceed the limit, the output of the amplifier will be forced to a high state. The amplifiers will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition. When the negative common-mode voltage swings to within 3V of the negative supply, an increase in input offset voltage may occur. Each amplifier is individually biased by a zener reference which allows normal circuit operation on ± 4.5V power supplies. Supply voltages less than these may result in lower gain bandwidth and slew rate. The LF147 will drive a 2 kΩ load resistance to ± 10V over the full temperature range. If the amplifier is forced to drive heavier load currents, however, an increase in input offset voltage may occur on the negative voltage swing and finally reach an active current limit on both positive and negative swings. Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards in a socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the internal conductors and result in a destroyed unit. As with most amplifiers, care should be taken with lead dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the input to minimize “pick-up” and maximize the frequency of the feedback pole by minimizing the capacitance from the input to ground. A feedback pole is created when the feedback around any amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many instances the frequency of this pole is much greater than the expected 3 dB frequency of the closed loop gain and consequently there is negligible effect on stability margin. However, if the feedback pole is less than approximately 6 times the expected 3 dB frequency a lead capacitor should be placed from the output to the input of the op amp. The value of the added capacitor should be such that the RC time constant of this capacitor and the resistance it parallels is greater than or equal to the original feedback pole time constant. Detailed Schematic DS005647-9 www.national.com 8 Typical Applications Digitally Selectable Precision Attenuator DS005647-10 All resistors 1% tolerance • • • • Accuracy of better than 0.4% with standard 1% value resistors No offset adjustment necessary Expandable to any number of stages Very high input impedance A1 0 0 0 0 1 1 1 1 A2 0 0 1 1 0 0 1 1 A3 0 1 0 1 0 1 0 1 VO Attenuation 0 −1 dB −2 dB −3 dB −4 dB −5 dB −6 dB −7 dB 9 www.national.com Typical Applications (Continued) Long Time Integrator with Reset, Hold and Starting Threshold Adjustment DS005647-11 • VOUT starts from zero and is equal to the integral of the input voltage with respect to the threshold voltage: • • • Output starts when VIN≥VTH Switch S1 permits stopping and holding any output value Switch S2 resets system to zero www.national.com 10 Typical Applications (Continued) Universal State Variable Filter DS005647-12 For circuit shown: fo = 3 kHz, fNOTCH = 9.5 kHz Q = 3.4 Passband gain: Highpass — 0.1 Bandpass — 1 Lowpass — 1 Notch — 10 • foxQ≤200 kHz • 10V peak sinusoidal output swing without slew limiting to 200 kHz • See LM148 data sheet for design equations 11 www.national.com Physical Dimensions inches (millimeters) unless otherwise noted Ceramic Dual-In-Line Package (J) Order Number LF147J or LF147J/883 NS Package Number J14A S.O. Package (M) Order Number LF347M NS Package Number M14A www.national.com 12 LF147/LF347 Wide Bandwidth Quad JFET Input Operational Amplifiers Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Molded Dual-In-Line Package (N) Order Number LF347BN or LF347N NS Package Number N14A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.