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LF411XYZ

LF411XYZ

  • 厂商:

    NSC

  • 封装:

  • 描述:

    LF411XYZ - Low Offset, Low Drift JFET Input Operational Amplifier - National Semiconductor

  • 数据手册
  • 价格&库存
LF411XYZ 数据手册
LF411 Low Offset, Low Drift JFET Input Operational Amplifier April 1998 LF411 Low Offset, Low Drift JFET Input Operational Amplifier General Description These devices are low cost, high speed, JFET input operational amplifiers with very low input offset voltage and guaranteed input offset voltage drift. They require low supply current yet maintain a large gain bandwidth product and fast slew rate. In addition, well matched high voltage JFET input devices provide very low input bias and offset currents. The LF411 is pin compatible with the standard LM741 allowing designers to immediately upgrade the overall performance of existing designs. These amplifiers may be used in applications such as high speed integrators, fast D/A converters, sample and hold circuits and many other circuits requiring low input offset voltage and drift, low input bias current, high input impedance, high slew rate and wide bandwidth. Features Internally trimmed offset voltage: 0.5 mV(max) Input offset voltage drift: 10 µV/˚C(max) Low input bias current: 50 pA Low input noise current: Wide gain bandwidth: 3 MHz(min) High slew rate: 10V/µs(min) Low supply current: 1.8 mA High input impedance: 1012Ω Low total harmonic distortion AV = 10, RL = 10k, VO = 20 Vp-p, BW = 20 Hz−20 kHz: < 0.02% n Low 1/f noise corner: 50 Hz n Fast settling time to 0.01%: 2 µs n n n n n n n n n Typical Connection Connection Diagrams Metal Can Package DS005655-5 Note: Pin 4 connected to case. DS005655-1 Top View Order Number LF411ACH or LF411MH/883 (Note 1) See NS Package Number H08A Dual-In-Line Package Ordering Information LF411XYZ X indicates electrical grade Y indicates temperature range “M” for military “C” for commercial Z indicates package type “H” or “N” DS005655-7 Top View Order Number LF411ACN, LF411CN or LF411MJ/883 (Note 1) See NS Package Number N08E or J08A BI-FET II™ is a trademark of National Semiconductor Corporation. © 1999 National Semiconductor Corporation DS005655 www.national.com Simplified Schematic DS005655-6 Note 1: Available per JM38510/11904 www.national.com 2 Absolute Maximum Ratings (Note 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage Differential Input Voltage Input Voltage Range (Note 3) Output Short Circuit Duration Power Dissipation (Notes 4, 11) LF411A ± 22V ± 38V LF411 ± 18V ± 30V Tjmax θ jA ± 19V Continuous H Package 670 mW ± 15V Continuous N Package 670 mW (Note 6) θjC Operating Temp. Range Storage Temp. Range Lead Temp. (Soldering, 10 sec.) ESD Tolerance H Package 150˚C 162˚C/W (Still Air) 65˚C/W (400 LF/min Air Flow) 20˚C/W (Note 5) −65˚C≤TA≤150˚C 260˚C N Package 115˚C 120˚C/W (Note 5) −65˚C≤TA≤150˚C 260˚C Rating to be determined. DC Electrical Characteristics Symbol VOS ∆VOS/∆T IOS Parameter Input Offset Voltage Average TC of Input Offset Voltage Input Offset Current VS = ± 15V (Notes 6, 8) IB Input Bias Current VS = ± 15V (Notes 6, 8) RIN AVOL Input Resistance Large Signal Voltage Gain VO VCM CMRR PSRR IS Output Voltage Swing Input Common-Mode Voltage Range Common-Mode Rejection Ratio Supply Voltage Rejection Ratio Supply Current (Note 9) RS≤10k Conditions Min RS = 10 kΩ, TA = 25˚C RS = 10 kΩ (Note 7) Tj = 25˚C Tj = 70˚C Tj = 125˚C Tj = 25˚C Tj = 70˚C Tj = 125˚C Tj = 25˚C VS = ± 15V, VO = ± 10V, RL = 2k, TA = 25˚C Over Temperature VS = ± 15V, RL = 10k LF411A Typ 0.3 7 25 Max 0.5 10 100 2 25 50 200 4 50 1012 50 25 200 200 25 15 Min LF411 Typ 0.8 7 25 Max 2.0 20 (Note 7) 100 2 25 50 200 4 50 1012 200 200 Units mV µV/˚C pA nA nA pA nA nA Ω V/mV V/mV V V V dB dB 3.4 mA ± 12 ± 16 80 80 ± 13.5 +19.5 −16.5 100 100 1.8 2.8 ± 12 ± 11 70 70 ± 13.5 +14.5 −11.5 100 100 1.8 AC Electrical Characteristic Symbol SR GBW en in Slew Rate Gain-Bandwidth Product Equivalent Input Noise Voltage Equivalent Input Noise Current Parameter (Note 6) Conditions Min LF411A Typ 15 4 25 0.01 Max Min 8 2.7 10 3 LF411 Typ 15 4 25 0.01 Max V/µs MHz Units VS = ± 15V, TA = 25˚C VS = ± 15V, TA = 25˚C TA = 25˚C, RS = 100Ω, f = 1 kHz TA = 25˚C, f = 1 kHz Note 2: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. Note 3: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage. 3 www.national.com AC Electrical Characteristic (Note 6) (Continued) Note 4: For operating at elevated temperature, these devices must be derated based on a thermal resistance of θjA. Note 5: These devices are available in both the commercial temperature range 0˚C≤TA≤70˚C and the military temperature range −55˚C≤TA≤125˚C. The temperature range is designated by the position just before the package type in the device number. A “C” indicates the commercial temperature range and an “M” indicates the military temperature range. The military temperature range is available in “H” package only. Note 6: Unless otherwise specified, the specifications apply over the full temperature range and for VS = ± 20V for the LF411A and for VS = ± 15V for the LF411. VOS, IB, and IOS are measured at VCM = 0. Note 7: The LF411A is 100% tested to this specification. The LF411 is sample tested to insure at least 90% of the units meet this specification. Note 8: The input bias currents are junction leakage currents which approximately double for every 10˚C increase in the junction temperature, Tj. Due to limited production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation, PD. Tj = TA+θjA PD where θjA is the thermal resistance from junction to ambient. Use of a heat sink is recommended if input bias current is to be kept to a minimum. Note 9: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice, from ± 15V to ± 5V for the LF411 and from ± 20V to ± 5V for the LF411A. Note 10: RETS 411X for LF411MH and LF411MJ military specifications. Note 11: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate outside guaranteed limits. Typical Performance Characteristics Input Bias Current Input Bias Current Supply Current DS005655-11 DS005655-12 DS005655-13 Positive Common-Mode Input Voltage Limit Negative Common-Mode Input Voltage Limit Positive Current Limit DS005655-16 DS005655-14 DS005655-15 www.national.com 4 Typical Performance Characteristics Negative Current Limit (Continued) Output Voltage Swing Output Voltage Swing DS005655-17 DS005655-18 DS005655-19 Gain Bandwidth Bode Plot Slew Rate DS005655-20 DS005655-21 DS005655-22 Distortion vs Frequency Undistorted Output Voltage Swing Open Loop Frequency Response DS005655-23 DS005655-24 DS005655-25 5 www.national.com Typical Performance Characteristics Common-Mode Rejection Ratio Power Supply Rejection Ratio (Continued) Equivalent Input Noise Voltage DS005655-26 DS005655-27 DS005655-28 Open Loop Voltage Gain Output Impedance Inverter Settling Time DS005655-29 DS005655-30 DS005655-31 Pulse Response RL = 2 kΩ, CL10 pF Small Signal Non-Inverting Small Signal Inverting DS005655-39 DS005655-40 www.national.com 6 Pulse Response RL = 2 kΩ, CL10 pF (Continued) Large Signal Non-Inverting Large Signal Inverting DS005655-41 DS005655-42 Current Limit (RL = 100Ω) DS005655-43 Application Hints The LF411 series of internally trimmed JFET input op amps ( BI-FET II™ ) provide very low input offset voltage and guaranteed input offset voltage drift. These JFETs have large reverse breakdown voltages from gate to source and drain eliminating the need for clamps across the inputs. Therefore, large differential input voltages can easily be accommodated without a large increase in input current. The maximum differential input voltage is independent of the supply voltages. However, neither of the input voltages should be allowed to exceed the negative supply as this will cause large currents to flow which can result in a destroyed unit. Exceeding the negative common-mode limit on either input will force the output to a high state, potentially causing a reversal of phase to the output. Exceeding the negative common-mode limit on both inputs will force the amplifier output to a high state. In neither case does a latch occur since raising the input back within the common-mode range again puts the input stage and thus the amplifier in a normal operating mode. Exceeding the positive common-mode limit on a single input will not change the phase of the output; however, if both inputs exceed the limit, the output of the amplifier may be forced to a high state. The amplifier will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition. When the negative common-mode voltage swings to within 3V of the negative supply, an increase in input offset voltage may occur. The LF411 is biased by a zener reference which allows normal circuit operation on ± 4.5V power supplies. Supply voltages less than these may result in lower gain bandwidth and slew rate. The LF411 will drive a 2 kΩ load resistance to ± 10V over the full temperature range. If the amplifier is forced to drive heavier load currents, however, an increase in input offset voltage may occur on the negative voltage swing and finally reach an active current limit on both positive and negative swings. Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards in a socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the internal conductors and result in a destroyed unit. As with most amplifiers, care should be taken with lead dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the input to minimize “pick-up” and maximize the frequency of the feedback pole by minimizing the capacitance from the input to ground. A feedback pole is created when the feedback around any amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many instances the frequency of this pole is much greater than the expected 3 dB frequency of the closed loop gain and consequently there is negligible effect on stability margin. However, if the feedback pole is less than approximately 6 times the expected 3 dB frequency, a lead capacitor should be placed 7 www.national.com Application Hints (Continued) from the output to the input of the op amp. The value of the added capacitor should be such that the RC time constant of this capacitor and the resistance it parallels is greater than or equal to the original feedback pole time constant. Typical Applications High Speed Current Booster DS005655-9 PNP = 2N2905 NPN = 2N2219 unless noted TO-5 heat sinks for Q6-Q7 www.national.com 8 Typical Applications (Continued) 10-Bit Linear DAC with No VOS Adjust DS005655-32 where AN = 1 if the AN digital input is high AN = 0 if the AN digital input is low Single Supply Analog Switch with Buffered Output DS005655-33 9 www.national.com Detailed Schematic DS005655-34 www.national.com 10 Physical Dimensions inches (millimeters) unless otherwise noted Metal Can Package (H) Order Number LF411MH/883 or LF411ACH NS Package Number H08A Ceramic Dual-In-Line Package (J) Order Number LF411MJ/883 NS Package Number J08A 11 www.national.com LF411 Low Offset, Low Drift JFET Input Operational Amplifier Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Molded Dual-In-Line Package (N) Order Number LF411ACN or LF411CN NS Package Number N08E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com www.national.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Français Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: sea.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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