LF444 Quad Low Power JFET Input Operational Amplifier
May 1998
LF444 Quad Low Power JFET Input Operational Amplifier
General Description
The LF444 quad low power operational amplifier provides many of the same AC characteristics as the industry standard LM148 while greatly improving the DC characteristics of the LM148. The amplifier has the same bandwidth, slew rate, and gain (10 kΩ load) as the LM148 and only draws one fourth the supply current of the LM148. In addition the well matched high voltage JFET input devices of the LF444 reduce the input bias and offset currents by a factor of 10,000 over the LM148. The LF444 also has a very low equivalent input noise voltage for a low power amplifier. The LF444 is pin compatible with the LM148 allowing an immediate 4 times reduction in power drain in many applications. The LF444 should be used wherever low power dissipation and good electrical characteristics are the major considerations.
Features
n n n n n
1⁄4 supply current of a LM148: 200 µA/Amplifier (max) Low input bias current: 50 pA (max) High gain bandwidth: 1 MHz High slew rate: 1 V/µs Low noise voltage for low power
n Low input noise current
n High input impedance: 1012Ω n High gain VO = ± 10V, RL = 10k:
50k (min)
Simplified Schematic
1/4 Quad
Connection Diagram
Dual-In-Line Package
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Ordering Information
LF444XYZ X indicates electrical grade Y indicates temperature range “M” for military, “C” for commercial Z indicates package type “D”, “M” or “N”
Top View Order Number LF444AMD, LF444CM, LF444ACN, LF444CN or LF444MD/883 See NS Package Number D14E, M14A or N14A
BI-FET™ and BI-FET II™ are trademarks of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation
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Absolute Maximum Ratings (Note 11)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage Differential Input Voltage Input Voltage Range (Note 1) Output Short Circuit Duration (Note 2) Power Dissipation (Notes 3, 9) Tj max θjA (Typical) LF444A ± 22V ± 38V ± 19V Continuous D Package 900 mW 150˚C 100˚C/W LF444 ± 18V ± 30V ± 15V Continuous Operating Temperature Range Storage Temperature Range ESD Tolerance (Note 10)
LF444A/LF444 (Note 4) −65˚C ≤ TA ≤ 150˚C Rating to be determined
N, M Packages 670 mW 115˚C 85˚C/W (Note 5)
Soldering Information Dual-In-Line Packages (Soldering, 10 sec.) 260˚C Small Outline Package Vapor Phase (60 sec.) 215˚C Infrared (15 sec.) 220˚C See AN-450 “Surface Mounting Methods and Their Effect on Product Reliability” for other methods of soldering surface mount devices.
DC Electrical Characteristics
Symbol VOS Parameter Input Offset Voltage
Conditions Min RS = 10k, TA = 25˚C 0˚C ≤ TA ≤ +70˚C −55˚C ≤ TA ≤ +125˚C RS = 10 kΩ VS = ± 15V (Notes 5, 6) Tj = 25˚C Tj = 70˚C Tj = 125˚C Tj = 25˚C Tj = 70˚C Tj = 125˚C 50 25
LF444A Typ 2 Max 5 6.5 8 10 5 25 1.5 10 10 50 3 20 1012 100 25 15 Min
LF444 Typ 3 Max 10 12 10 5 50 1.5 10 100 3 1012 100
Units mV mV mV µV/˚C pA nA nA pA nA nA Ω V/mV V/mV
∆VOS/∆T IOS
Average TC of Input Offset Voltage Input Offset Current
IB
Input Bias Current
VS = ± 15V (Notes 5, 6)
RIN AVOL
Input Resistance Large Signal Voltage Gain
Tj = 25˚C VS = ± 15V, VO = ± 10V RL = 10 kΩ, TA = 25˚C Over Temperature VS = ± 15V, RL = 10 kΩ
VO VCM CMRR PSRR IS
Output Voltage Swing Input Common-Mode Voltage Range Common-Mode Rejection Ratio Supply Voltage Rejection Ratio Supply Current
± 12 ± 16
80 80
± 13
+18 −17 100 100 0.6 0.8
± 12 ± 11
70 70
± 13
+14 −12 95 90 0.6 1.0
V V V dB dB mA
RS ≤ 10 kΩ (Note 7)
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AC Electrical Characteristics
Symbol Parameter Amplifier-to-Amplifier Coupling SR GBW en Slew Rate Gain-Bandwidth Product Equivalent Input Noise Voltage
(Note 5) Conditions Min LF444A Typ −120 Max Min LF444 Typ −120 1 1 35 Max dB V/µs MHz Units
VS = ± 15V, TA = 25˚C VS = ± 15V, TA = 25˚C TA = 25˚C, RS = 100Ω, f = 1 kHz TA = 25˚C, f = 1 kHz
1 1 35
in
Equivalent Input Noise Current
0.01
0.01
Note 1: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage. Note 2: Any of the amplifier outputs can be shorted to ground indefinitely, however, more than one should not be simultaneously shorted as the maximum junction temperature will be exceeded. Note 3: For operating at elevated temperature, these devices must be derated based on a thermal resistance of θjA. Note 4: The LF444A is available in both the commercial temperature range 0˚C ≤ TA ≤ 70˚C and the military temperature range −55˚C ≤ TA ≤ 125˚C. The LF444 is available in the commercial temperature range only. The temperature range is designated by the position just before the package type in the device number. A “C” indicates the commercial temperature range and an “M” indicates the military temperature range. The military temperature range is available in “D” package only. Note 5: Unless otherwise specified the specifications apply over the full temperature range and for VS = ± 20V for the LF444A and for VS = ± 15V for the LF444. VOS, IB, and IOS are measured at VCM = 0. Note 6: The input bias currents are junction leakage currents which approximately double for every 10˚C increase in the junction temperature, Tj. Due to limited production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation, PD. Tj = TA + θjAPD where θjA is the thermal resistance from junction to ambient. Use of a heat sink is recommended if input bias current is to be kept to a minimum. Note 7: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice from ± 15V to ± 5V for the LF444 and from ± 20V to ± 5V for the LF444A. Note 8: Refer to RETS444X for LF444MD military specifications. Note 9: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate outside guaranteed limits. Note 10: Human body model, 1.5 kΩ in series with 100 pF. Note 11: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is given, however, the typical value is a good indication of device performance.
Typical Performance Characteristics
Input Bias Current Input Bias Current Supply Current
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Typical Performance Characteristics
Positive Common-Mode Input Voltage Limit
(Continued)
Negative Common-Mode Input Voltage Limit
Positive Current Limit
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Negative Current Limit
Output Voltage Swing
Output Voltage Swing
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Gain Bandwidth
Bode Plot
Slew Rate
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Typical Performance Characteristics
Distortion vs Frequency
(Continued)
Undistorted Output Voltage Swing
Open Loop Frequency Response
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Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Equivalent Input Noise Voltage
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Open Loop Voltage Gain
Output Impedance
Inverter Settling Time
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Pulse Response
RL = 10 kΩ, CL = 10 pF Small Signal Non-Inverting
Small Signal Inverting
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Large Signal Inverting
Large Signal Non-Inverting
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Application Hints
This device is a quad low power op amp with JFET input devices ( BI-FET™). These JFETs have large reverse breakdown voltages from gate to source and drain eliminating the need for clamps across the inputs. Therefore, large differential input voltages can easily be accommodated without a large increase in input current. The maximum differential input voltage is independent of the supply voltages. However, neither of the input voltages should be allowed to exceed the negative supply as this will cause large currents to flow which can result in a destroyed unit. Exceeding the negative common-mode limit on either input will force the output to a high state, potentially causing a reversal of phase to the output. Exceeding the negative common-mode limit on both inputs will force the amplifier output to a high state. In neither case does a latch occur since raising the input back within the common-mode range again puts the input stage and thus the amplifier in a normal operating mode.
Exceeding the positive common-mode limit on a single input will not change the phase of the output; however, if both inputs exceed the limit, the output of the amplifier will be forced to a high state. The amplifiers will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition. When the negative common-mode voltage swings to within 3V of the negative supply, an increase in input offset voltage may occur. Each amplifier is individually biased to allow normal circuit operation with power supplies of ± 3.0V. Supply voltages less than these may degrade the common-mode rejection and restrict the output voltage swing. The amplifiers will drive a 10 kΩ load resistance to ± 10V over the full temperature range. If the amplifier is forced to drive heavier load currents, however, an increase in input offset voltage may occur on the negative voltage swing and finally reach an active current limit on both positive and negative swings.
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Application Hints
(Continued)
Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards in a socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the internal conductors and result in a destroyed unit. As with most amplifiers, care should be taken with lead dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the input to minimize “pick-up” and maximize the frequency of the feedback pole by minimizing the capacitance from the input to ground.
A feedback pole is created when the feedback around any amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many instances the frequency of this pole is much greater than the expected 3 dB frequency of the closed loop gain and consequently there is negligible effect on stability margin. However, if the feedback pole is less than approximately 6 times the expected 3 dB frequency a lead capacitor should be placed from the output to the input of the op amp. The value of the added capacitor should be such that the RC time constant of this capacitor and the resistance it parallels is greater than or equal to the original feedback pole time constant.
Typical Application
pH Probe Amplifier/Temperature Compensator
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***For R2 = 50k, R4 = 330k ± 1%
For R2 = 100k, R4 = 75k ± 1% For R2 = 200k, R4 = 56k ± 1% **Polystyrene *Film resistor type RN60C To calibrate, insert probe in pH = 7 solution. Set the “TEMPERATURE ADJUST” pot, R2, to correspond to the solution temperature: full clockwise for 0˚C, and proportionately for intermediate temperatures, using a turns-counting dial. Then set “CALIBRATE” pot so output reads 7V. Typical probe = Ingold Electrodes #465-35
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Detailed Schematic
1/4 Quad
DS009156-11
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Physical Dimensions
inches (millimeters) unless otherwise noted
Order Number LF444AMD or LF444MD/883 See NS Package Number D14E
Order Number LF444CM See NS Package Number M14A
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LF444 Quad Low Power JFET Input Operational Amplifier
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
Order Number LF444ACN or LF444CN See NS Package Number N14A
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