LM10520 20A Adaptive Voltage Scaling (AVS) Evaluation Board
LM10520 20A Adaptive Voltage Scaling (AVS) Evaluation Board
General Description
The LM10520 is a single-phase Energy Management Unit (EMU) that actively reduces system-level power consumption by utilizing a continuous, real-time, closed-loop Adaptive Voltage Scaling (AVS) scheme. The AVS technology enables optimum energy management delivery to the load in order to maximize system-level energy savings. The LM10520 evaluation board is capable of delivering up to 20A with an output voltage range of 0.6V - 1.2 V. It includes a DOSA compatible edge connector to enable convenient evaluation of AVS on a high performance ASIC or FPGA which typically require between 10A - 20A. Most of the features of the device can be accessed through jumper settings and the PWI interface. The LM10520 evaluation kit ships with 2 adaptor boards. The PWI2USB board allows connection to a PC for GUI control of the device. The AVS adaptor board stacks on top of the USB2PWI board and provides a header to connect to the LM10520. The AVS adaptor board also provides power connectors to conveniently apply high current loads and high voltage inputs that USB can not provide.
National Semiconductor Application Note 2058 Mark Hartman November 2, 2010
Features
• • • • • • • • • • Closed-loop/Adaptive Voltage Scaling (AVS) PWI 1.0/PWI 2.0 compatible Startup with a pre-biased output load Adjustable soft-start/tracking support PGOOD flag and shutdown Under Voltage Lock Out (UVLO) Over Voltage Protection (OVP) Ability to synchronize switching frequency Cycle-by-cycle current limiting Thermal Shutdown
Applications
• • • • • Point of Load regulation Servers and networking cards Set-top-box processors Video processors and graphic cards Medical and industrial processors
Operation Range
Parameter PVIN IPVIN AVIN* IAVIN VOUT IOUT 0.72 0 4.75 Min Max 14 Units V A V mA V A
∼5
∼3
5.25 100 1.2 20
* AVIN improves efficiency, but is not required.
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System Diagram
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FIGURE 1. 20A Module System Connections
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Connections
Dimensions are in inches Pin Diameter is 0.025 inches.
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FIGURE 2. Board Dimensions
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Pin Descriptions
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Parameter VOUT VOUT SENSE Vout GND GND GND SCLK SPWI VPWI AVIN PGOOD I Share GND VIN VIN SEQ TRIM ON/OFF Power input voltage. Power input voltage. Not used Not used Drive this pin between 1.3V and AVIN to enable the output voltage. Pulling this pin to ground shuts down the output and the device. PWI clock PWI data PWI supply input 3.3V/ 2.5V/ 1.8V Analog input voltage. 4.5V - 5.5V Power good signal output Not used AVS output voltage AVS output voltage AVS output voltage feedback. Route a separate (low current) trace from this pin to the point of load. AVS output voltage Description
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Typical Performance Curves
Efficiency (PVIN = 12V, AVIN = 4.5V, fs = 300 kHz
100 95
EFFIICIENCY (%)
VOUT = 1.2V VOUT = 1.0V
Load Transient Response
90 85 80 75 70
VOUT = 0.9V
VOUT = 0.8V
0
2
4
6
8 10 12 14 16 18 20 IOUT (A)
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Switching Waveforms
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Startup Guide
STANDALONE The LM10520 evaluation board can operate from a single bias at PVIN (5 - 14V). VOUT is enabled via the ON/OFF pin. It is recommended that this pin be actively driven high or low. CONNECTED TO PC/GUI The LM10520 evaluation board can be connected to a PC and controlled from a GUI by connecting it to the USB2PWI and AVS adaptor boards. The USB2PWI board provides 5V power and PWI communication, while the AVS adaptor board provides a 19-pin DOSA compliant header to connect the LM10520 board into.
The AVS adaptor board provides several options for powering and loading the LM10520 evaluation board. Jumper settings for these configurations are described in table 1, and shown in a simplified schematic in Figure 3. The default configuration provides means for a simple evaluation of LM10520 requiring only a USB connection. However, because of the limited power output of USB, the LM10520 should not be loaded at its output for this configuration. For a wider range of input and output voltage/current, external power supplies and loads can be connected to the AVS adaptor via the banana jacks. See Table 1 for jumper settings to route power through the banana jacks.
TABLE 1. AVS Adaptor Jumper Settings Jumper JP1 Description AVIN* Connection 1-2 2-3 Configuration AVIN connected to USB 5V AVIN provided by LM10520 internal rail (if AVIN banana jack left floating), or AVIN provided externally (if power is provided to AVIN banana jack/DOSA connector) PVIN connected to USB 5V PVIN provided externally Feedback signal taken from remote sense terminal Feedback signal taken from local feedback trace. Feedback ground taken from remote sense terminal. Feedback ground taken from local trace. LM10520 eval board ON/OFF pulled up to AVIN. LM10520 eval board ON/OFF weak pull down to GND
JP2 JP3 JP4 JP5
PVIN Sense + Sense ON/OFF pullup
1-2 2-3 1-2 2-3 1-2 2-3 1-2 2-3
* JP1 only selects how AVIN power is routed to the DOSA receptacle J1. Jumper JP6 on the LM10520 eval board selects how power is routed to the AVIN pin of LM10520.
TABLE 2. LM10520 Evaluation Board Jumper Settings Jumper JP4 JP6 JP7 JP8 JP9 JP10 Connection 1-2 2-3 1-2 2-3 1-2 2-3 1-2 2-3 1-2 2-3 1-2 2-3 Description Connects FLT_N to PWGD Connects FLT_N to GND Connects AVIN to external input Connects AVIN to VIN Connects ENABLE_BIAS to VCC5 Connects ENABLE_BIAS to GND Connects CONTROL to VDD Connects CONTROL to external input Connects RESET_N to VCC5 Connects RESET_N to GND Connects ON/OFF to GND Connects ON/OFF to ENABLE_BIAS
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TABLE 3. LM10520 Input/Measurement Headers Header JP1 JP2 JP3 P1 P2 Tracking input for startup tracking Clock input for Sync function DOSA compliant connector Remote sense measurement. Pins 1-2 measure SENSE to GND. By default, GND is local GND. By removing R13 and connecting pin 3 of the header to the remote GND, pins 1-2 will measure SENSE to remote GND. See schematics. PWI header VOUT measurement Switch node measurement Description Connects VCC5 to PWGD LED indicator
P3 P4 P5
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FIGURE 3. Simplified Schematic of the Jumper Options on the LM10520 Evaluation and AVS Adaptor Boards
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Options
ADJUSTING THE DEFAULT OUTPUT VOLTAGE The default output voltage of LM10520 is set by the feedback resistor divider ratio, RFB1 and RFB2. The default output voltage can be expressed as:
The LM10520 demo board ships with RFB1 and RFB2 = 10 kΩ, which yields a 1.2V default output voltage. Resistor ratios for common default output voltages are shown in Table 4. TABLE 4. Default Output Voltages Default Output Voltage 1.0V 0.9V RFB1 10K 10K RFB2 15K 20K
SENSE The SENSE pin (header P1, pin 3) provides the option for remote feedback connection, so that the LM10520 regulates VCORE as seen at the remote location. This has the benefit of regulating out the IR drops seen across the connector and traces. However, remote sensing is inherent in the AVS loop, and there is no benefit to connecting the SENSE pin when AVS is enabled. By default, the SENSE pin is connected to the three VAVS pins by a 0Ω resistor (R13) on the LM10520 evaluation board. To enable remote sensing, make R13 open, and ensure that the sense pin is connected to the VAVS rail on the motherboard. If the sense pin is not connected to VAVS, the LM10520 will have no feedback, and the output voltage could go as high as the VIN rail.
VPWI
PWI is a push-pull interface, and thus the master and slave I/ O needs to drive to the same voltage. LM10520 has a VPWI input, which determines the high voltage for the PWI I/O. VPWI needs to be the same voltage as the I/O on the slave’s PWI clock and data pins. VPWI must be provided in order for the PWI interface to communicate.
AVIN The AVIN pin can accept a 4.5 – 5.5V input, which is used to bias the analog circuitry of the LM10520. Slightly higher conversion efficiency (when using a 12V power input rail) can be achieved by providing AVIN.
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PowerWise® Interface Address Selection
A 1% resistor at R22 sets the PWI address. PWI Standard RPWI1.0 RPWI2.0-0 RPWI2.0-1 RPWI2.0-2 RPWI2.0-3 RPWI2.0-4 RPWI2.0-5 RPWI2.0-6 RPWI2.0-7 Description Address selection resistor for PWI-1.0 Address selection resistor for PWI-2.0, address 0 Address selection resistor for PWI-2.0, address 1 Address selection resistor for PWI-2.0, address 2 Address selection resistor for PWI-2.0, address 3 Address selection resistor for PWI-2.0, address 4 Address selection resistor for PWI-2.0, address 5 Address selection resistor for PWI-2.0, address 6 Address selection resistor for PWI-2.0, address 7 Min 0 Typ 20 40.2 60.4 80.6 100 120 140 160 180 8 Max Unit kΩ kΩ kΩ kΩ kΩ kΩ kΩ kΩ kΩ
Operating Ratings
The LM10520 evaluation board can provide a 0.72 – 1.2V, 0 – 20A output. Its default voltage upon startup is 1.2V. Using PWI voltage commands, the output voltage can be changed.
Thermal Considerations
The LM10520 evaluation board has not been tested for thermal derating and air flow requirements. In general, the board temperature rise for a 12V single rail input to 1.2V output providing a 10A load with no air flow is about 40°C - 50°C. Therefore, for any load > 10A, it is recommended to place a fan near the board.
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Schematics
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FIGURE 4. LM10520 Schematics: LM10520 and Low-Power Components
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FIGURE 5. LM10520 Schematics: Power Stage
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LM10520 Evaluation Board Bill of Materials
Designator C1 C2 C3 C4, C9 C5 C6 C7 C8 C10, C11 C12 C13, C14 C15 D1 D2, D3, D4 D5 L1 Q1 Q2, Q3 Q5 R1, R2, R3, R4, R14, R16, R17, R18, R20, R23 R5 R6 R7, R11, R26 R8 R9 R10 R12 R13, R15 R19 R21, R22, R24 R27, R33 R28, R29, R31, R32 R30 R34 Rfb1, Rfb2 U1 Comment ECJ-2VB1H153K TMK107BJ474KA-T C1608C0G1H101J GRM21BR71H105KA12L C1608X7R1H102K C1608C0G1H180J C3216X7R1H105K C3225X7R1H225K/2.50 C4532X7R1E226M UMK107B7104KA-T 2R5TPE220M9 GRM1885C1H182JA01D LNJ311G83RA MBR120LSFT1G Vishay SL22-E3/52T SER2010-202ML NDS331N IRF6633 IRF6609 CRCW08051K00FKEA MCR03EZPJ000 CRCW0805100KFKEA CRCW080510R0FKEA CRCW060320K0FKEA RC0603FR-071K82L CRCW060327R0FKEA CRCW060340K2FKEA CRCW06030000Z0EA CRCW060310R0FKEA NL CRCW060310K0FKEA CRCW060362R21FNEA RL3264SW4-005M CRCW0603280RFKEA CRCW080510K0FKEA LM10520 0603 Diode_1206 SOD-123 SMB IHLP6767 SOT23A IRF6722 IRF6609 0805 805 0805 0805 0603 0603 0603 603 0603 0603 0603 0603 0603 M-RES-LKV25 0603 0805 eTSSOP28 Vishay Vishay Vishay Vishay Vishay National Semiconductor Footprint 0805 0603 0603 0805 0603 0603 1206 1210 1812M 0603 Manufacturer Panasonic Taiyo Yuden TDK Murata TDK TDK TDK TDK TDK Taiyo Yuden Taiyo Yuden Murata Panasonic ON Semiconductor Vishay Coilcraft Fairchild Semiconductor Internation Rectifier Internation Rectifier Vishay Rohm Semiconductor Vishay Vishay Vishay Yageo Vishay Vishay Vishay Vishay
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Layout Artwork
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FIGURE 6. Top and Top Overlay
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FIGURE 7. Bottom and Bottom Overlay
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FIGURE 8. Mid-Layer 1
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FIGURE 9. Mid-Layer 2
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FIGURE 10. Mid-Layer 3
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FIGURE 11. Mid-Layer 4
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Notes
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LM10520 20A Adaptive Voltage Scaling (AVS) Evaluation Board
Notes
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