LM13700AN

LM13700/LM13700A Dual Operational Transconductance Amplifiers with Linearizing Diodes and Buffers May 1998 LM13700/LM13700A Dual Operational Transconductance Amplifiers with Linearizing Diodes and Buffers General Description The LM13700 series consists of two current controlled transconductance amplifiers, each with differential inputs and a push-pull output. The two amplifiers share common supplies but otherwise operate independently. Linearizing diodes are provided at the inputs to reduce distortion and allow higher input levels. The result is a 10 dB signal-to-noise improvement referenced to 0.5 percent THD. High impedance buffers are provided which are especially designed to complement the dynamic range of the amplifiers. The output buffers of the LM13700 differ from those of the LM13600 in that their input bias currents (and hence their output DC levels) are independent of IABC. This may result in performance superior to that of the LM13600 in audio applications. n n n n n Excellent gm linearity Excellent matching between amplifiers Linearizing diodes High impedance buffers High output signal-to-noise ratio Applications n n n n n n n Current-controlled amplifiers Current-controlled impedances Current-controlled filters Current-controlled oscillators Multiplexers Timers Sample-and-hold circuits Features n gm adjustable over 6 decades Connection Diagram Dual-In-Line and Small Outline Packages DS007981-2 Top View Order Number LM13700M, LM13700N or LM13700AN See NS Package Number M16A or N16A © 1999 National Semiconductor Corporation DS007981 www.national.com Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (Note 2) LM13700 LM13700A Power Dissipation (Note 3) TA = 25˚C LM13700N, LM13700AN Differential Input Voltage Diode Bias Current (ID) Amplifier Bias Current (IABC) Output Short Circuit Duration Buffer Output Current (Note 4) 36 VDC or ± 18V 44 VDC or ± 22V 570 mW ± 5V 2 mA 2 mA Continuous 20 mA Operating Temperature Range LM13700N, LM13700AN 0˚C to +70˚C DC Input Voltage +VS to −VS Storage Temperature Range −65˚C to +150˚C Soldering Information Dual-In-Line Package Soldering (10 sec.) 260˚C Small Outline Package Vapor Phase (60 sec.) 215˚C Infrared (15 sec.) 220˚C See AN-450 “Surface Mounting Methods and Their Effect on Product Reliability” for other methods of soldering surface mount devices. Electrical Characteristics (Note 5) Parameter Input Offset Voltage (VOS) Over Specified Temperature Range IABC = 5 µA VOS Including Diodes Input Offset Change Input Offset Current Input Bias Current Forward Transconductance (gm) gm Tracking Peak Output Current RL = 0, IABC = 5 µA RL = 0, IABC = 500 µA RL = 0, Over Specified Temp Range RL = ∞, 5 µA ≤ IABC ≤ 500 µA RL = ∞, 5 µA ≤ IABC ≤ 500 µA IABC = 500 µA, Both Channels ∆VOS/∆V+ ∆VOS/∆V− 80 350 300 +12 −12 +14.2 −14.4 2.6 20 20 110 150 150 80 Over Specified Temperature Range Over Specified Temperature Range 6700 5400 0.3 5 500 650 3 350 300 +12 −12 +14.2 −14.4 2.6 20 20 110 150 150 V V mA µV/V µV/V dB V dB 10 5 nA nA kΩ MHz V/µs 2 µA V Diode Bias Current (ID) = 500 µA 5 µA ≤ IABC ≤ 500 µA Conditions Min LM13700 Typ 0.4 0.3 0.5 0.1 0.1 0.4 1 9600 Max 4 4 5 3 0.6 5 8 13000 7700 4000 0.3 5 500 7 650 µA dB Min LM13700A Typ 0.4 0.3 0.5 0.1 0.1 0.4 1 9600 Max 1 2 1 2 1 0.6 5 7 12000 µmho mV mV µA µA mV Units Peak Output Voltage Positive Negative Supply Current VOS Sensitivity Positive Negative CMRR Common Mode Range Crosstalk Differential Input Current Leakage Current Input Resistance Open Loop Bandwidth Slew Rate Buffer Input Current Peak Buffer Output Voltage Unity Gain Compensated (Note 6) (Note 6) 10 Referred to Input (Note 6) 20 Hz < f < 20 kHz IABC = 0, Input = ± 4V IABC = 0 (Refer to Test Circuit) 10 ± 12 ± 13.5 100 0.02 0.2 26 2 50 0.5 2 100 100 ± 12 ± 13.5 100 0.02 0.2 10 26 2 50 0.5 10 Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. Note 2: For selections to a supply voltage above ± 22V, contact factory. www.national.com 2 Electrical Characteristics (Note 5) (Continued) Note 3: For operation at ambient temperatures above 25˚C, the device must be derated based on a 150˚C maximum junction temperature and a thermal resistance, junction to ambient, as follows: LM13700N, 90˚C/W; LM13700M, 110˚C/W. Note 4: Buffer output current should be limited so as to not exceed package dissipation. Note 5: These specifications apply for VS = ± 15V, TA = 25˚C, amplifier bias current (IABC) = 500 µA, pins 2 and 15 open unless otherwise specified. The inputs to the buffers are grounded and outputs are open. Note 6: These specifications apply for VS = ± 15V, IABC = 500 µA, ROUT = 5 kΩ connected from the buffer output to −VS and the input of the buffer is connected to the transconductance amplifier output. Schematic Diagram One Operational Transconductance Amplifier DS007981-1 Typical Performance Characteristics Input Offset Voltage Input Offset Current Input Bias Current DS007981-38 DS007981-39 DS007981-40 3 www.national.com Typical Performance Characteristics Peak Output Current (Continued) Peak Output Voltage and Common Mode Range Leakage Current DS007981-41 DS007981-43 DS007981-42 Input Leakage Transconductance Input Resistance DS007981-44 DS007981-45 DS007981-46 Amplifier Bias Voltage vs Amplifier Bias Current Input and Output Capacitance Output Resistance DS007981-48 DS007981-47 DS007981-49 www.national.com 4 Typical Performance Characteristics Distortion vs Differential Input Voltage (Continued) Voltage vs Amplifier Bias Current Output Noise vs Frequency DS007981-52 DS007981-50 DS007981-51 Unity Gain Follower DS007981-5 Leakage Current Test Circuit Differential Input Current Test Circuit DS007981-6 DS007981-7 Circuit Description The differential transistor pair Q4 and Q5 form a transconductance stage in that the ratio of their collector currents is defined by the differential input voltage according to the transfer function: (1) where VIN is the differential input voltage, kT/q is approximately 26 mV at 25˚C and I5 and I4 are the collector currents of transistors Q5 and Q4 respectively. With the exception of 5 www.national.com Circuit Description (Continued) Q3 and Q13, all transistors and diodes are identical in size. Transistors Q1 and Q2 with Diode D1 form a current mirror which forces the sum of currents I4 and I5 to equal IABC: (2) I4 + I5 = IABC where IABC is the amplifier bias current applied to the gain pin. For small differential input voltages the ratio of I4 and I5 approaches unity and the Taylor series of the In function can be approximated as: amplifier. For convenience assume the diodes are biased with current sources and the input signal is in the form of current IS. Since the sum of I4 and I5 is IABC and the difference is IOUT, currents I4 and I5 can be written as follows: Since the diodes and the input transistors have identical geometries and are subject to similar voltages and temperatures, the following is true: (3) (6) Notice that in deriving Equation (6) no approximations have been made and there are no temperature-dependent terms. The limitations are that the signal current not exceed ID/2 and that the diodes be biased with currents. In practice, replacing the current sources with resistors will generate insignificant errors. (4) Collector currents I4 and I5 are not very useful by themselves and it is necessary to subtract one current from the other. The remaining transistors and diodes form three current mirrors that produce an output current equal to I5 minus I4 thus: (5) The term in brackets is then the transconductance of the amplifier and is proportional to IABC. Applications: Voltage Controlled Amplifiers Figure 2 shows how the linearizing diodes can be used in a voltage-controlled amplifier. To understand the input biasing, it is best to consider the 13 kΩ resistor as a current source and use a Thevenin equivalent circuit as shown in Figure 3. This circuit is similar to Figure 1 and operates the same. The potentiometer in Figure 2 is adjusted to minimize the effects of the control signal at the output. Linearizing Diodes For differential voltages greater than a few millivolts, Equation (3) becomes less valid and the transconductance becomes increasingly nonlinear. Figure 1 demonstrates how the internal diodes can linearize the transfer function of the DS007981-8 FIGURE 1. Linearizing Diodes For optimum signal-to-noise performance, IABC should be as large as possible as shown by the Output Voltage vs. Amplifier Bias Current graph. Larger amplitudes of input signal also improve the S/N ratio. The linearizing diodes help here by allowing larger input signals for the same output distortion as shown by the Distortion vs. Differential Input Voltage graph. S/N may be optimized by adjusting the magnitude of www.national.com 6 the input signal via RIN (Figure 2) until the output distortion is below some desired level. The output voltage swing can then be set at any level by selecting RL. Although the noise contribution of the linearizing diodes is negligible relative to the contribution of the amplifier’s internal transistors, ID should be as large as possible. This minimizes the dynamic junction resistance of the diodes (re) and Applications: Voltage Controlled Amplifiers (Continued) maximizes their linearizing action when balanced against RIN. A value of 1 mA is recommended for ID unless the specific application demands otherwise. DS007981-9 FIGURE 2. Voltage Controlled Amplifier DS007981-10 FIGURE 3. Equivalent VCA Input Circuit Stereo Volume Control The circuit of Figure 4 uses the excellent matching of the two LM13700 amplifiers to provide a Stereo Volume Control with a typical channel-to-channel gain tracking of 0.3 dB. RP is provided to minimize the output offset voltage and may be replaced with two 510Ω resistors in AC-coupled applications. For the component values given, amplifier gain is derived for Figure 2 as being: If VC is derived from a second signal source then the circuit becomes an amplitude modulator or two-quadrant multiplier as shown in Figure 5, where: The constant term in the above equation may be cancelled by feeding IS x IDRC/2(V− + 1.4V) into IO. The circuit of Figure 6 adds RM to provide this current, resulting in a four-quadrant multiplier where RC is trimmed such that VO = 0V for VIN2 = 0V. RM also serves as the load resistor for IO. 7 www.national.com Stereo Volume Control (Continued) DS007981-11 FIGURE 4. Stereo Volume Control DS007981-12 FIGURE 5. Amplitude Modulator www.national.com 8 Stereo Volume Control (Continued) DS007981-13 FIGURE 6. Four-Quadrant Multiplier Noting that the gain of the LM13700 amplifier of Figure 3 may be controlled by varying the linearizing diode current ID as well as by varying IABC, Figure 7 shows an AGC Amplifier using this approach. As VO reaches a high enough amplitude (3VBE) to turn on the Darlington transistors and the linearizing diodes, the increase in ID reduces the amplifier gain so as to hold VO at that level. where gm ≈ 19.2IABC at 25˚C. Note that the attenuation of VO by R and RA is necessary to maintain VIN within the linear range of the LM13700 input. Voltage Controlled Resistors An Operational Transconductance Amplifier (OTA) may be used to implement a Voltage Controlled Resistor as shown in Figure 8. A signal voltage applied at RX generates a VIN to the LM13700 which is then multiplied by the gm of the amplifier to produce an output current, thus: Figure 9 shows a similar VCR where the linearizing diodes are added, essentially improving the noise performance of the resistor. A floating VCR is shown in Figure 10, where each “end” of the “resistor” may be at any voltage within the output voltage range of the LM13700. DS007981-14 FIGURE 7. AGC Amplifier 9 www.national.com Voltage Controlled Resistors (Continued) DS007981-15 FIGURE 8. Voltage Controlled Resistor, Single-Ended DS007981-16 FIGURE 9. Voltage Controlled Resistor with Linearizing Diodes Voltage Controlled Filters OTA’s are extremely useful for implementing voltage controlled filters, with the LM13700 having the advantage that the required buffers are included on the I.C. The VC Lo-Pass Filter of Figure 11 performs as a unity-gain buffer amplifier at frequencies below cut-off, with the cut-off frequency being the point at which XC/gm equals the closed-loop gain of (R/ RA). At frequencies above cut-off the circuit provides a single RC roll-off (6 dB per octave) of the input signal amplitude with a −3 dB point defined by the given equation, where gm is again 19.2 x IABC at room temperature. Figure 12 shows a VC High-Pass Filter which operates in much the same manner, providing a single RC roll-off below the defined cut-off frequency. Additional amplifiers may be used to implement higher order filters as demonstrated by the two-pole Butterworth Lo-Pass Filter of Figure 13 and the state variable filter of Figure 14. Due to the excellent gm tracking of the two amplifiers, these filters perform well over several decades of frequency. www.national.com 10 Voltage Controlled Filters (Continued) DS007981-17 FIGURE 10. Floating Voltage Controlled Resistor DS007981-18 FIGURE 11. Voltage Controlled Low-Pass Filter 11 www.national.com Voltage Controlled Filters (Continued) DS007981-19 FIGURE 12. Voltage Controlled Hi-Pass Filter DS007981-20 FIGURE 13. Voltage Controlled 2-Pole Butterworth Lo-Pass Filter www.national.com 12 Voltage Controlled Filters (Continued) DS007981-21 FIGURE 14. Voltage Controlled State Variable Filter Voltage Controlled Oscillators The classic Triangular/Square Wave VCO of Figure 15 is one of a variety of Voltage Controlled Oscillators which may be built utilizing the LM13700. With the component values shown, this oscillator provides signals from 200 kHz to below 2 Hz as IC is varied from 1 mA to 10 nA. The output amplitudes are set by IA x RA. Note that the peak differential input voltage must be less than 5V to prevent zenering the inputs. A few modifications to this circuit produce the ramp/pulse VCO of Figure 16. When VO2 is high, IF is added to IC to increase amplifier A1’s bias current and thus to increase the charging rate of capacitor C. When VO2 is low, IF goes to zero and the capacitor discharge current is set by IC. The VC Lo-Pass Filter of Figure 11 may be used to produce a high-quality sinusoidal VCO. The circuit of Figure 16 employs two LM13700 packages, with three of the amplifiers configured as lo-pass filters and the fourth as a limiter/ inverter. The circuit oscillates at the frequency at which the loop phase-shift is 360˚ or 180˚ for the inverter and 60˚ per filter stage. This VCO operates from 5 Hz to 50 kHz with less than 1% THD. 13 www.national.com Voltage Controlled Oscillators (Continued) DS007981-22 FIGURE 15. Triangular/Square-Wave VCO DS007981-23 FIGURE 16. Ramp/Pulse VCO www.national.com 14 Voltage Controlled Oscillators (Continued) DS007981-24 FIGURE 17. Sinusoidal VCO Additional Applications Figure 19 presents an interesting one-shot which draws no power supply current until it is triggered. A positive-going trigger pulse of at least 2V amplitude turns on the amplifier through RB and pulls the non-inverting input high. The amplifier regenerates and latches its output high until capacitor C charges to the voltage level on the non-inverting input. The output then switches low, turning off the amplifier and discharging the capacitor. The capacitor discharge rate is speeded up by shorting the diode bias pin to the inverting input so that an additional discharge current flows through DI when the amplifier output switches low. A special feature of this timer is that the other amplifier, when biased from VO, can perform another function and draw zero stand-by power as well. DS007981-25 Figure 18 shows how to build a VCO using one amplifier when the other amplifier is needed for another function. FIGURE 18. Single Amplifier VCO 15 www.national.com Additional Applications (Continued) DS007981-26 FIGURE 19. Zero Stand-By Power Timer The operation of the multiplexer of Figure 20 is very straightforward. When A1 is turned on it holds VO equal to VIN1 and when A2 is supplied with bias current then it controls VO. CC and RC serve to stabilize the unity-gain configuration of amplifiers A1 and A2. The maximum clock rate is limited to about 200 kHz by the LM13700 slew rate into 150 pF when the (VIN1–VIN2) differential is at its maximum allowable value of 5V. The Phase-Locked Loop of Figure 21 uses the four-quadrant multiplier of Figure 6 and the VCO of Figure 18 to produce a PLL with a ± 5% hold-in range and an input sensitivity of about 300 mV. DS007981-27 FIGURE 20. Multiplexer www.national.com 16 Additional Applications (Continued) DS007981-28 FIGURE 21. Phase Lock Loop The Schmitt Trigger of Figure 22 uses the amplifier output current into R to set the hysteresis of the comparator; thus VH = 2 x R x IB. Varying IB will produce a Schmitt Trigger with variable hysteresis. DS007981-29 FIGURE 22. Schmitt Trigger 17 www.national.com Additional Applications (Continued) Figure 23 shows a Tachometer or Frequency-to-Voltage converter. Whenever A1 is toggled by a positive-going input, an amount of charge equal to (VH–VL) Ct is sourced into Cf and Rt. This once per cycle charge is then balanced by the current of VO/Rt. The maximum FIN is limited by the amount of time required to charge Ct from VL to VH with a current of IB, where VL and VH represent the maximum low and maximum high output voltage swing of the LM13700. D1 is added to provide a discharge path for Ct when A1 switches low. The Peak Detector of Figure 24 uses A2 to turn on A1 whenever VIN becomes more positive than VO. A1 then charges storage capacitor C to hold VO equal to VIN PK. Pulling the output of A2 low through D1 serves to turn off A1 so that VO remains constant. DS007981-30 FIGURE 23. Tachometer DS007981-31 FIGURE 24. Peak Detector and Hold Circuit The Ramp-and-Hold of Figure 26 sources IB into capacitor C whenever the input to A1 is brought high, giving a ramp-rate of about 1V/ms for the component values shown. The true-RMS converter of Figure 27 is essentially an automatic gain control amplifier which adjusts its gain such that the AC power at the output of amplifier A1 is constant. The output power of amplifier A1 is monitored by squaring amplifier A2 and the average compared to a reference voltage with amplifier A3. The output of A3 provides bias current to the diodes of A1 to attenuate the input signal. Because the output power of A1 is held constant, the RMS value is constant and the attenuation is directly proportional to the RMS value of the input voltage. The attenuation is also proportional to the diode bias current. Amplifier A4 adjusts the ratio of currents through the diodes to be equal and therefore the voltage at the output of A4 is proportional to the RMS value of the input voltage. The calibration potentiometer is set such that VO reads directly in RMS volts. www.national.com 18 Additional Applications (Continued) DS007981-32 FIGURE 25. Sample-Hold Circuit DS007981-33 FIGURE 26. Ramp and Hold 19 www.national.com Additional Applications (Continued) DS007981-34 FIGURE 27. True RMS Converter The circuit of Figure 28 is a voltage reference of variable Temperature Coefficient. The 100 kΩ potentiometer adjusts the output voltage which has a positive TC above 1.2V, zero TC at about 1.2V, and negative TC below 1.2V. This is accomplished by balancing the TC of the A2 transfer function against the complementary TC of D1. The wide dynamic range of the LM13700 allows easy control of the output pulse width in the Pulse Width Modulator of Figure 29. For generating IABC over a range of 4 to 6 decades of current, the system of Figure 30 provides a logarithmic current out for a linear voltage in. Since the closed-loop configuration ensures that the input to A2 is held equal to 0V, the output current of A1 is equal to I3 = −VC/RC. The differential voltage between Q1 and Q2 is attenuated by the R1,R2 network so that A1 may be assumed to be operating within its linear range. From Equation (5), the input voltage to A1 is: The voltage on the base of Q1 is then The ratio of the Q1 and Q2 collector currents is defined by: Combining and solving for IABC yields: This logarithmic current can be used to bias the circuit of Figure 4 to provide temperature independent stereo attenuation characteristic. www.national.com 20 Additional Applications (Continued) DS007981-35 FIGURE 28. Delta VBE Reference DS007981-36 FIGURE 29. Pulse Width Modulator 21 www.national.com Additional Applications (Continued) DS007981-37 FIGURE 30. Logarithmic Current Source www.national.com 22 Physical Dimensions inches (millimeters) unless otherwise noted S.O. Package (M) Order Number LM13700M NS Package Number M16A Molded Dual-In-Line Package (N) Order Number LM13700N or LM13700AN NS Package Number N16A 23 www.national.com LM13700/LM13700A Dual Operational Transconductance Amplifiers with Linearizing Diodes and Buffers Notes LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com www.national.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Français Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: sea.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.