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LM26484SQE

LM26484SQE

  • 厂商:

    NSC

  • 封装:

  • 描述:

    LM26484SQE - Power Management Unit - National Semiconductor

  • 数据手册
  • 价格&库存
LM26484SQE 数据手册
LM26484 Power Management Unit September 23, 2009 LM26484 Power Management Unit General Description The LM26484 is a multi-function, configurable Power Management Unit. This device integrates two highly efficient 2.0A Step-Down DC/DC converters, one LDO Controller, a POR (Power On Reset) circuit, and thermal overload protection circuitry. All regulator output voltages are externally adjustable. The LDO controller is a low-voltage NMOS voltage regulator. The LM26484 is offered in a 5 x 4 x 0.8 mm LLP-24 pin package. LINEAR REGULATOR (LDO) CONTROLLER ■ 3.0V–5.5V Input range ■ Externally adjustable VOUT ■ ±1.5% feedback voltage accuracy ■ Regulated to Low VIN - Low VOUT LI-LO (Low Input Low Output) NFET operation ■ Input to the LI-LO configuration, can be post regulated when supply is regulated by Buck2 ■ Up to 1000 mA output current by selection of external FET Key Specifications STEP-DOWN DC/DC CONVERTER (BUCK) ■ 3.0–5.5V Input Range ■ Externally adjustable VOUT: — Buck1 : 0.8V–3.5V @ 2A — Buck2 : 0.8V–3.5V @ 2A ■ 180° Phase Shift between Bucks Clocks ■ 2 MHz PWM switching frequency ■ ±1% feedback voltage accuracy ■ Automatic soft start ■ Current overload protection ■ PWM/PFM efficiency modes available Applications ■ ■ ■ ■ ■ ■ Digital Cores and I/Os (FPGAs, ASICs, DSPs) Automotive infotainment Set-top-box Cordless phone base station Networking router Printers © 2009 National Semiconductor Corporation 300661 www.national.com LM26484 Application Circuit 30066101 FIGURE 1. Application Circuit www.national.com 2 LM26484 Connection Diagram and Package Mark Information 30066102 24-Lead LLP Package (top view) Note: The physical placement of the package marking will vary from part to part. (*) UZXYTT format: ‘U’ – wafer fab code; ‘Z’ – assembly code; ’XY’ 2 digit date code; ‘TT” – die run code. See http://www.national.com/quality/marking_conventions.html for more information on marking information. Ordering Information Part Number LM26484SQE LM26484SQ LM26484SQX Package Marking 26484SQ 26484SQ 26484SQ Ordering Spec NOPB NOPB NOPB Buck1 PWM PWM PWM Buck2 PWM PWM PWM Supplied As 250 units, tape-and-reel 1000 units, tape-and-reel 4500 units, tape-and-reel 3 www.national.com LM26484 Pin Descriptions Pins 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Name VIN1 ENSW1 FB1 AVIN FB2 ENSW2 VIN2 VIN2 SW2 SW2 PGND_SW2 PGND_SW2 ENLDO LDOGATE LDOFB AGND GND nPOR I/O I I I I I I I I O O G G I O I G G O Type PWR D A PWR A D PWR PWR A A G G D A A G G D Description Power in DC source Buck1 PMOS Enable for Buck1 switcher, a logic HIGH enables Buck1 Buck1 input feedback terminal Analog power for internal circuits Buck2 input feedback terminal Enable for Buck2 switcher, a logic HIGH enables Buck2 Power in DC source Buck2 PMOS Power in DC source Buck2 PMOS Buck2 switcher output Buck2 switcher output Buck2 NMOS Power Ground Buck2 NMOS Power Ground Enable for LDO, a logic HIGH enables LDO LDO Controller output to NMOS power transistor Gate LDO Controller input to feedback terminal Analog GND Ground nPOR Active low Reset output. nPOR remains LOW while the input supply is below threshold, and goes HIGH after the threshold is reached and timed delay Analog Power Pin Buck1 NMOS Power Ground Buck1 NMOS Power Ground Buck1 switcher output Buck1 switcher output Power in DC source Buck1 PMOS Connection isn't necessary for electrical performance, but it is recommended for better thermal dissipation. G: Ground Pin PWR: Power Pin 19 20 21 22 23 24 DAP AVDD PGND_SW1 PGND_SW1 SW1 SW1 VIN1 DAP I G G O O I GND PWR G G A A PWR GND A: Analog Pin D: Digital Pin www.national.com 4 LM26484 Absolute Maximum Ratings (Note 1, Note 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN1, VIN2, AVDD, AVIN −0.3V to +6V nPOR, ENSW1, FB1, ENSW2, FB2, ENLDO, LDO_FB −0.3 to VIN + 0.3V GND to GND SLUG ±0.3V Junction Temperature (TJ-MAX) 150°C Storage Temperature Range −65°C to +150°C Maximum Lead Temperature (Soldering) 260°C ESD Ratings   Human Body Model (Note 4) Machine Model: VIN1,2; SW1,2 PGND1,2 All other pins Operating Ratings VIN1, VIN2, AVDD, AVIN nPOR, ENSW1, ENSW2, ENLDO, LDO_GATE, SW1, SW2 FB1, FB2 LDOFB Power Dissipation (PD-MAX) TA = 85°C, TMAX = 125°C Junction Temperature (TJ) Range (Note 3) 3.0V to 5.5V 0V to VIN + 0.3V 0v to VBuck1 and VBuck2 respectively 0v to VLDO 1.2W −40°C to +125°C Thermal Properties Junction-to-Ambient Thermal Resistance (θJA) Junction-to-Case Thermal Resistance (θJC) (Note 5, Note 6) 33.1°C/W based on a 4-layer 1 oz. PCB 2 kV 150V 200V 4.3°C/W General Electrical Characteristics Typical values and limits appearing in normal type apply for TJ = 25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, −40°C to +125°C. (Note 2, Note 7) Symbol VIN TSD CIN Iq Parameter Operational Voltage Range Thermal Shutdown Input Capacitor Quiescent Current “Off” AVDD, AVIN (Note 3) C9, Figure 1 VIN = 3.3V, ENSW1, ENSW2, ENLDO = 0 Conditions Min 3.0 Typ 3.3 160 10 0.03 1 Max 5.5 Units V °C µF µA LDO Controller Unless otherwise noted, AVDD = AVIN 3.3V, PVIN = 1.8V. Typical values and limits appearing in normal type apply for TA = 25° C. Limits appearing in boldface type apply over the entire junction temperature range for operation, −40°C to +125°C. (Note 2, Note 7) Symbol VIN VOUT VFB Parameter Operational Voltage Range NMOS configuration Feedback Voltage Accuracy −1.5 −2 PSRR TON CFB Power Supply Ripple Rejection Turn On Time Feedback Capacitor Output Capacitor C10, (Note 1) F = 10 kHz, Load Current = IMAX Start up from shut-down C11, Figure 1 Capacitance for stability: −40°C ≤ TJ ≤ 125°C ESR (Equivalent Series Resistance) 10 −30 500 12 22 0.5 Conditions AVIN LDO internal circuits Externally configured Min 3.0 0.8 0.5 1.5 2 Typ 3.3 Max 5.5 1.5 Units V V V % dB µsec pF µF COUT Ω 5 www.national.com LM26484 Buck Converters SW1, SW2 Unless otherwise noted, AVDD=AVIN=VIN1=VIN2 = 3.3V, CIN = 10 µF, COUT = 22 µF, LOUT = 0.5 µH. Buck1 is configured to 1.8V. Buck2 is configured to 1.0V. Typical values and limits appearing in normal type apply for TA = 25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, −40°C to +125°C. (Note 2, Note 7) Symbol VIN VFB VIN Range Feedback Voltage Accuracy −1.0 −1.5 DC Line Regulation ΔVOUT DC Load Regulation fOSC IPEAK RDSON (P) RDSON (N) TON CIN CO Oscillator Frequency Peak Switching Current Limit Pin-Pin Resistance PFET Pin-Pin Resistance NFET Turn On Time Input Capacitor Output Capacitor Start up from shut-down Capacitance for stability Capacitance for stability 10 10 22 3.0 < VIN < 3.6 IO =1000 mA 100 mA < IO < IMAX 1.8 0.174 0.75 2.0 3.2 70 80 500 100 100 Parameter Conditions AVDD=VIN1=VIN2 Min 3.0 Typ 3.3 0.5 +1.0 +1.5 %/V %/A MHz A mΩ mΩ µsec µF µF % Max 5.5 Units V I/O Electrical Characteristics Unless otherwise noted: AVDD=AVIN=VIN1=VIN2 = 3.3V. Typical values and limits appearing in normal type apply for TJ = 25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, TJ = -40 to +125°C (Note 2, Note 7) Symbol VIL VIH IOH VOL TnPOR Parameter Input Low Level, ENSW1, ENSW2, ENLDO Input High Level, ENSW1, ENSW2, ENLDO nPOR nPOR nPOR Delay 60 0.8*VIN 0.01 0.125 200 2 0.25 475 Min Typ Max 0.4 Units V V µA V msec Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 2: All voltages are with respect to the potential at the GND pin. Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 160°C (typ.) and disengages at TJ = 130°C (typ.) Note 4: The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each pin. (MILSTD - 883 3015.7) Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature, the maximum power dissipation of the device in the application (PD-MAX), and the junction-to-ambient thermal resistance of the package in the application (θJA), as given by the following equation: TA-MAX = TJMAX − (θJA × PD-MAX). Refer to dissipation rating table for PD-MAX values at different ambient temperatures. Note 6: Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues in board design. More information is available in National Semiconductor Application Note AN1187. Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm. Note 8: This specification is guaranteed by design. www.national.com 6 LM26484 Typical Performance Characteristics — LDO Load Transient VOUT — 1.0V, IOUT = 200 mA-1A TA = 25°C unless otherwise noted. Load Transient VOUT — 1.0V, IOUT = 50 mA- 500 mA 30066108 30066139 Typical Performance Characteristics — Buck Startup of Buck1: VOUT = 1.8V; IOUT = 100 mA TA = 25°C unless otherwise noted. Startup of Buck1: VOUT = 1.8V; IOUT = 2A 30066140 30066141 Startup of Buck2: VOUT = 1.0V; IOUT = 100 mA Startup of Buck2: VOUT = 1.0V; IOUT = 2A 30066142 30066156 7 www.national.com LM26484 Line Transient: VIN = 3.0V - 3.6V; IOUT = 250 mA; VOUT = 1.8V Line Transient: VIN = 3.3V - 4.2V IOUT = 250 mA; VOUT = 1.0V 30066157 30066158 Buck1 Load Transient: VIN = 3.3V; VOUT = 1.8V; IOUT = 250 mA - 1.5A Buck1 Load Transient: VIN = 3.3V; VOUT = 1.8V; IOUT = 500 mA - 2A 30066159 30066160 Buck2 Load Transient: VIN = 3.3V; VOUT = 1.0V; IOUT = 250 mA - 1.5A Buck2 Load Transient: VIN = 3.3V; VOUT = 1.0V; IOUT = 500 mA - 2A 30066161 30066162 www.national.com 8 LM26484 Efficiency of Buck1, VOUT = 1.8V, at Room Temp Efficiency of Buck2, VOUT = 1.0V, at Room Temp 30066137 30066138 Efficiency of Buck1, VOUT = 3.5V at Room Temp 30066115 Flexible Power Sequencing of Multiple Power Supplies The two bucks and the LDO in the LM26484 can be individually controlled with ENSW1, ENSW2, and ENLDO, respectively. All the enable inputs need to be either grounded or tied to VIH. Power-On Reset The LM26484 provides an active low reset output nPOR. Typical waveform is as shown in Figure 2 below: 30066103 FIGURE 2. Power-On Reset Waveform 9 www.national.com LM26484 LDO Functional Description The LDO is a linear regulator which targets analog loads characterized by low noise requirements. The LDO is enabled through the ENLDO pin. The output voltage is determined by the configuration of the external feedback resistors, as seen in the typical application circuit (Figure 1), R5 and R6. NO-LOAD STABILITY The LDO will remain stable and in regulation with no external load. This is an important consideration in some circuits, for example CMOS RAM keep-alive applications. TABLE 1. LDO Configuration and Component Selection Guide Target VOUT(V) 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 Ideal Resistor Values R5 (KΩ) 120 160 200 240 280 320 360 400 R6 (KΩ) 200 200 200 200 200 200 200 200 Common R Values R5 (KΩ) 120 162 200 240 280 324 357 402 R6 (KΩ) 200 200 200 200 200 200 200 200 Actual VOUT with Com R (V) 0.8 0.905 1 1.1 1.2 1.31 1.393 1.505 Feedback Capacitor C11 (pF) 15 15 15 15 12 12 10 10 RESISTOR SELECTION FOR LDO The output voltage of the LDO on the LM26484 is established by the feed back resistor divider R5 and R6 shown on the typical application circuit (Figure 1). The equation for determining VOUT is: VOUT = VFB*(R5+R6)/R6, where VFB is the voltage on the LDO_FB pin. The LDO control loop will force the voltage on VFB to be 0.50V. Table 1 shows ideal resistor values to establish LDO voltages from 0.8V to 1.5V along with common resistor values to establish these voltages. Common resistors do not always produce the target value. The resulting output voltage using common resistors is also found in Table 1. To keep the power consumed by the feedback network low it is recommended that R6 be established as about 200 kΩ. Lesser values of R6 are OK and can be used at the user’s discretion. NFET SELECTION There are a few major concerns when selecting an NFET for the LM26484 controller. The most important factor to consider is the maximum power rating. It is important for the NFET to have a maximum power rating larger than the application will need. The LM26484 has the ability to drive the gate voltage very close to VIN and down to approximately 1.5V. Selecting an NFET where the guaranteed operation of the VGS is ≥1.5V is important. Recommended NFET Part Number Si1450DH Vendor Vishay VGS 1.5V PDISSIPATION 2.78W FEEDBACK CAPACITOR A Feedback capacitor is required for stability; recommended values can be seen in Table 1. This capacitor must be located a distance of not more than 1 cm from the LDO_FB pin and LDO_OUT. Any good quality ceramic or film capacitor should be used. OUTPUT CAPACITOR The LDO on the LM26484 is designed specifically to work with very small ceramic output capacitors. A 10.0 µF ceramic capacitor, marked as C10 in Figure 1, temperature types Z5U, Y5V or X7R with ESR between 5 mΩ to 500 mΩ, is suitable for proper operation. It is also possible to use tantalum or film capacitors, but these are not as attractive for reasons of size and cost. The output capacitor must meet the requirement for the minimum value of capacitance and also have an ESR value that is within the range 50 mΩ to 500 mΩ for stability. CAPACITOR CHARACTERISTICS The LDO is designed to work with ceramic capacitors on the output to take advantage of the benefits they offer. For capacitance values in the range of 0.47 μF to 44 μF, ceramic capacitors are the smallest, least expensive and have the lowest ESR values, thus making them best for eliminating high frequency noise. The ESR of a typical 10 μF ceramic capacitor is in the range of 20 mΩ to 40 mΩ, which easily meets the ESR requirement for stability for the LDO. For both input and output capacitors, careful interpretation of the capacitor specification is required to ensure correct device operation. The capacitor value can change greatly, depending on the operating conditions and capacitor type. In particular, the output capacitor selection should take account of all the capacitor parameters, to ensure that the specification is met within the application. The capacitance can vary with DC bias conditions as well as temperature and frequency of operation. Capacitor values will also show some decrease over time due to aging. The capacitor parameters are also dependent on the particular case size, with smaller sizes giving poorer performance figures in general. EXTERNAL CAPACITORS The LDO on the LM26484 requires external capacitors for regulator stability. These are specifically designed for portable applications requiring minimum board space and smallest components. These capacitors must be correctly selected for good performance. The tolerance and temperature coefficient must be considered when selecting the capacitor to ensure that the capacitance will remain close to ideal over the entire operating temperature range. www.national.com 10 LM26484 Buck Regulator Functional Description The LM26484 incorporates two high efficiency synchronous switching buck regulators which are 180° out of phase, SW1 and SW2 that deliver voltages from a single DC input voltage. Using a voltage mode architecture with synchronous rectification, both bucks have the ability to deliver up to 2A depending on the input voltage and output voltage (voltage head room), and the inductor chosen (maximum current capability). There are three modes of operation depending on the current required - PWM, PFM, and shutdown. PWM mode handles current loads of approximately 70 mA or higher, delivering voltage precision with high efficiency. Lighter output current loads cause the device to automatically switch into PFM for reduced current consumption (Iq = 15 µA typ.) and a longer battery life. The Standby operating mode turns off the device, offering the lowest current consumption. Forced PWM is factory programmed. For Auto PFM-PWM please contact National Semiconductor Sales. Both SW1 and SW2 can operate up to a 100% duty cycle (PMOS switch always on) for low drop out control of the output voltage. In this way the output voltage will be controlled down to the lowest possible input voltage. Additional features include soft-start, under-voltage lockout, current overload protection, and thermal overload protection. PWM OPERATION During PWM operation the converter operates as a voltagemode controller with input voltage feed forward. This allows the converter to achieve excellent load and line regulation. The DC gain of the power stage is proportional to the input voltage. To eliminate this dependence, feed forward voltage inversely proportional to the input voltage is introduced. INTERNAL SYNCHRONOUS RECTIFICATION While in PWM mode, the buck uses an internal NFET as a synchronous rectifier to reduce rectifier forward voltage drop and associated power loss. Synchronous rectification provides a significant improvement in efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier diode. CURRENT LIMITING A current limit feature allows the converter to protect the LM26484 and any external components during overload conditions. An internal comparator senses the voltage across an internal sense resistor and will turn on the NFET when the output current is sensed at 2.5A (min.) with 0.5 µH inductors. If the output is shorted to ground the device enters a timed current limit mode where the NFET is turned on for a longer duration until the inductor current falls below a low threshold, ensuring inductor current has more time to decay, thereby preventing runaway. PFM OPERATION At very light loads, the converter enters PFM mode and operates with reduced switching frequency and supply current to maintain high efficiency. For the PFM mode to be enabled, please contact National Semiconductor Sales. The part will automatically transition into PFM mode when either of two conditions occurs for a duration of 32 or more clock cycles: A. The inductor current becomes discontinuous or B. The peak PMOS switch current drops below the IMODE level During PFM operation, the converter positions the output voltage slightly higher than the nominal output voltage during PWM operation, allowing additional headroom for voltage drop during a load transient from light to heavy load. The PFM comparators sense the output voltage via the feedback pin and control the switching of the output FETs such that the output voltage ramps between 0.8% and 1.6% (typ.) above the nominal PWM output voltage. If the output voltage is below the ‘high’ PFM comparator threshold, the PMOS power switch is turned on. It remains on until the output voltage exceeds the ‘high’ PFM threshold or the peak current exceeds the I PFM level set for PFM mode. The typical peak current in PFM mode is: Once the PMOS power switch is turned off, the NMOS power switch is turned on until the inductor current ramps to zero. When the NMOS zero-current condition is detected, the NMOS power switch is turned off. If the output voltage is below the ‘high’ PFM comparator threshold (see Figure 3 ), the PMOS switch is again turned on and the cycle is repeated until the output reaches the desired level. Once the output reaches the ‘high’ PFM threshold, the NMOS switch is turned on briefly to ramp the inductor current to zero and then both output switches are turned off and the part enters an extremely low power mode. Quiescent supply current during this ‘sleep’ mode is less than 30 µA, which allows the part to achieve high efficiencies under extremely light load conditions. When the output drops below the ‘low’ PFM threshold, the cycle repeats to restore the output voltage to ~1.6% above the nominal PWM output voltage. If the load current should increase during PFM mode (see Figure 3) causing the output voltage to fall below the ‘low2’ PFM threshold, the part will automatically transition into fixedfrequency PWM mode. During shutdown the PFET switch, reference, control and bias circuitry of the converters are turned off. The NFET switch will be on in shutdown to discharge the output. When the converter is enabled, soft start is activated. It is recommended to disable the converter during the system power up and under voltage conditions when the supply is less than 3.0V. 11 www.national.com LM26484 30066105 FIGURE 3. PFM vs PWM SOFT START The soft-start feature allows the power converter to gradually reach the initial steady state operating point, thus reducing start-up stresses and surges. The two LM26484 buck converters have a soft-start circuit that limits in-rush current during start-up or the one which ramps up output voltage linearly over about 500 µs. During start-up the switch current limit is ramped up (100 µs, typ.), depending on the kind of soft-start. Soft start is activated only if EN goes from logic low to logic high after VIN reaches 2.8V. LOW DROPOUT OPERATION The LM26484 can operate at 100% duty cycle (no switching; PMOS switch completely on) for low dropout support of the output voltage. In this way the output voltage will be controlled down to the lowest possible input voltage. When the device operates near 100% duty cycle, output voltage ripple is approximately 25 mV. The minimum input voltage needed to support the output voltage is VIN, MIN = ILOAD * (RDSON, PFET + RINDUCTOR) + VOUT — ILOAD — RDSON, PFET — RINDUCTOR Load current Drain to source resistance of PFET switch in the triode region Inductor resistance www.national.com 12 LM26484 Component Selection SW1, SW2 OPERATION TABLE 2. Buck1/2 Configuration and Component Selection Guide Actual VOUT with Com/R (V) (V) 0.803 0.905 1 1.1 1.2 1.31 1.393 1.505 1.605 1.713 1.803 1.902 2.01 2.083 2.202 2.282 2.415 2.51 2.61 2.71 2.82 2.875 2.995 3.115 3.18 3.31 3.38 3.52 Actual VOUT Delta from Target (V) (V) 0.002 0.005 0 0 0 0.01 -0.008 0.005 0.005 0.013 0.003 0.002 0.01 -0.017 0.002 -0.018 0.015 0.01 0.01 0.01 0.02 -0.025 -0.005 0.015 -0.02 0.01 -0.02 0.02 Target VOUT (V) 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 Ideal Resistor Values R1/3 (KΩ) 120 160 200 240 280 320 360 400 440 427 463 498 450 480 422 446 471 400 420 440 460 480 500 520 540 560 580 600 R2/4 (KΩ) 200 200 200 200 200 200 200 200 200 178 178 178 150 150 124 124 124 100 100 100 100 100 100 100 100 100 100 100 Common R Values R1/3 (KΩ) 121 162 200 240 280 324 357 402 442 432 464 499 453 475 422 442 475 402 422 442 464 475 499 523 536 562 576 604 R2/4 (KΩ) 200 200 200 200 200 200 200 200 200 178 178 178 150 150 124 124 124 100 100 100 100 100 100 100 100 100 100 100 Feedback Capacitors C3/6 (pF) 15 15 15 15 12 12 10 10 8.2 8.2 8.2 8.2 8.2 8.2 8.2 8.2 8.2 8.2 8.2 8.2 8.2 8.2 6.8 6.8 6.8 6.8 6.8 6.8 C4/8 (pF) none none none none none none none none none none none none none none none none none none none 33 33 33 33 33 33 33 33 33 The Buck control loop will force the voltage on VFB to be 0.50V. shows ideal resistor values to establish buck voltages from 0.8V to 3.5V along with common resistor values to establish these voltages. Common resistors do not always produce the target value, error is given in the delta column. In addition to the resistor feedback, feedback capacitors are also required. ( — C3/4/6/8) When choosing the output voltage for the two bucks, please take into account the fact that, the factory has optimized the accuracy of Buck1 at the top end of the VOUT range and Buck2 for the bottom end of the VOUT range. 13 www.national.com LM26484 30066104 FIGURE 4. Typical Variation in Capacitance vs. DC Bias As shown in , increasing the DC Bias condition can result in a capacitance value that falls below the minimum value given in the recommended capacitor specifications table. Note that the graph shows the capacitance out of spec for the 0402 case size capacitor at higher bias voltages. It is therefore recommended that the capacitor manufacturers’ specifications for the nominal value capacitor are consulted for all conditions, as some capacitor sizes (e.g. 0402) may not be suitable in the actual application. The ceramic capacitor’s capacitance can vary with temperature. The capacitor type X7R, which operates over a temperature range of −55°C to +125°C, will only vary the capacitance to within ±15%. The capacitor type X5R has a similar tolerance over a reduced temperature range of −55°C to +85°C. Many large value ceramic capacitors, larger than 1 μF are manufactured with Z5U or Y5V temperature characteristics. Their capacitance can drop by more than 50% as the temperature varies from 25°C to 85°C. Therefore X7R is recommended over Z5U and Y5V in applications where the ambient temperature will change significantly above or below 25°C. Tantalum capacitors are less desirable than ceramic for use as output capacitors because they are more expensive when comparing equivalent capacitance and voltage ratings in the 0.47 µF to 44 µF range. Another important consideration is that tantalum capacitors have higher ESR values than equivalent size ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the stable range, it would have to be larger in capacitance (which means bigger and more costly) than a ceramic capacitor with the same ESR value. It should also be noted that the ESR of a typical tantalum will increase about 2:1 as the temperature goes from 25°C down to −40°C, so some guard band must be allowed. OUTPUT INDUCTORS & CAPACITORS FOR SW1 AND SW2 There are several design considerations related to the selection of output inductors and capacitors: • Load transient response; • Stability; • Efficiency; • Output ripple voltage; and • Over-current ruggedness. The LM26484 has been optimized for use with nominal values 0.5 µH and 22 µF. If other values are needed for the design, please contact National Semiconductor sales with any concerns. INDUCTOR SELECTION FOR SW1 AND SW2 A nominal inductor value of 0.5 µH is recommended. It is important to guarantee the inductor core does not saturate during any foreseeable operational situation. Care should be taken when reviewing the different saturation current ratings that are specified by different manufacturers. Saturation current ratings are typically specified at 25ºC, so ratings at maximum ambient temperature of the application should be requested from the manufacturer. There are two methods to choose the inductor saturation current rating: Recommended method: The best way to guarantee the inductor does not saturate is to choose an inductor that has saturation current rating greater than the maximum LM26484 current limit of 3.0A. In this case the device will prevent inductor saturation. Alternate method: If the recommended approach cannot be used, care must be taken to guarantee that the saturation current is greater than the peak inductor current: www.national.com 14 LM26484 IOUTMAX: IRIPPLE: VOUT: VIN: L: F: D: EFF: 30066106 Maximum average inductor current Peak-to-Peak inductor current Output voltage Input voltage Inductor value in Henries at IOUTMAX Switching frequency, Hertz Estimated duty factor Estimated power supply efficiency ISAT: ILPEAK: Inductor Inductor saturation current at operating temperature Peak inductor current during worst case conditions Value 0.5 Unit µH Description ISAT may not be exceeded during any operation, including transients, startup, high temperature, worst case conditions, etc. Notes D.C.R. 50 mΩ L1 and L2 SW1 and SW2 inductor SUGGESTED INDUCTORS AND THEIR SUPPLIERS Output Voltage Range VOUT ≥ 2.0V VOUT < 2.0V Vendor Coilcraft Coilcraft Part Number LPS4012–222ML LPS4414–501ML Value 2.2 µH 0.5 µH DCR (max) 100 mΩ 50 mΩ OUTPUT CAPACITOR SELECTION FOR SW1 AND SW2 A ceramic output capacitor of 10 µF, 6.3V is recommended with an ESR of about 2 mΩ or less. Output ripple can be estimated from the vector sum of the reactive (Capacitor) voltage component and the real (ESR) voltage component of the output capacitor. INPUT CAPACITOR SELECTION FOR SW1 AND SW2 It is required to use a ceramic input capacitor of at least 10 μF and 6.3V with an ESR of under 10 mΩ. The input power source supplies average current continuously. During the PFET switch on-time, however, the demanded di/dt is higher than can be typically supplied by the input power source. This delta is supplied by the input capacitor. VCOUT: VROUT: VPPOUT: Estimated reactive output ripple Estimated real output ripple Estimated peak-to-peak output ripple The output capacitor needs to be mounted as close as possible to the output pin of the device. The output filter capacitor smooths out current flow from the inductor to the load, helps maintain a steady output voltage during transient load changes and reduces output voltage ripple. These capacitors must be selected with sufficient capacitance and sufficiently low ESR to perform these functions. Note that the output voltage ripple is dependent on the inductor current ripple and the equivalent series resistance of the output capacitor (ESRCOUT). ESRCOUT is frequency dependent as well as temperature dependent. The RESR should be calculated with the applicable switching frequency and ambient temperature. 15 www.national.com LM26484 A simplified “worst case” assumption is that all of the PFET current is supplied by the input capacitor. This will result in conservative estimates of input ripple voltage and capacitor RMS current. Input ripple voltage is estimated as follows: VPPIN: IOUT: CIN: ESRIN: Estimated peak-to-peak input ripple voltage Output current, Amps Input capacitor value, Farads Input capacitor ESR, Ohms This capacitor is exposed to significant RMS current, so it is important to select a capacitor with an adequate RMS current rating. Capacitor RMS current estimated as follows: IRSCIN Model Type Estimated input capacitor RMS current Voltage Rating Case Size Inch (mm) 0805, (2012) 0805, (2012) 0805, (2012) 0603, (1608) Case Size Inch (mm) 1206, (3216) 1206, (3216) Recommended Type Ceramic, 6.3V, X5R Ceramic, 6.3V, X5R Ceramic, 6.3V, X5R Vendor 10 µF for CIN or COUT; C9, C2, C1, C5, C7, C10 GRM21BR60J106K JMK212BJ106K LMK212C106KG-T C1608X5R0J106K Model 22 µF for COUT; C10, C2, C7 GRM31CR70J226KE23L JMK316B7226ML-T Capacitor C10, C2, C7, Min Value 10.0 10.0 10.0 Ceramic, X7R Ceramic, X7R Unit µF µF µF Murata Taiyo-Yuden Description LDO1 output capacitor SW1 output capacitor SW2 output capacitor 6.3V 6.3V Ceramic, X7R Ceramic, X5R Ceramic, X7R Ceramic, X5R Type Murata Taiyo-Yuden Taiyo-Yuden TDK Vendor 6.3V 6.3V 10V 6.3V Voltage Rating www.national.com 16 LM26484 Physical Dimensions inches (millimeters) unless otherwise noted 5 X 4 X 0.8 mm 24-Pin LLP Package NSC Package SQA24B 17 www.national.com LM26484 Power Management Unit Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Amplifiers Audio Clock and Timing Data Converters Interface LVDS Power Management Switching Regulators LDOs LED Lighting Voltage Reference PowerWise® Solutions Temperature Sensors Wireless (PLL/VCO) www.national.com/amplifiers www.national.com/audio www.national.com/timing www.national.com/adc www.national.com/interface www.national.com/lvds www.national.com/power www.national.com/switchers www.national.com/ldo www.national.com/led www.national.com/vref www.national.com/powerwise WEBENCH® Tools App Notes Reference Designs Samples Eval Boards Packaging Green Compliance Distributors Quality and Reliability Feedback/Support Design Made Easy Solutions Mil/Aero PowerWise® Design University Design Support www.national.com/webench www.national.com/appnotes www.national.com/refdesigns www.national.com/samples www.national.com/evalboards www.national.com/packaging www.national.com/quality/green www.national.com/contacts www.national.com/quality www.national.com/feedback www.national.com/easy www.national.com/solutions www.national.com/milaero www.national.com/solarmagic www.national.com/training Serial Digital Interface (SDI) www.national.com/sdi www.national.com/wireless www.national.com/tempsensors SolarMagic™ THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS, IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT NATIONAL’S PRODUCT WARRANTY. EXCEPT WHERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL PARAMETERS OF EACH PRODUCT IS NOT NECESSARILY PERFORMED. NATIONAL ASSUMES NO LIABILITY FOR APPLICATIONS ASSISTANCE OR BUYER PRODUCT DESIGN. BUYERS ARE RESPONSIBLE FOR THEIR PRODUCTS AND APPLICATIONS USING NATIONAL COMPONENTS. PRIOR TO USING OR DISTRIBUTING ANY PRODUCTS THAT INCLUDE NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING AND OPERATING SAFEGUARDS. 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