LM2715SQ-ADJ

LM2715 TFT Panel Module April 2006 LM2715 TFT Panel Module General Description The LM2715 is a compact bias solution for TFT displays. It has a current mode PWM step-up DC/DC converter with a 1.3A, 0.18Ω internal switch. Capable of generating 8V at 240mA from a Lithium Ion battery, the LM2715 is ideal for generating bias voltages for large screen LCD panels. The LM2715 operates at a switching frequency of 1.25MHz allowing for easy filtering and low noise. An external compensation pin gives the user flexibility in setting frequency compensation, which makes possible the use of small, low ESR ceramic capacitors at the output. The LM2715 uses a patented internal circuitry to limit startup inrush current of the boost switching regulator without the use of an external softstart capacitor. The LM2715 has an internal controllable PMOS switch used for controlling the row driver voltages. The switch can be controlled externally with a control pin and delay time. The LM2715 contains a Vcom amplifier and a Gamma buffer capable of supplying 50mA source and sink. The TSSOP-16 or LLP-24 packages ensure a low profile overall solution. Features n n n n n n n n n n 1.3A, 0.18Ω, internal power switch VIN operating range: 2.2V to 12V 1.25MHz switching frequency step-up DC/DC converter Inrush current limiting circuitry Internal 7Ω PMOS switch PMOS switch control pin PMOS switch delay pin Vcom amplifier Gamma buffer 16 pin TSSOP or 24 pin LLP packages Applications n LCD Bias Supplies Typical Application Circuit 20058431 © 2006 National Semiconductor Corporation DS200584 www.national.com LM2715 Connection Diagrams Top View 20058404 TJMAX TSSOP 16 package = 125˚C, θJA = 120˚C/W (Note 1) Top View 20058494 TJMAX LLP 24 package = 125˚C, θJA = 33.2˚C/W (Note 1) Pin Description (TSSOP) Pin 1 2 3 4 5 6 7 8 Name Vcom+ Vcom− Vcom AGND Delay VC FB PGND Vcom Amplifier positive input. Vcom Amplifier negative input. Vcom Amplifier output. Analog Ground. Connect to AGND plane. PMOS switch delay. Boost Compensation Network Connection. Output Voltage Feedback input. Power Ground. Connect to PGND plane. Function www.national.com 2 LM2715 Pin Description (TSSOP) Pin 9 10 11 12 13 14 15 16 Name SW VIN SWI SWO SWC AVIN GMA GMA+ (Continued) Function NMOS power switch input. Main power input, step-up and switch circuitry. PMOS switch input. PMOS switch output. PMOS switch control pin. Analog power input (buffers). Gamma buffer output. Gamma buffer input. Pin Description (LLP) Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 DAP Name VcomVcom AGND Delay VC FB PGND PGND NC NC SW SW SW VIN SWI SWO SWC AVIN GMA GMA+ NC NC NC Vcom+ DAP Vcom Amplifier negative input. Vcom Amplifier output. Analog Ground. Connect to AGND plane. PMOS switch delay. Boost Compensation Network Connection. Output Voltage Feedback input. Power Ground. Connect to PGND plane. Power Ground. Connect to PGND plane. Not internally connected. Leave floating or connect to Ground. Not internally connected. Leave floating or connect to Ground. NMOS power switch input. NMOS power switch input. NMOS power switch input. Main power input, step-up and switch circuitry. PMOS switch input. PMOS switch output. PMOS switch control pin. Analog power input (buffers). Gamma buffer output. Gamma buffer input. Not internally connected. Leave floating or connect to Ground. Not internally connected. Leave floating or connect to Ground. Not internally connected. Leave floating or connect to Ground. Vcom Amplifier positive input. Center Die Attach Pad. Connect directly to AGND and PGND pins beneath the device. switch is controlled with both the delay time and the switch control pin, SWC. If no Cdelay capacitor is used, the PMOS switch is controlled solely with the SWC pin. VC: Compensation Network for Boost switching regulator. Connect resistor/capacitor network between VC pin and AGND for boost switching regulator AC compensation. FB: Feedback pin. Set the output voltage by selecting values of R1 and R2 using: Function Pin Functions Vcom+: Positive input terminal of Vcom amplifier. Vcom−: Negative input terminal of Vcom amplifier. Vcom: Output terminal of Vcom amplifier. AGND: Analog ground connection for LM2715. Connect all sensitive circuitry, ie. feedback resistors, delay capacitor, and compensation network to its own dedicated AGND plane which connects directly to this pin. Delay: PMOS switch delay control pin. See Operation section for setting the delay time. The delay time begins when the output voltage of the DC/DC switching regulator reaches 85% of its true output voltage. This corresponds to a FB voltage of about 1.1V. The PMOS Connect the ground of the feedback network to the AGND plane, which should be tied directly to the PGND pin. 3 www.national.com LM2715 Pin Functions (Continued) PGND:Connect all power ground components to a PGND plane which should also connect directly to this pin. Use a trace or via to connect the AGND plane to the PGND plane. Please see Layout Considerations under the Operation section for more details on layout suggestions. SW: This is the drain of the internal NMOS power switch. Minimize the metal trace area connected to this pin to minimize EMI. VIN: Input Supply Pin. Bypass this pin with a capacitor as close to the device as possible. The capacitor should connect between VIN and PGND. SWI: PMOS switch input. Source connection of PMOS device. SWO: PMOS switch output. Drain connection of PMOS device. SWC: PMOS switch control pin. This pin creates an AND function with the delay time after the output of the switching regulator has reached 85% of its nominal value. To ensure the PMOS switch is in the correct state, apply a voltage above 1.5V to this pin to turn on the PMOS switch and apply a voltage below 0.7V to turn off the PMOS switch. AVIN: Supply pin for the Vcom opamp and the Gamma buffer. Bypass this pin with a capacitor as close to the device as possible, about 100nF, if connected directly to the output of the boost DC/DC switching regulator. The capacitor should connect between AVIN and PGND. GMA: Gamma Buffer output pin. GMA+: Gamma Buffer input pin. Ordering Information (TSSOP) Order Number LM2715MT-ADJ LM2715MTX-ADJ Package Type TSSOP-16 TSSOP-16 NSC Package Drawing MTC16 MTC16 Supplied As 73 Units, Rail 2500 Units, Tape and Reel Ordering Information (LLP) Order Number LM2715SQ-ADJ LM2715SQX-ADJ LM2715SQ-ADJ LM2715SQX-ADJ NOPB NOPB Spec Package Type LLP-24 LLP-24 LLP-24 LLP-24 NSC Package Drawing SQA24B SQA24B SQA24B SQA24B Supplied As 1000 Units, Tape and Reel 4500 Units, Tape and Reel 1000 Units, Tape and Reel 4500 Units, Tape and Reel www.national.com 4 LM2715 Block Diagrams 20058403 20058451 20058457 5 www.national.com LM2715 Absolute Maximum Ratings (Note 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN SW Voltage FB Voltage VC Voltage SWC Voltage Supply Voltage, AVIN Amplifier/Buffer Input Voltage Amplifier/Buffer Output Voltage Delay -0.3V to 12V -0.3V to 18V -0.3V to 2V 0.96V to 1.56V -0.3V to 12V -0.3V to 12V Rail-to-Rail Rail-to-Rail GND to 1.3V SWI SWO ESD Ratings (Note 3) Human Body Model -0.3V to 30V -0.3V to 30V 2kV Operating Conditions Operating Temperature Storage Temperature Supply Voltage, VIN SW Voltage Supply AVIN SWI −40˚C to +125˚C −65˚C to +150˚C 2.2V to 12V 17.5V 4V to 12V 2.2V to 30V Electrical Characteristics — Switching Regulator Specifications in standard type face are for TJ = 25˚C and those with boldface type apply over the full Operating Temperature Range ( TJ = −40˚C to +125˚C). Unless otherwise specified VIN =2.2V, AVIN = 8V, RCOM = RGAMMA = 50Ω, CCOM = CGAMMA = 1nF. Switching Regulator Symbol IQ Parameter Quiescent Current Conditions Not Switching, FB = 2V Switching, switch open, FB = 0.1V VFB %VFB/∆VIN ICL RDSON IB VIN TSS gm AV DMAX fS IL UVP Feedback Voltage Feedback Voltage Line Regulation Switch Current Limit (Note 6) Switch RDSON (Note 7) FB Pin Bias Current (Note 8) Input Voltage Range Internal Soft Start Ramp Time Error Amp Transconductance ∆I = 5µA Error Amp Voltage Gain Maximum Duty Cycle Switching Frequency Switch Leakage Current On Threshold Off Threshold Hysteresis VSW = 18V 1.79 1.69 78 1.0 85 2.2 7 110 135 85 1.25 0.1 1.92 1.82 100 1.5 20 2.05 1.95 270 VIN = 2.5V, VOUT = 8V VIN = 2.5V 1.239 Min (Note 4) Typ (Note 5) 1.6 3.6 1.265 0.01 1.29 178 60 200 12 Max (Note 4) 2.3 4.3 1.291 0.1 mA V %/V A mΩ nA V mS µmho V/V % MHz µA V V mV Units www.national.com 6 LM2715 Electrical Characteristics — Vcom Amplifier Specifications in standard type face are for TJ = 25˚C and those with boldface type apply over the full Operating Temperature Range ( TJ = −40˚C to +125˚C). Unless otherwise specified VIN =2.2V, AVIN = 8V, RCOM = RGAMMA = 50Ω, CCOM = CGAMMA = 1nF. Vcom Amplifier Symbol VOS IB IOS CMVR VOUT Swing Parameter Input Offset Voltage (Note 9) Input Bias Current Input Offset Current Input Common-mode Voltage Range RL=10k, Vo min. RL=10k, Vo max. RL=2k, Vo min. RL=2k, Vo max. AVOL Large Signal Voltage Gain No Load, Vo = 2V to 7V RL=10 kΩ, Vo = 2V to 7V RL=2 kΩ, Vo = 2V to 7V AVIN CMRR Supply Voltage Common Mode Rejection Ratio Power Supply Rejection Ratio Supply Current (Amplifier + Buffer) Output Short Circuit Current VCM stepped from 0V to 0.9V VCM stepped from 3V to 8V VCM stepped from 0V to 8V PSRR Is+ ISC VCM = 0.5V, AVIN = 4 to 12V Vo = AVIN/2, No Load Source Sink 45 40 4 72 80 57 70 93.5 105 80.7 77 2.5 60 50 4.3 dB mA mA dB 7.9 74.8 66.8 7.94 Conditions VCM = 1V VCM = 7.5V VCM = 1V VCM = 7.5V (Note 8) VCM = 1V VCM = 7.5V 0 0.003 7.98 0.003 7.95 87.6 75.1 55.8 12 V dB .02 Min (Note 4) Typ (Note 5) 3.5 3 55 190 40 5 Max (Note 4) 10 10 200 300 130 110 8 .02 V Units mV nA nA V Electrical Characteristics — Gamma Buffer Specifications in standard type face are for TJ = 25˚C and those with boldface type apply over the full Operating Temperature Range ( TJ = −40˚C to +125˚C). Unless otherwise specified VIN =2.2V, AVIN = 8V, RCOM = RGAMMA = 50Ω, CCOM = CGAMMA = 1nF. Gamma Buffer Symbol VOS IB VGR VOUT Swing Parameter Input Offset Voltage (Note 9) Input Bias Current (Note 8) Gamma Input Voltage Range RL=10k, Vo min. RL=10k, Vo max. RL=2k, Vo min. RL=2k, Vo max. AVCL Voltage Gain No Load, Vo = 2V to 7V RL=10 kΩ, Vo = 2V to 7V RL=2 kΩ, Vo = 2V to 7V PSRR AVIN Power Supply Rejection Ratio Supply Voltage 7 Conditions Min (Note 4) Typ (Note 5) 1 170 Max (Note 4) 10 300 8 0.075 0.075 Units mV nA V 0 0.05 7.9 7.865 0.995 0.995 0.993 70 4 7.94 0.05 7.9 0.999 0.999 0.998 77 V V/V AVIN = 4 to 12V dB 12 V www.national.com LM2715 Electrical Characteristics — Gamma Buffer (Continued) Specifications in standard type face are for TJ = 25˚C and those with boldface type apply over the full Operating Temperature Range ( TJ = −40˚C to +125˚C). Unless otherwise specified VIN =2.2V, AVIN = 8V, RCOM = RGAMMA = 50Ω, CCOM = CGAMMA = 1nF. Min (Note 4) Typ (Note 5) 2.5 50 40 66 56 Max (Note 4) 4.3 Gamma Buffer Symbol Is+ ISC Parameter Supply Current (Amplifier + Buffer) Output Short Circuit Current Conditions Vo = AVIN/2, No Load Source Sink Units mA mA Electrical Characteristics — PMOS Switch Logic Control Specifications in standard type face are for TJ = 25˚C and those with boldface type apply over the full Operating Temperature Range ( TJ = −40˚C to +125˚C). Unless otherwise specified VIN =2.2V, AVIN = 8V, RCOM = RGAMMA = 50Ω, CCOM = CGAMMA = 1nF. PMOS Switch Logic Control Symbol IDELAY RDSON ISWO ISWI Parameter Delay Current PMOS Switch ON Resistance PMOS Switch Current PMOS Switch Input Current Switch ON SWC = 0V, SWO Open, SWI = 30V SWC = 1.7V, SWO Open, SWI = 30V VSWC Switch ON Switch OFF 1.5 Conditions Min (Note 4) 4.7 Typ (Note 5) 5.7 7 20 50 175 1.1 1.1 0.7 100 µA 350 V Max (Note 4) 6.4 20 Units µA Ω mA Note 1: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJA, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated using: PD (MAX) = (TJ(MAX) − TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Note 2: Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 3: The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. Note 4: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100% production tested or guaranteed through statistical analysis. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL). Note 5: Typical numbers are at 25˚C and represent the most likely norm. Note 6: Duty cycle affects current limit due to ramp generator. See Typical Performance Characteristics for a graph of Power Switch Current Limit vs. VIN and Power Switch Current Limit vs. Temp. Note 7: See Typical Performance Characteristics section for Tri-Temperature data for RDSON vs. VIN. Note 8: Bias current flows into pin. Note 9: Refer to the graphs titled "Input Offset Voltage vs. Common Mode Voltage". www.national.com 8 LM2715 Typical Performance Characteristics Efficiency vs. Load Current (VOUT = 8V) Efficiency vs. Load Current (VOUT = 10V) 20058426 20058473 Frequency vs. VIN Power Switch Current Limit vs. Temperature (VOUT = 8V) 20058425 20058420 Power Switch Current Limit vs. VIN RDSON vs. VIN (ISW = 1A) 20058422 20058427 9 www.national.com LM2715 Typical Performance Characteristics IQ vs. VIN (not switching) (Continued) IQ vs. VIN (switching) 20058421 20058429 Feedback Current vs. Temperature Delay Current vs. VIN 20058463 20058465 PMOS RDSON vs. SWI Voltage SWI Current vs. SWI Voltage (PMOS ON) 20058466 20058467 www.national.com 10 LM2715 Typical Performance Characteristics SWI Current vs. SWI Voltage (PMOS OFF) (Continued) Load Transient Response 20058416 VOUT = 8V, VIN = 2.5V 1) Load, 80mA to 145mA to 80mA 20058468 2) IL, 500mA/div, DC 3) VOUT, 100mV/div, AC T = 50µs/div Load Transient Response PMOS Switching Waveform 20058490 20058458 VOUT = 10V, VIN = 2.5V 1) Load, 100mA to 300mA to 100mA, DC 2) IL, 500mA/div, DC 3) VOUT, 200mV/div, AC T = 50µs/div VOUT = 8V, VIN = 2.5V, RLOAD = 40Ω CD = 100nF, RSW = 10k\1.5k, SWI = 30V, 10% duty cycle 1) SWC, 1V/div, DC 2) SWO, 10V/div, DC T = 2.5µs/div PMOS Rising Edge PMOS Falling Edge 20058459 20058460 VOUT = 8V, VIN = 2.5V, RLOAD = 40Ω CD = 100nF, RSW = 10k\1.5k, SWI = 30V 1) SWC, 1V/div, DC 2) SWO, 10V/div, DC T = 50ns/div VOUT = 8V, VIN = 2.5V, RLOAD = 40Ω CD = 100nF, RSW = 10k\1.5k, SWI = 30V 1) SWC, 1V/div, DC 2) SWO, 10V/div, DC T = 50ns/div 11 www.national.com LM2715 Typical Performance Characteristics Internal Soft Start and PMOS Delay (Continued) Input Offset Voltage vs. Common Mode Voltage (Vcom, 3 units) 20058461 VOUT = 8V, VIN = 2.5V, RLOAD = 32Ω CD = 100nF, RSW = 10k\1.5k, SWI = 30V, SWC = VIN 1) VIN, 2V/div, DC 2) VOUT, 5V/div, DC 3) IL, 500mA/div, DC 4) SWO, 20V/div, DC T = 5ms/div 20058474 Input Offset Voltage vs. Common Mode Voltage (Vcom Over Temperature) Input Offset Voltage vs. Common Mode Voltage (Gamma, 3 units) 20058475 20058476 Input Offset Voltage vs. Common Mode Voltage (Gamma Over Temperature) Input Bias Current vs. Common Mode Voltage (Vcom) 20058477 20058478 www.national.com 12 LM2715 Typical Performance Characteristics Input Bias Current vs. Common Mode Voltage (Gamma) (Continued) Output Voltage vs. Output Current (Vcom or Gamma, sinking) 20058479 20058480 Output Voltage vs. Output Current (Vcom or Gamma, sourcing) Supply Current vs. Common Mode Voltage (Both Amplifiers) 20058481 20058482 Large Signal Step Response Negative Slew Rate vs. Capacitive Load (Vcom or Gamma) 20058483 20058484 13 www.national.com LM2715 Typical Performance Characteristics Positive Slew Rate vs. Capacitive Load (Vcom or Gamma) (Continued) Phase Margin vs. Capacitive Load (Vcom) 20058485 20058492 Unity Gain Frequency vs. Capacitive Load (Vcom) CMRR vs. Frequency (Vcom) 20058493 20058488 PSRR vs. Frequency (Vcom) 20058489 www.national.com 14 LM2715 Operation 20058402 FIGURE 1. Simplified Boost Converter Diagram (a) First Cycle of Operation (b) Second Cycle Of Operation CONTINUOUS CONDUCTION MODE The LM2715 is a TFT Panel Module containing a currentmode, PWM boost regulator. A boost regulator steps the input voltage up to a higher output voltage. In continuous conduction mode (when the inductor current never reaches zero at steady state), the boost regulator operates in two cycles. In the first cycle of operation, shown in Figure 1 (a), the transistor is closed and the diode is reverse biased. Energy is collected in the inductor and the load current is supplied by COUT. The second cycle is shown in Figure 1 (b). During this cycle, the transistor is open and the diode is forward biased. The energy stored in the inductor is transferred to the load and output capacitor. The ratio of these two cycles determines the output voltage. The output voltage is defined approximately as: SETTING THE OUTPUT VOLTAGE The output voltage is set using the feedback pin and a resistor divider connected to the output as shown in the typical operating circuit. The feedback pin voltage is 1.265V, so the ratio of the feedback resistors sets the output voltage according to the following equation: SOFT-START The LM2715 has patented internal circuitry that is used to limit the inductor inrush current on start-up of the boost DC/DC switching regulator. This inrush current limiting circuitry serves as a soft-start. The soft-start time is set by the internal soft-start circuitry, typically 7ms. DELAY CAPACITOR The LM2715 has internal circuitry that can be used to set a delay time preventing control of the PMOS switch via SWC until a desired amount of time after the switcher starts up. The PMOS control circuitry remains inactive until VOUT reaches 85% of the nominal output voltage. When this occurs, CD begins to charge. When the voltage on the Delay pin reaches 1.265V the PMOS switch will become active and can be controlled using the SWC pin. If no CD is used, the PMOS switch can be controlled immediately after VOUT reaches 85% of the nominal output voltage. The delay time can be calculated using the equation: TD = CD * (1.265V/5.7µA) where D is the duty cycle of the switch, D and D' will be required for design calculations 15 www.national.com LM2715 Operation (Continued) INTRODUCTION TO COMPENSATION 4.7nF. Refer to the Typical Application Circuit and the Applications Information section for recommended values for specific circuits and conditions. Refer to the Compensation section for other design requirement. COMPENSATION FOR BOOST DC/DC This section will present a general design procedure to help insure a stable and operational circuit. The designs in this datasheet are optimized for particular requirements. If different conversions are required, some of the components may need to be changed to ensure stability. Below is a set of general guidelines in designing a stable circuit for continuous conduction operation (Inductor current never reaches zero), in most all cases this will provide for stability during discontinuous operation as well. The power components and their effects will be determined first, then the compensation components will be chosen to produce stability. INDUCTOR AND DIODE SELECTION Although the inductor size mentioned earlier is fine for most applications, a more exact value can be calculated. To ensure stability at duty cycles above 50%, the inductor must have some minimum value determined by the minimum input voltage and the maximum output voltage. This equation is: 20058405 FIGURE 2. (a) Inductor current. (b) Diode current. The LM2715 contains a current mode PWM boost converter. The signal flow of this control scheme has two feedback loops, one that senses switch current and one that senses output voltage. To keep a current programmed control converter stable above duty cycles of 50%, the inductor must meet certain criteria. The inductor, along with input and output voltage, will determine the slope of the current through the inductor (see Figure 2 (a)). If the slope of the inductor current is too great, the circuit will be unstable above duty cycles of 50%. A 4.7µH inductor is recommended for most applications. If the duty cycle is approaching the maximum of 85%, it may be necessary to increase the inductance by as much as 2X. See Inductor and Diode Selection for more detailed inductor sizing. The LM2715 provides a compensation pin (VC) to customize the voltage loop feedback. It is recommended that a series combination of RC and CC be used for the compensation network, as shown in the typical application circuit. For any given application, there exists a unique combination of RC and CC that will optimize the performance of the LM2715 circuit in terms of its transient response. The series combination of RC and CC introduces a pole-zero pair according to the following equations: where fs is the switching frequency, D is the duty cycle, and RDSON is the ON resistance of the internal switch taken from the graph "RDSON vs. VIN" in the Typical Performance Characteristics section. This equation is only good for duty cycles greater than 50% (D > 0.5), for duty cycles less than 50% the recommended values may be used. The corresponding inductor current ripple as shown in Figure 2 (a) is given by: where RO is the output impedance of the error amplifier, approximately 1MΩ. For most applications, performance can be optimized by choosing values within the range 5kΩ ≤ RC ≤ 40kΩ (RC can be up to 200kΩ if CC2 is used, see High Output Capacitor ESR Compensation) and 680pF ≤ CC ≤ www.national.com 16 The inductor ripple current is important for a few reasons. One reason is because the peak switch current will be the average inductor current (input current or ILOAD/D’) plus ∆iL. As a side note, discontinuous operation occurs when the inductor current falls to zero during a switching cycle, or ∆iL is greater than the average inductor current. Therefore, continuous conduction mode occurs when ∆iL is less than the average inductor current. Care must be taken to make sure that the switch will not reach its current limit during normal operation. The inductor must also be sized accordingly. It should have a saturation current rating higher than the peak inductor current expected. The output and input voltage ripples are also affected by the total ripple current. The output diode for a boost regulator must be chosen correctly depending on the output voltage and the output current. The typical current waveform for the diode in continuous conduction mode is shown in Figure 2 (b). The diode must be rated for a reverse voltage greater than the output voltage used. The average current rating must be greater than the maximum load current expected, and the peak current rating must be greater than the peak inductor current. During short circuit testing, or if short circuit conditions are possible in the application, the diode current rating must LM2715 Operation (Continued) exceed the switch current limit. Using Schottky diodes with lower forward voltage drop will decrease power dissipation and increase efficiency. DC GAIN AND OPEN-LOOP GAIN Since the control stage of the converter forms a complete feedback loop with the power components, it forms a closedloop system that must be stabilized to avoid positive feedback and instability. A value for open-loop DC gain will be required, from which you can calculate, or place, poles and zeros to determine the crossover frequency and the phase margin. A high phase margin (greater than 45˚) is desired for the best stability and transient response. For the purpose of stabilizing the LM2715, choosing a crossover point well below where the right half plane zero is located will ensure sufficient phase margin. A discussion of the right half plane zero and checking the crossover using the DC gain will follow. INPUT AND OUTPUT CAPACITOR SELECTION The switching action of a boost regulator causes a triangular voltage waveform at the input. A capacitor is required to reduce the input ripple and noise for proper operation of the regulator. The size used depends on the application and board layout. If the regulator will be loaded uniformly, with very little load changes, and at lower current outputs, the input capacitor size can often be reduced. The size can also be reduced if the input of the regulator is very close to the source output. The size will generally need to be larger for applications where the regulator is supplying nearly the maximum rated output or if large load steps are expected. A minimum value of 10µF should be used for the less stressful conditions while a 22µF to 47µF capacitor may be required for higher power and dynamic loads. Larger values and/or lower ESR may be needed if the application requires very low ripple on the input source voltage. The choice of output capacitors is also somewhat arbitrary and depends on the design requirements for output voltage ripple. It is recommended that low ESR (Equivalent Series Resistance, denoted RESR) capacitors be used such as ceramic, polymer electrolytic, or low ESR tantalum. Higher ESR capacitors may be used but will require more compensation which will be explained later on in the section. The ESR is also important because it determines the peak to peak output voltage ripple according to the approximate equation: ∆VOUT ) 2∆iLRESR (in Volts) A minimum value of 10µF is recommended and may be increased to a larger value. After choosing the output capacitor you can determine a pole-zero pair introduced into the control loop by the following equations: ESR is small. If low ESR capacitors are used it can be neglected. If higher ESR capacitors are used see the High Output Capacitor ESR Compensation section. RIGHT HALF PLANE ZERO A current mode control boost regulator has an inherent right half plane zero (RHP zero). This zero has the effect of a zero in the gain plot, causing an imposed +20dB/decade on the rolloff, but has the effect of a pole in the phase, subtracting another 90˚ in the phase plot. This can cause undesirable effects if the control loop is influenced by this zero. To ensure the RHP zero does not cause instability issues, the control loop should be designed to have a bandwidth of less than 1/6 the frequency of the RHP zero. This zero occurs at a frequency of: where ILOAD is the maximum load current. SELECTING THE COMPENSATION COMPONENTS The first step in selecting the compensation components RC and CC is to set a dominant low frequency pole in the control loop. Simply choose values for RC and CC within the ranges given in the Introduction to Compensation section to set this pole in the area of 10Hz to 500Hz. The frequency of the pole created is determined by the equation: where RO is the output impedance of the error amplifier, approximately 1MΩ. Since RC is generally much less than RO, it does not have much effect on the above equation and can be neglected until a value is chosen to set the zero fZC. fZC is created to cancel out the pole created by the output capacitor, fP1. The output capacitor pole will shift with different load currents as shown by the equation, so setting the zero is not exact. Determine the range of fP1 over the expected loads and then set the zero fZC to a point approximately in the middle. The frequency of this zero is determined by: Where RL is the minimum load resistance corresponding to the maximum load current. The zero created by the ESR of the output capacitor is generally very high frequency if the Now RC can be chosen with the selected value for CC. Check to make sure that the pole fPC is still in the 10Hz to 500Hz range, change each value slightly if needed to ensure both component values are in the recommended range. After checking the design at the end of this section, these values can be changed a little more to optimize performance if desired. This is best done in the lab on a bench, checking the load step response with different values until the ringing and overshoot on the output voltage at the edge of the load steps is minimal. This should produce a stable, high performance circuit. For improved transient response, higher values of RC should be chosen. This will improve the overall bandwidth which makes the regulator respond more quickly to transients. If more detail is required, or the most optimal performance is desired, refer to a more in depth discussion of compensating current mode DC/DC switching regulators. 17 www.national.com LM2715 Operation (Continued) HIGH OUTPUT CAPACITOR ESR COMPENSATION When using an output capacitor with a high ESR value, or just to improve the overall phase margin of the control loop, another pole may be introduced to cancel the zero created by the ESR. This is accomplished by adding another capacitor, CC2, directly from the compensation pin VC to ground, in parallel with the series combination of RC and CC. The pole should be placed at the same frequency as fZ1, the ESR zero. The equation for this pole follows: tance found in the Electrical Characteristics table, and RDSON is the value chosen from the graph "RDSON vs. VIN " in the Typical Performance Characteristics section. LAYOUT CONSIDERATIONS Vcom AND Gamma If the supply input, AVIN, of the Vcom amplifier and Gamma buffer is tied directly to the output of the boost DC/DC converter, a 100nF bypass capacitor should be connected close to the device between AVIN and PGND. If the AVIN supply is connected to an external source, a larger bypass capacitor may be required for desired performance depending on the external supply voltage ripple and noise. The Gamma buffer and Vcom amplifier input signal traces should be routed away from the SW pin. Routing these traces near the SW pin may inject noise into the device and affect the performance of the amplifier and/or buffer. If resistor dividers are used to drive the inputs of either the Vcom amplifier or Gamma buffer the ground connections for them should be made to AGND to minimize noise. BOOST SWITCHING REGULATOR The LM2715 uses two ground connections, PGND and AGND. The feedback, delay, and compensation networks should be connected directly to their own dedicated analog ground plane and this ground plane must connect to the AGND pin, as shown in Figure 3. No other circuits should connect to this AGND plane. If no analog ground plane is available then the ground connections of the feedback, delay, and compensation networks must tie directly to the AGND pin, as show in Figure 4. Connecting these networks to the PGND plane can inject noise into the system and effect performance. The input bypass capacitor CIN must be placed close to the device and should connect between VIN and PGND. This will reduce copper trace resistance which effects input voltage ripple of the IC. For additional input voltage filtering, a 100nF bypass capacitor can be placed in parallel with CIN, close to the VIN pin, to shunt any high frequency noise to ground. The output capacitor, COUT, should also be placed close to the device and should connect between VOUT and PGND. Any copper trace connections for the COUT capacitor can increase the series resistance, which directly effects output voltage ripple and efficiency. The feedback network, resistors R1 and R2, should be kept close to the FB pin, and away from the inductor, to minimize copper trace connections that can inject noise into the system. Trace connections made to the inductor and schottky diode should be minimized to reduce power dissipation and increase overall efficiency. The AGND and PGND pins must connect directly to each other at the device as shown in Figure 3 and Figure 4. Failure to do so may affect the performance of the LM2715 and limit its output current capability. To ensure this equation is valid, and that CC2 can be used without negatively impacting the effects of RC and CC, fPC2 must be greater than 10fZC. CHECKING THE DESIGN The final step is to check the design. This is to ensure a bandwidth of 1/6 or less of the frequency of the RHP zero. This is done by calculating the open-loop DC gain, ADC. After this value is known, you can calculate the crossover visually by placing a −20dB/decade slope at each pole, and a +20dB/ decade slope for each zero. The point at which the gain plot crosses unity gain, or 0dB, is the crossover frequency. If the crossover frequency is less than 1/6 the RHP zero, the phase margin should be high enough for stability. The phase margin can also be improved by adding CC2 as discussed earlier in the section. The equation for ADC is given below with additional equations required for the calculation: mc ) 0.181fs (in V/s) where RL is the minimum load resistance, VIN is the minimum input voltage, gm is the error amplifier transconduc- www.national.com 18 LM2715 Operation (Continued) 20058452 FIGURE 3. Multi-Layer Layout 20058453 FIGURE 4. Single Layer Layout 19 www.national.com LM2715 Application Information 20058472 FIGURE 5. Li-Ion to 10V TFT Application 20058491 FIGURE 6. Li-Ion to 12V TFT Application www.national.com 20 LM2715 Physical Dimensions inches (millimeters) unless otherwise noted TSSOP-16 Pin Package (MTC) For Ordering, Refer to Ordering Information Table NS Package Number MTC16 LLP-24 Pin Package (SQ) For Ordering, Refer to Ordering Information Table NS Package Number SQA24B 21 www.national.com LM2715 TFT Panel Module Notes National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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