LM2717-ADJ

LM2717-ADJ Dual Step-Down DC/DC Converter March 4, 2008 LM2717-ADJ Dual Step-Down DC/DC Converter General Description The LM2717-ADJ is composed of two PWM DC/DC buck (step-down) converters. Both converters are used to generate an adjustable output voltage as low as 1.267V. Both also feature low RDSON (0.16Ω) internal switches for maximum efficiency. Operating frequency can be adjusted anywhere between 300kHz and 600kHz allowing the use of small external components. External soft-start pins for each converter enables the user to tailor the soft-start times to a specific application. Each converter may also be shut down independently with its own shutdown pin. The LM2717-ADJ is available in a low profile 24-lead TSSOP package ensuring a low profile overall solution. Features ■ Adjustable buck converter with a 2.2A, 0.16Ω, internal switch (Buck 1) ■ Adjustable buck converter with a 3.2A, 0.16Ω, internal ■ ■ ■ ■ ■ switch (Buck 2) Operating input voltage range of 4V to 20V Input undervoltage protection 300kHz to 600kHz pin adjustable operating frequency Over temperature protection Small 24-Lead TSSOP package Applications ■ ■ ■ ■ ■ TFT-LCD Displays Handheld Devices Portable Applications Laptop Computers Automotive Applications Typical Application Circuit 20167901 © 2008 National Semiconductor Corporation 201679 www.national.com LM2717-ADJ Connection Diagram Top View 20167904 24-Lead TSSOP Ordering Information Order Number LM2717MT-ADJ LM2717MTX-ADJ LM2717MT-ADJ LM2717MTX-ADJ NOPB NOPB Spec Package Type TSSOP-24 TSSOP-24 TSSOP-24 TSSOP-24 NSC Package Drawing MTC24 MTC24 MTC24 MTC24 Supplied As 61 Units, Rail 2500 Units, Tape and Reel 61 Units, Rail 2500 Units, Tape and Reel www.national.com 2 LM2717-ADJ Pin Descriptions Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Name PGND PGND AGND FB1 VC1 VBG VC2 FB2 AGND AGND PGND PGND SW2 VIN VIN CB2 SHDN2 SS2 FSLCT SS1 SHDN1 CB1 VIN SW1 Function Power ground. PGND and AGND pins must be connected together directly at the part. Power ground. PGND and AGND pins must be connected together directly at the part. Analog ground. PGND and AGND pins must be connected together directly at the part. Buck 1 output voltage feedback input. Buck 1 compensation network connection. Connected to the output of the voltage error amplifier. Bandgap connection. Buck 2 compensation network connection. Connected to the output of the voltage error amplifier. Buck 2 output voltage feedback input. Analog ground. PGND and AGND pins must be connected together directly at the part. Analog ground. PGND and AGND pins must be connected together directly at the part. Power ground. PGND and AGND pins must be connected together directly at the part. Power ground. PGND and AGND pins must be connected together directly at the part. Buck 2 power switch input. Switch connected between VIN pins and SW2 pin. Analog power input. All VIN pins are internally connected and should be connected together directly at the part. Analog power input. All VIN pins are internally connected and should be connected together directly at the part. Buck 2 converter bootstrap capacitor connection. Shutdown pin for Buck 2 converter. Active low. Buck 2 soft start pin. Switching frequency select input. Use a resistor to set the frequency anywhere between 300kHz and 600kHz. Buck 1 soft start pin. Shutdown pin for Buck 1 converter. Active low. Buck 1 converter bootstrap capacitor connection. Analog power input. All VIN pins are internally connected and should be connected together directly at the part. Buck 1 power switch input. Switch connected between VIN pins and SW1 pin. 3 www.national.com LM2717-ADJ Block Diagram 20167903 www.national.com 4 LM2717-ADJ Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN SW1 Voltage SW2 Voltage FB1, FB2 Voltages CB1, CB2 Voltages VC1 Voltage VC2 Voltage SHDN1 Voltage SHDN2 Voltage SS1 Voltage SS2 Voltage FSLCT Voltage −0.3V to 22V −0.3V to 22V −0.3V to 22V −0.3V to 7V −0.3V to VIN+7V (VIN=VSW) Maximum Junction Temperature Power Dissipation(Note 2) Lead Temperature Vapor Phase (60 sec.) Infrared (15 sec.) ESD Susceptibility (Note 3) Human Body Model 150°C Internally Limited 300°C 215°C 220°C 2kV Operating Conditions Operating Junction Temperature Range (Note 4) Storage Temperature Supply Voltage SW1 Voltage SW2 Voltage Switching Frequency −40°C to +125°C −65°C to +150°C 4V to 20V 20V 20V 300kHz to 600kHz 0.965V ≤ VC2 ≤ 1.565V −0.3V to 7.5V −0.3V to 7.5V −0.3V to 2.1V −0.3V to 2.1V AGND to 5V 1.75V ≤ VC1 ≤ 2.25V Electrical Characteristics Specifications in standard type face are for TJ = 25°C and those with boldface type apply over the full Operating Temperature Range (TJ = −40°C to +125°C). VIN = 5V, IL = 0A, and FSW = 300kHz unless otherwise specified. Symbol IQ Parameter Conditions Min (Note 4) Typ (Note 5) 2.7 6 9 1.248 1.230 -0.01 1.236 1.214 1.236 1.214 VIN = 8V (Note 7) VIN = 12V, VOUT = 3.3V ICL2(Note 6) IB1 IB2 VIN gm1 gm2 AV1 AV2 DMAX FSW Buck 2 Switch Current Limit Buck 1 FB Pin Bias Current (Note 8) Buck 2 FB Pin Bias Current (Note 8) Input Voltage Range Buck 1 Error Amp Transconductance Buck 2 Error Amp Transconductance Buck 1 Error Amp Voltage Gain Buck 2 Error Amp Voltage Gain Maximum Duty Cycle Switching Frequency RF = 46.4k RF = 22.6k 5 Max (Note 4) 6 12 27 1.294 1.299 0.01 0.125 Units mA mA µA V %/V V V A A nA nA V µmho µmho V/V V/V % Total Quiescent Current (both Not Switching switchers) Switching, switch open VSHDN = 0V Bandgap Voltage Bandgap Voltage Line Regulation Buck 1 Feedback Voltage Buck 2 Feedback Voltage Buck 1 Switch Current Limit VBG %VBG/ΔVIN VFB1 VFB2 ICL1(Note 6) 1.267 1.258 1.258 2.2 1.286 1.288 1.286 1.288 2.0 3.5 400 400 20 1.4 2.6 1.65 3.2 3.05 70 65 VIN = 8V (Note 7) VIN = 12V, VOUT = 5V VIN = 20V VIN = 20V 4 ΔI = 20µA ΔI = 20µA 1340 1360 134 136 89 240 480 93 300 600 360 720 kHz kHz www.national.com LM2717-ADJ Symbol ISHDN1 ISHDN2 IL1 IL2 RDSON1 RDSON2 ThSHDN1 ThSHDN2 ISS1 ISS2 UVP θJA Parameter Conditions Min (Note 4) −5 −5 Typ (Note 5) Max (Note 4) 5 5 Units µA µA µA µA mΩ mΩ V V µA µA V °C/W Buck 1 Shutdown Pin Current 0V < VSHDN1 < 7.5V Buck 2 Shutdown Pin Current 0V < VSHDN2 < 7.5V Buck 1 Switch Leakage Current Buck 2 Switch Leakage Current VIN = 20V VIN = 20V 0.01 0.01 160 160 1.8 1.8 4 4 4 1.36 1.33 1.36 1.33 9 9 3.8 3.6 5 5 180 300 180 300 0.7 0.7 15 15 3.3 Buck 1 Switch RDSON (Note 9) ISW = 100mA Buck 2 Switch RDSON (Note 9) ISW = 100mA Buck 1 SHDN Threshold Buck 2 SHDN Threshold Buck 1 Soft Start Pin Current Buck 2 Soft Start Pin Current On Threshold Off Threshold Thermal Resistance (Note 10) TSSOP, package only Output High Output Low Output High Output Low 115 Note 1: Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 2: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJA, and the ambient temperature, TA. See the Electrical Characteristics table for the thermal resistance. The maximum allowable power dissipation at any ambient temperature is calculated using: PD (MAX) = (TJ(MAX) − TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Note 3: The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. Note 4: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100% tested or guaranteed through statistical analysis. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL). Note 5: Typical numbers are at 25°C and represent the most likely norm. Note 6: Duty cycle affects current limit due to ramp generator. Note 7: Current limit at 0% duty cycle. See TYPICAL PERFORMANCE section for Switch Current Limit vs. Input Voltage. Note 8: Bias current flows into FB pin. Note 9: Includes the bond wires and package leads, RDSON from VIN pin(s) to SW pin. Note 10: Refer to National's packaging website for more detailed thermal information and mounting techniques for the TSSOP package. www.national.com 6 LM2717-ADJ Typical Performance Characteristics Shutdown IQ vs. Input Voltage Switching IQ vs. Input Voltage (FSW = 300kHz) 20167960 20167961 Switching Frequency vs. Input Voltage (FSW = 300kHz) Buck 1 RDS(ON) vs. Input Voltage 20167963 20167962 Buck 2 RDS(ON) vs. Input Voltage Buck 1 Efficiency vs. Load Current (VOUT = 3.3V) 20167964 20167965 7 www.national.com LM2717-ADJ Buck 2 Efficiency vs. Load Current (VOUT = 15V) Buck 2 Efficiency vs. Load Current (VOUT = 5V) 20167966 20167967 Buck 1 Switch Current Limit vs. Input Voltage Buck 2 Switch Current Limit vs. Input Voltage 20167968 20167969 Buck 1 Switch Current Limit vs. Temperature (VIN = 12V) Buck 2 Switch Current Limit vs. Temperature (VIN = 12V) 20167912 20167913 www.national.com 8 LM2717-ADJ Buck 1 Switch ON Resistance vs. Temperature Buck 2 Switch ON Resistance vs. Temperature 20167910 20167911 Switching Frequency vs. RF Resistance 20167914 Buck Operation PROTECTION (BOTH REGULATORS) The LM2717-ADJ has dedicated protection circuitry running during normal operation to protect the IC. The Thermal Shutdown circuitry turns off the power devices when the die temperature reaches excessive levels. The UVP comparator protects the power devices during supply power startup and shutdown to prevent operation at voltages less than the minimum input voltage. The OVP comparator is used to prevent the output voltage from rising at no loads allowing full PWM operation over all load conditions. The LM2717-ADJ also features a shutdown mode for each converter decreasing the supply current to approximately 10µA (both in shutdown mode). CONTINUOUS CONDUCTION MODE The LM2717-ADJ contains current-mode, PWM buck regulators. A buck regulator steps the input voltage down to a lower output voltage. In continuous conduction mode (when the inductor current never reaches zero at steady state), the buck regulator operates in two cycles. The power switch is connected between VIN and SW1 and SW2. In the first cycle of operation the transistor is closed and the diode is reverse biased. Energy is collected in the inductor 9 and the load current is supplied by COUT and the rising current through the inductor. During the second cycle the transistor is open and the diode is forward biased due to the fact that the inductor current cannot instantaneously change direction. The energy stored in the inductor is transferred to the load and output capacitor. The ratio of these two cycles determines the output voltage. The output voltage is defined approximately as: where D is the duty cycle of the switch, D and D′ will be required for design calculations. The LM2717-ADJ has a minimum switch ON time which corresponds to a minimum duty cycle of approximately 10% at 600kHz operation and approximately 5% at 300kHz operation. In the case of some high voltage differential applications (low duty cycle operation) this minimum duty cycle may be exceeded causing the feedback pin over-voltage protection to trip as the output voltage rises. This will put the device into a PFM type operation which can cause an unpredictable frequency spectrum and may cause the average output voltage to rise slightly. If this is a concern the switching frequency may www.national.com LM2717-ADJ be lowered and/or a pre-load added to the output to keep the device full PWM operation. Note that the OVP function monitors the FB pin so it will not function if the feedback resistor is disconnected from the output. Due to slight differences between the two converters it is recommended that Buck 1 be used for the lower of the two output voltages for best operation. DESIGN PROCEDURE This section presents guidelines for selecting external components. SETTING THE OUTPUT VOLTAGE The output voltage is set using the feedback pin and a resistor divider connected to the output as shown in Figure 4. The feedback pin voltage (VFB) is 1.258V, so the ratio of the feedback resistors sets the output voltage according to the following equation: this minimum requirement at the peak inductor current expected for the application regardless of what the inductor ripple current and output ripple voltage requirements are. A value larger than 2LMIN is acceptable if the ripple requirements of the application require it but it may reduce the phase margin and increase the difficulty in compensating the circuit. The most important parameters for the inductor from an applications standpoint are the inductance, peak current and the DC resistance. The inductance is related to the peak-to-peak inductor ripple current, the input and the output voltages (for 300kHz operation): INPUT CAPACITOR A low ESR aluminum, tantalum, or ceramic capacitor is needed between the input pin and power ground. This capacitor prevents large voltage transients from appearing at the input. The capacitor is selected based on the RMS current and voltage requirements. The RMS current is given by: A higher value of ripple current reduces inductance, but increases the conductance loss, core loss, and current stress for the inductor and switch devices. It also requires a bigger output capacitor for the same output voltage ripple requirement. A reasonable value is setting the ripple current to be 30% of the DC output current. Since the ripple current increases with the input voltage, the maximum input voltage is always used to determine the inductance. The DC resistance of the inductor is a key parameter for the efficiency. Lower DC resistance is available with a bigger winding area. A good tradeoff between the efficiency and the core size is letting the inductor copper loss equal 2% of the output power. OUTPUT CAPACITOR The selection of COUT is driven by the maximum allowable output voltage ripple. The output ripple in the constant frequency, PWM mode is approximated by: The RMS current reaches its maximum (IOUT/2) when VIN equals 2VOUT. This value should be calculated for both regulators and added to give a total RMS current rating. For an aluminum or ceramic capacitor, the voltage rating should be at least 25% higher than the maximum input voltage. If a tantalum capacitor is used, the voltage rating required is about twice the maximum input voltage. The tantalum capacitor should be surge current tested by the manufacturer to prevent being shorted by the inrush current. The minimum capacitor value should be 47µF for lower output load current applications and less dynamic (quickly changing) load conditions. For higher output current applications or dynamic load conditions a 68µF to 100µF low ESR capacitor is recommended. It is also recommended to put a small ceramic capacitor (0.1µF to 4.7µF) between the input pins and ground to reduce high frequency spikes. INDUCTOR SELECTION The most critical parameter for the inductor in a current mode switcher is the minimum value required for stable operation. To prevent subharmonic oscillations and achieve good phase margin a target minimum value for the inductor is: The ESR term usually plays the dominant role in determining the voltage ripple. Low ESR ceramic, aluminum electrolytic, or tantalum capacitors (such as MuRata MLCC, Taiyo Yuden MLCC, Nichicon PL series, Sanyo OS-CON, Sprague 593D, 594D, AVX TPS, and CDE polymer aluminum) is recommended. An aluminum electrolytic capacitor is not recommended for temperatures below −25°C since its ESR rises dramatically at cold temperatures. Ceramic or tantalum capacitors have much better ESR specifications at cold temperature and is preferred for low temperature applications. BOOTSTRAP CAPACITOR A 4.7nF ceramic capacitor or larger is recommended for the bootstrap capacitor. For applications where the input voltage is less than twice the output voltage a larger capacitor is recommended, generally 0.1µF to 1µF to ensure plenty of gate drive for the internal switches and a consistently low RDSON. SOFT-START CAPACITOR (BOTH REGULATORS) The LM2717-ADJ contains circuitry that can be used to limit the inrush current on start-up of the DC/DC switching regulators. This inrush current limiting circuitry serves as a soft-start. The external SS pins are used to tailor the soft-start for a specific application. A current (ISS) charges the external softstart capacitor, CSS. The soft-start time can be estimated as: TSS = CSS*0.6V/ISS When programming the soft-start time use the equation given in the Soft-Start Capacitor section above. The soft-start function is used simply to limit inrush current to the device that 10 Where VIN is the minimum input voltage and RDSON is the maximum switch ON resistance. For best stability the inductor should be in the range of 0.5LMIN (absolute minimum) and 2LMIN. Using an inductor with a value less than 0.5LMIN can cause subharmonic oscillations. The inductor should meet www.national.com LM2717-ADJ could stress the input voltage supply. The soft-start time described above is the time it takes for the current limit to ramp to maximum value. When this function is used the current limit starts at a low value and increases to nominal at the set softstart time. Under maximum load conditions the output voltage may rise at the same rate as the soft-start, however at light or no load conditions the output voltage will rise much faster as the switch will not need to conduct much current to charge the output capacitor. SHUTDOWN OPERATION (BOTH REGULATORS) The shutdown pins of the LM2717-ADJ are designed so that they may be controlled using 1.8V or higher logic signals. If the shutdown function is not to be used the pin may be left open. The maximum voltage to the shutdown pin should not exceed 7.5V. If the use of a higher voltage is desired due to system or other constraints it may be used, however a 100k or larger resistor is recommended between the applied voltage and the shutdown pin to protect the device. SCHOTTKY DIODE The breakdown voltage rating of D1 and D2 is preferred to be 25% higher than the maximum input voltage. The current rating for the diode should be equal to the maximum output current for best reliability in most applications. In cases where the input voltage is much greater than the output voltage the average diode current is lower. In this case it is possible to use a diode with a lower average current rating, approximately (1-D)*IOUT however the peak current rating should be higher than the maximum load current. LOOP COMPENSATION The general purpose of loop compensation is to meet static and dynamic performance requirements while maintaining stability. Loop gain is what is usually checked to determine small-signal performance. Loop gain is equal to the product of control-output transfer function and the output-control transfer function (the compensation network transfer function). The DC loop gain of the LM2717 is usually around 55dB to 60dB when loaded. Generally speaking it is a good idea to have a loop gain slope that is -20dB /decade from a very low frequency to well beyond the crossover frequency. The crossover frequency should not exceed one-fifth of the switching frequency, i.e. 60kHz in the case of 300kHz switching frequency. The higher the bandwidth is, the faster the load transient response speed will potentially be. However, if the duty cycle saturates during a load transient, further increasing the small signal bandwidth will not help. Since the controloutput transfer function usually has very limited low frequency gain, it is a good idea to place a pole in the compensation at zero frequency, so that the low frequency gain will be relatively large. A large DC gain means high DC regulation accuracy (i.e. DC voltage changes little with load or line variations). The rest of the compensation scheme depends highly on the shape of the control-output plot. 20167916 FIGURE 1. Control-Output Transfer Function As shown in Figure 1, the example control-output transfer function consists of one pole (fp), one zero (fz), and a double pole at fn (half the switching frequency). The following can be done to create a -20dB /decade roll-off of the loop gain: Place the first pole at 0Hz, the first zero at fp, the second pole at fz, and the second zero at fn. The resulting output-control transfer function is shown in Figure 2. 20167917 FIGURE 2. Output-Control Transfer Function The control-output corner frequencies, and thus the desired compensation corner frequencies, can be determined approximately by the following equations: Where Co is the output capacitance, Re is the output capacitance ESR, Ro is the load resistance, L is the inductor value, and f is the switching frequency used. Since fp is determined by the output network, it will shift with loading (Ro) and duty cycle. First determine the range of frequencies (fpmin/max) of the pole across the expected load range, then place the first compensation zero within that range. Example: Vo = 5V, Re = 20mΩ, Co = 100µF, Romax = 5V/100mA = 50Ω, Romin = 5V/1A = 5Ω, L = 10µH, f = 300kHz: 11 www.national.com LM2717-ADJ A second zero can also be added with a resistor in series with Cc2. If used, this zero should be placed at fn, where the control to output gain rolls off at -40dB/dec. Generally, fn will be well below the 0dB level and thus will have little effect on stability. Rc2 can be calculated with the following equation: Once the fp range is determined, Rc1 should be calculated using: 20167930 Where B is the desired gain in V/V at fp (fz1), gm is the transconductance of the error amplifier, and R1 and R2 are the feedback resistors as shown in Figure 3. A gain value around 10dB (3.3v/v) is generally a good starting point. Example: B = 3.3 v/v, gm=1350µmho, R1 = 20 KΩ, R2 = 59 KΩ: FIGURE 3. Compensation Network Note that the values calculated here give a good baseline for stability and will work well with most applications. The values in some cases may need to be adjusted some for optimum stability or the values may need to be adjusted depending on a particular applications bandwidth requirements. LAYOUT CONSIDERATIONS The LM2717-ADJ uses two separate ground connections, PGND for the drivers and boost NMOS power device and AGND for the sensitive analog control circuitry. The AGND and PGND pins should be tied directly together at the package. The feedback and compensation networks should be connected directly to a dedicated analog ground plane and this ground plane must connect to the AGND pin. If no analog ground plane is available then the ground connections of the feedback and compensation networks must tie directly to the AGND pin. Connecting these networks to the PGND can inject noise into the system and effect performance. The input bypass capacitor CIN, as shown in Figure 4, must be placed close to the IC. This will reduce copper trace resistance which effects input voltage ripple of the IC. For additional input voltage filtering, a 0.1µF to 4.7µF bypass capacitors can be placed in parallel with CIN, close to the VIN pins to shunt any high frequency noise to ground. The output capacitors, COUT1 and COUT2, should also be placed close to the IC. Any copper trace connections for the COUTX capacitors can increase the series resistance, which directly effects output voltage ripple. The feedback network, resistors RFB1(3) and RFB2(4), should be kept close to the FB pin, and away from the inductor to minimize copper trace connections that can inject noise into the system. Trace connections made to the inductors and schottky diodes should be minimized to reduce power dissipation and increase overall efficiency. For more detail on switching power supply layout considerations see Application Note AN-1149: Layout Guidelines for Switching Power Supplies. Bandwidth will vary proportional to the value of Rc1. Next, Cc1 can be determined with the following equation: Example: fpmin = 297 Hz, Rc1 = 20 KΩ: The value of Cc1 should be within the range determined by fpmin/max. A higher value will generally provide a more stable loop, but too high a value will slow the transient response time. The compensation network (Figure 3) will also introduce a low frequency pole which will be close to 0Hz. A second pole should also be placed at fz. This pole can be created with a single capacitor Cc2 and a shorted Rc2 (see Figure 3). The minimum value for this capacitor can be calculated by: Cc2 may not be necessary, however it does create a more stable control loop. This is especially important with high load currents. Example: fz = 80 kHz, Rc1 = 20 KΩ: www.national.com 12 LM2717-ADJ Application Information Some Recommended Inductors (Others May Be Used) Manufacturer Coilcraft TDK Pulse Sumida Inductor DO3316 and DT3316 series SLF10145 series P0751 and P0762 series CDRH8D28 and CDRH8D43 series Some Recommended Input And Output Capacitors (Others May Be Used) Manufacturer Vishay Sprague Taiyo Yuden Cornell Dubilier MuRata Capacitor 293D, 592D, and 595D series tantalum High capacitance MLCC ceramic ESRD seriec Polymer Aluminum Electrolytic SPV and AFK series V-chip series High capacitance MLCC ceramic Contact Information www.vishay.com www.t-yuden.com www.cde.com www.murata.com Contact Information www.coilcraft.com 800-3222645 www.component.tdk.com 847-803-6100 www.pulseeng.com www.sumida.com 20167958 FIGURE 4. 15V, 3.3V Output Application 13 www.national.com LM2717-ADJ 20167959 FIGURE 5. 5V, 3.3V Output Application 20167915 FIGURE 6. 3.3V, 1.8V Output Application www.national.com 14 LM2717-ADJ Physical Dimensions inches (millimeters) unless otherwise noted TSSOP-24 Pin Package (MTC) For Ordering, Refer to Ordering Information Table NS Package Number MTC24 15 www.national.com LM2717-ADJ Dual Step-Down DC/DC Converter Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Amplifiers Audio Clock Conditioners Data Converters Displays Ethernet Interface LVDS Power Management Switching Regulators LDOs LED Lighting PowerWise Serial Digital Interface (SDI) Temperature Sensors Wireless (PLL/VCO) www.national.com/amplifiers www.national.com/audio www.national.com/timing www.national.com/adc www.national.com/displays www.national.com/ethernet www.national.com/interface www.national.com/lvds www.national.com/power www.national.com/switchers www.national.com/ldo www.national.com/led www.national.com/powerwise www.national.com/sdi www.national.com/tempsensors www.national.com/wireless WEBENCH Analog University App Notes Distributors Green Compliance Packaging Design Support www.national.com/webench www.national.com/AU www.national.com/appnotes www.national.com/contacts www.national.com/quality/green www.national.com/packaging www.national.com/quality www.national.com/refdesigns www.national.com/feedback Quality and Reliability Reference Designs Feedback THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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