LM2755TMX

LM2755 Charge Pump LED Controller with I2C Compatible Interface October 2007 LM2755 Charge Pump LED Controller with I2C Compatible Interface in Micro SMD General Description The LM2755 is a charge-pump-based, constant current LED driver capable of driving 3 LEDs with a total output current up to 90mA. The diode current waveforms of each LED can be trapezoidal with timing and level parameters (rise time, fall time, high level, low level, delay, high time, low time) programmed via an I2C compatible interface. The 32 brightness levels found on the LM2755 are exponentially spaced (as opposed to linearly spaced) to better match the response of the human eye to changing brightness levels. The device requires only four small and low-cost ceramic capacitors. The LM2755 provides excellent efficiency without the use of an inductor by operating the charge pump in a gain of 3/2 or in a gain of 1. Maximum efficiency is achieved over the input voltage range by actively selecting the proper gain based on the LED forward voltage requirements. The pre-regulation scheme used by the LM2755 is optimized to ensure low conducted noise on the input. An internal softstart circuitry eliminates high inrush current at start-up. The LM2755 consumes 3µA (typ.) of supply current in shut-down. The LM2755 is available in National’s tiny 18-bump thin micro SMD package. Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 90% Peak Efficiency Total solution size < 13mm2 No Inductor Required: Only 4 Inexpensive Ceramic Caps 3 Independently Controlled Constant Current Outputs Programmable Trapezoidal Dimming Waveform on Each Output Programmable Timing Control Via Internal Registers and External Clock Synchronization Input 32 Exponential Dimming Steps with 800:1 Dimming Ratio Programmable brightness control via I2C compatible interface Hardware Enable Pin Wide input voltage range: 2.7V to 5.5V Tiny 18-bump thin micro SMD: 1.8mm x 1.6mm x 0.6mm Applications ■ ■ ■ ■ Indicator LEDs Keypad LED Backlight Display LED Backlight Fun-light LEDs Typical Application Circuit 20180904 Minimum Solution Size 20180901 © 2007 National Semiconductor Corporation 201809 www.national.com LM2755 Connection Diagram 18-Bump Thin Micro SMD Package 1.615mm × 1.807mm × 0.6mm NS Package Number TMD18AAA 20180902 Pin Descriptions Pin #s A1 A3 A5 A7 B2 B4 B6 C1 C3 C5 C7 D2 D4 D6 E1 E3 E5 E7 Pin Names ID1 ID2 ID3 SYNC ISET HWEN SDIO VIN GND VIO SCL POUT C2GND C1+ C2+ C1ADDR LED Driver 1 LED Driver 2 LED Driver 3 External clock synchronization input LED Driver Current Set Pin Hardware EN Pin. Low '0' = RESET, High '1' = Normal Operation Serial data Input/Output pin Input Voltage Connection Ground Connection. Serial Bus Voltage Level Input Serial Clock Pin Charge Pump Output Flying Capacitor Connect Ground connection Flying Capacitor Connect Flying Capacitor Connect Flying Capacitor Connect Chip Address Select Input. VIN = 0x67. Ground = 0x18. Pin Descriptions Ordering Information Order Information LM2755TM LM2755TMX Package TMD18AAA, µSMD-18 Supplied As 250 Units, Tape & Reel 3000 Units, Tape & Reel www.national.com 2 LM2755 Absolute Maximum Ratings (Notes 1, 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN pin voltage SCL, SDIO, VIO, ADDR, SYNC pin voltages IDx Pin Voltages Continuous Power Dissipation (Note 3) Junction Temperature (TJ-MAX) Storage Temperature Range Maximum Lead Temperature (Soldering) ESD Rating(Note ) Human Body Model -0.3V to 6.0V -0.3V to (VIN+0.3V) w/ 6.0V max -0.3V to (VPOUT+0.3V) w/ 6.0V max Internally Limited 150°C -65°C to +150°C (Note 4) Operating Rating (Notes 1, 2) Input Voltage Range Junction Temperature (TJ) Range Ambient Temperature (TA) Range (Note 6) 2.7V to 5.5V -30°C to 105°C -30°C to +85°C Thermal Properties Juntion-to-Ambient Thermal Resistance (θJA), TMD18AAA Package (Note 7) 56°C/W ESD Caution Notice National Semiconductor recommends that all integrated circuits be handled with appropriate ESD precautions. Failure to observe proper ESD handling techniques can result in damage to the device. 2.5kV (Notes 2, 8) Electrical Characteristics Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = 3.6V; VD1 = 0.4V; VD2 = 0.4V; VD3 = 0.4V; RSET = 12.5kΩ; D1, D2, and D3 = Fullscale Current; EN1, EN2, and EN3 Bits = “1”; CLK bit = '0'; C1=C2= 0.47µF, CIN=COUT= 1µF; Specifications related to output current(s) and current setting pins (IDx and ISET) apply to D1, D2 and D3. (Note 9) Symbol IDx IMATCH IQ ISD VSET IDX / ISET VDxTH Parameter Output Current Regulation Output Current Matching Quiescent Supply Current Shutdown Supply Current ISET Pin Voltage VDx 1x to 3/2x Gain Transition Threshold Current Source Headroom Voltage Requirement (Note 12) Switching Frequency Start-up Time Internal Diode Current PWM Frequency Maximum External Sync Frequency HWEN Voltage Thresholds 2.7V ≤ VIN ≤ 5.5V Reset Normal Operation 0 1.23 1.44 0 0.65 × VIO POUT = 90% steady state 3.0V ≤ VIN ≤ 5.5V 3.0V ≤ VIN ≤ 5.5V (Note 10) Gain = 3/2 D1-3 = OPEN, RSET = OPEN 3.0V ≤ VIN ≤ 5.5V EN1 = EN2 = EN3 = 0 3.0V ≤ VIN ≤ 5.5V Condition Min 18.7 Typ 20.7 1 1.0 5 1.25 200 350 mV 1.3 9.5 Max 22.7 Units mA % mA µA V Output Current to Current Set Ratio (Note 11) VD1 and/or VD2 and/or VD3Falling IDx = 95% ×IDx (nom.) (IDx (nom) ≈ 20mA) Gain = 3/2 VHR fSW tSTART fPWM fSYNC VHWEN 200 0.975 1.25 300 20 1.0 0.5 VIN VIN 0.35 × VIO VIO 400 1.525 mV MHz µs kHz MHz V I2C Compatible Interface Voltage Specifications (SCL, SDIO, VIO) VIO VIL VIH VOL Serial Bus Voltage Level Input Logic Low "0" Input Logic High "1" Output Logic Low "0" 2.7V ≤ VIN ≤ 5.5V(Note 13) 2.7V ≤ VIN ≤ 5.5V, VIO = 3.0V 2.7V ≤ VIN ≤ 5.5V, VIO = 3.0V ILOAD = 3mA V V V mV I2C Compatible Interface Timing Specifications (SCL, SDIO, VIO)(Note 14) 3 www.national.com LM2755 Symbol t1 t2 t3 t4 t5 Parameter SCL (Clock Period) Data In Setup Time to SCL High Data Out stable After SCL Low SDIO Low Setup Time to SCL Low (Start) SDIO High Hold Time After SCL High (Stop) Condition Min 2.5 100 0 100 100 Typ Max Units µs ns ns ns ns 20180905 Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 2: All voltages are with respect to the potential at the GND pin. Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 160°C (typ.) and disengages at TJ = 155°C (typ.). Note 4: For detailed soldering specifications and information, please refer to National Semiconductor Application Note 1112: Micro SMD Wafer Level Chip Scale Package (AN-1112). . Note 5: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. (MIL-STD-883 3015.7) Note 6: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 105°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX). Note 7: Junction-to-ambient thermal resistance is highly dependent on application and board layout. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues in board design. For more information, please refer to National Semiconductor Application Note 1112: Micro SMD Wafer Level Chip Scale Package (AN-1112). Note 8: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm. Note 9: CIN, CPOUT, C1, and C2 : Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics Note 10: For the current sinks on a part, the following are determined: the maximum sink current in the group (MAX), the minimum sink current in the group (MIN), and the average sink current of the group (AVG). Two matching numbers are calculated: (MAX-AVG)/AVG and (AVG-MIN)/AVG. The larger number of the two (worst case) is considered the matching figure. The typical specification provided is the most likely norm of the matching figure for all parts Note 11: The maximum total output current for the LM2755 should be limited to 90mA. The total output current can be split among any of the three banks (ID1 = ID2 = ID3 = 30mA Max.). Under maximum output current conditions, special attention must be given to input voltage and LED forward voltage to ensure proper current regulation. See the Maximum Output Current section of the datasheet for more information. Note 12: For each IDx output pin, headroom voltage is the voltage across the internal current sink connected to that pin. For VHR = VOUT -VDxx. If headroom voltage requirement is not met, LED current regulation will be compromised. Note 13: SCL and SDIO signals are referenced to VIO and GND for minimum VIO voltage testing. Note 14: SCL and SDIO should be glitch-free in order for proper brightness control to be realized. www.national.com 4 LM2755 Typical Performance Characteristics Unless otherwise specified: TA = 25°C; VIN = 3.6V; VHWEN = VIN; VD1 = VD2 = VD3 = 3.6V; RSET = 12.5kΩ; C1=C2= 0.47µF, CIN = CVOUT = 1µF; ENA = ENB = ENC = '1'. LED Drive Efficiency vs Input Voltage Diode Current vs Input Voltage 20180910 20180909 Current Matching vs Input Voltage 3 LEDs Diode Current vs Brightness Code 20180916 20180917 Quiescent Current vs Input Voltage Shutdown Current vs Input Voltage 20180919 20180918 5 www.national.com LM2755 Square Wave Pattern with Delays Triangle Wave Pattern 20180913 20180912 Trapezoid Wave Pattern Slow Ramp-Up / Fast Ramp-Down Wave Pattern 20180911 20180914 Fast Ramp-Up / Slow Ramp-Down Wave Pattern 20180915 www.national.com 6 LM2755 Block Diagram 20180920 Circuit Components CHARGE PUMP The input to the 3/2× - 1x charge pump is connected to the VIN pin, and the regulated output of the charge pump is connected to the VOUT pin. The recommended input voltage range of the LM2755 is 3.0V to 5.5V. The device’s regulated charge pump has both open loop and closed loop modes of operation. When the device is in open loop, the voltage at VOUT is equal to the gain times the voltage at the input. When the device is in closed loop, the voltage at VOUT is regulated to 4.6V (typ.). The charge pump gain transitions are actively selected to maintain regulation based on LED forward voltage and load requirements. This allows the charge pump to stay in the most efficient gain (1x) over as much of the input voltage range as possible, reducing the power consumed from the battery. LED FORWARD VOLTAGE MONITORING The LM2755 has the ability to switch converter gains (1x or 3/2x) based on the forward voltage of the LED load. This ability to switch gains maximizes efficiency for a given load. Forward voltage monitoring occurs on all diode pins. At higher input voltages, the LM2755 will operate in pass mode, allowing the POUT voltage to track the input voltage. As the input voltage drops, the voltage on the Dx pins will also drop (VDX = VPOUT – VLEDx). Once any of the active Dx pins reaches a voltage approximately equal to 350mV, the charge pump will then switch to the gain of 3/2. This switchover ensures that the current through the LEDs never becomes pinched off due to a lack of headroom on the current sources. Only active Dx pins will be monitored. For example, if only D1 is enabled, the LEDs connected to D2 and D3 will not affect the gain transition point. If all Dx pins are enabled, all diodes will be monitored, and the gain transition will be based upon the diode with the highest forward voltage. HWEN PIN The LM2755 has a hardware enable/reset pin (HWEN) that allows the device to be disabled by an external controller without requiring an I2C write command. Under normal operation, the HWEN pin should be held high (logic '1') to prevent an unwanted reset. When the HWEN is driven low (logic '0'), all internal control registers reset to the default states and the part becomes disabled. Please see the Electrical Characteristics section of the datasheet for required voltage thresholds. SYNC PIN The SYNC pin allows the LM2755 to use an external clock to generate the timing within. This allows the LM2755's currentsinks to pulse-width modulate (PWM) and transition at a user controlled frequency. The PWM frequency and the step-time increment can be set by feeding a clock signal into the sync pin and enabling bit '6' in the general purpose register (See the I2C Compatible Interface section for more details.). The maximum frequency allowed to ensure current level accuracy is 1MHz. This external clock is divided down by 32x to create the minimum time-step and PWM frequency. For a 1MHz external clock, the PWM frequency becomes 31.25KHz and the minimum step time becomes 32 µseconds. If not used, it is recommended that the SYNC pin be tied to ground. ADDR PIN The ADDR pin allows the user to chose between two different I2C chip addresses for the LM2755. Tying the ADDR pin high sets the chip address to hex 67 (0x67 or 67h), while tying the ADDR pin low sets the chip address to hex 18(0x18 or 18h). This feature allows multiple LM2755's to be used within a system in addition to providing flexibility in the event another 7 www.national.com LM2755 chip in the system has a chip address similar to the default LM2755 address (0x18). I2C COMPATIBLE INTERFACE DATA VALIDITY The data on SDIO line must be stable during the HIGH period of the clock signal (SCL). In other words, state of the data line can only be changed when CLK is LOW. can generate repeated START conditions. First START and repeated START conditions are equivalent, function-wise. The data on SDIO line must be stable during the HIGH period of the clock signal (SCL). In other words, the state of the data line can only be changed when CLK is LOW. 20180907 FIGURE 2. Start and Stop Conditions TRANSFERING DATA Every byte put on the SDIO line must be eight bits long, with the most significant bit (MSB) being transferred first. Each byte of data has to be followed by an acknowledge bit. The acknowledge related clock pulse is generated by the master. The master releases the SDIO line (HIGH) during the acknowledge clock pulse. The LM2755 pulls down the SDIO line during the 9th clock pulse, signifying an acknowledge. The LM2755 generates an acknowledge after each byte has been received. After the START condition, the I2C master sends a chip address. This address is seven bits long followed by an eighth bit which is a data direction bit (R/W). The LM2755 address is 18h is ADR is tied low and 67h if ADR is tied high . For the eighth bit, a “0” indicates a WRITE and a “1” indicates a READ. The second byte selects the register to which the data will be written. The third byte contains data to write to the selected register. 20180906 FIGURE 1. Data Validity Diagram A pull-up resistor between VIO and SDIO must be greater than [ (VIO-VOL) / 3mA] to meet the VOL requirement on SDIO. Using a larger pull-up resistor results in lower switching current with slower edges, while using a smaller pull-up results in higher switching currents with faster edges. START AND STOP CONDITIONS START and STOP conditions classify the beginning and the end of the I2C session. A START condition is defined as SDIO signal transitioning from HIGH to LOW while SCL line is HIGH. A STOP condition is defined as the SDIO transitioning from LOW to HIGH while SCL is HIGH. The I2C master always generates START and STOP conditions. The I2C bus is considered to be busy after a START condition and free after a STOP condition. During data transmission, the I2C master 20180908 FIGURE 3. Write Cycle w = write (SDIO = "0") r = read (SDIO = "1") ack = acknowledge (SDIO pulled down by either master or slave) rs = repeated start id = chip address, 18h if ADR = '0' or 67h if ADR = '1' for LM2755 I2C COMPATIBLE CHIP ADDRESS The chip address for LM2755 is 0011000 (0x18) when ADR = '0' or 1100111(0x67) when ADR = '1'. www.national.com 8 LM2755 Dimming Waveform 20180903 FIGURE 4. INTERNAL REGISTERS OF LM2755 Register Name General Purpose Time Step D1 High Level D1 Low Level D1 Delay: tdelay D1 Ramp-Up Step Time: trise D1 Time High: thigh D1 Ramp-Down Step Time: tfall D1 Timing: tlow D2 High Level D2 Low Level D2 Delay: tdelay D2 Ramp-Up Step Time: trise D2 Time High: thigh D2 Ramp-Down Step Time: tfall D2 Timing: tlow D3 High Level D3 Low Level D3 Delay: tdelay D3 Ramp-Up Step Time: trise D3 Time High: thigh D3 Ramp-Down Step Time: tfall D3 Timing: tlow Internal Hex Address x10 x20 xA9 xA8 xA1 xA5 xA3 xA4 xA2 xB9 xB8 xB1 xB5 xB3 xB4 xB2 xC9 xC8 xC1 xC5 xC3 xC4 xC2 Power On Value 0000 0000 1000 1000 1110 0000 1110 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 1110 0000 1110 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 1110 0000 1110 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 General Purpose Register Description • Bit 0: enable output D1 with high current level. • Bit 1: enable output D2 with high current level. • Bit 2: enable output D3 with high current level. • Bit 3: enable dimming waveform on output D1. • Bit 4: enable dimming waveform on output D2. • Bit 5: enable dimming waveform on output D3. • Bit 6: enable external clock. '1' = External Clock Sync, '0' = Internal Clock Used • Bit 7: If Bit 7 = 0 the charge pump is powered on before any dimming waveform is enabled. If Bit7 = 1 the dimming waveform can be enabled before charge pump is powered on. 9 www.national.com LM2755 Application Information SETTING FULL-SCALE LED CURRENT The current through the LEDs connected to D1, D2 and D3 can be set to a desired level simply by connecting an appropriately sized resistor (RSET) between the ISET pin of the LM2755 and GND. The LED currents are proportional to the current that flows through the ISET pin and are a factor of 200 times greater than the ISET currents. The feedback loop of the internal amplifier sets the voltage of the ISET pin to 1.25V (typ.). The statement above is simplified in the equation below: IDx (Full-Scale) = 200 × (VISET / RSET) Please refer to the I2C Compatible Interface section of this datasheet for detailed instructions on how to adjust the brightness control registers. BRIGHTNESS LEVEL CONTROL Once the desired RSET value has been chosen, the LM2755 has the ability to internally dim the LEDs by modulating the currents with an internally set 20kHz PWM signal. The PWM duty cycle percentage is independently set for each LED through the I2C compatible interface. The 32 brightness levels follow a exponentially increasing pattern rather than a linearly increasing one in order to better match the human eyes response to changing brightness. The brightness level response is modeled in the following equations.: IDx LOW = (0.9)(31-nLOW) × IDx Fullscale IDx HIGH = (0.9)(31-nHIGH) × IDx Fullscale nHIGH and nLOW are numbers between 0 and 31 stored in the brightness level registers. When the waveform enable bits are set to '1', nHIGH and nLOW are the brightness level boundries. These equations apply to all Dx outputs and their corresponding registers. A '0' code in the brightness control register sets the current to an "off-state" (0mA). TIME STEP CONTROL Bit 0-Bit 2: The value of the 3 bits is equal to N, which is used in the timing control equations. 0 ≤ N ≤ 7. The minimum internal time step (N=0) is 50µs. Setting the time-step to N=7 results in a minimum time step of 400µsec. Time step = 50µsec × (N+1) Bit 3-Bit 7: Not used DELAY CONTROL The LM2755 allows the programmed current waveform on each diode pin to independantly start with a delay upon enabling the waveform dimming bits in the general purpose register. There are 256 delay levels available. The delay time is set by the following equation: tdelay = N × ndelay ndelay is stored in the Dx delay registers and N is stored in the Time Step Control register. By default, ndelay =0 with a range of 0 ≤ ndelay ≤255. TIMING CONTROL TPWM INTERNAL =50µs, N is a value stored in the Time Step register, and nTrise nTfall, nThigh, nTlow are numbers between 0 and 255, stored in the timing control registers. The durations of the rise, high, fall and low times are given by: trise/fall Total = tPWM INTERNAL × 2N x (nhigh-nlow) x nTrise/fall where 0 ≤ nTrise/fall ≤ 255 trise or fall Total = 50µs x (nhigh-nlow) when nTrise/fall = 0 www.national.com 10 thigh or low = tPWM INTERNAL × 2N × (nhigh/low + 1) where 0 ≤ nThigh/low ≤ 255 SYNC PIN TIMING CONTROL It is possible to replace the internal clock with an external one placed on the external SYNC pin. Writing a '1' to bit6 in the general purpose register switches the system clock from being internally generated to externally generated. The period of the PWM modulating signal becomes: tPWM = tSYNC / 32 The maximum recommended SYNC frequency is 1MHz. This frequency yields a PWM frequency of 31.25KHz and the minimum step time of 32 µsec. MAXIMUM OUTPUT CURRENT, MAXIMUM LED VOLTAGE, MINIMUM INPUT VOLTAGE The LM2755 can drive 8 LEDs at 22.5mA each (GroupA , GroupB, GroupC) from an input voltage as low as 3.2V, so long as the LEDs have a forward voltage of 3.6V or less (room temperature). The statement above is a simple example of the LED drive capability of the LM2755. The statement contains the key application parameters that are required to validate an LEDdrive design using the LM2755: LED current (ILEDx), number of active LEDs (Nx), LED forward voltage (VLED), and minimum input voltage (VIN-MIN). The equation below can be used to estimate the maximum output current capability of the LM2755: ILED_MAX = [(1.5 x VIN) - VLED - (IADDITIONAL × ROUT)] ÷ [(Nx x ROUT) + kHRx] (eq. 1) ILED_MAX = [(1.5 x VIN ) - VLED - (IADDITIONAL × 2.4Ω)] ÷ [(Nx x 2.4Ω) + kHRx] IADDITIONAL is the additional current that could be delivered to the other LED Groups. ROUT – Output resistance. This parameter models the internal losses of the charge pump that result in voltage droop at the pump output VOUT. Since the magnitude of the voltage droop is proportional to the total output current of the charge pump, the loss parameter is modeled as a resistance. The output resistance of the LM2755 is typically 2.4Ω (VIN = 3.6V, TA = 25°C). In equation form: VVOUT = (1.5 × VIN) – [( ILED1 + ILED2 + ILED3) × ROUT] 2) (eq. kHR – Headroom constant. This parameter models the minimum voltage required to be present across the current sinks for them to regulate properly. This minimum voltage is proportional to the programmed LED current, so the constant has units of mV/mA. The typical kHR of the LM2755 is 3.25mV/mA. In equation form: (VVOUT – VLEDx) > kHRx × ILEDx (eq. 3) Typical Headroom Constant Values kHR1 = kHR2 = kHR3 = 10 mV/mA The "ILED-MAX" equation (eq. 1) is obtained from combining the ROUT equation (eq. 2) with the kHRx equation (eq. 3) and solving for ILEDx. Maximum LED current is highly dependent on minimum input voltage and LED forward voltage. Output current capability can be increased by raising the minimum input voltage of the application, or by selecting an LED with a lower forward voltage. Excessive power dissipation may also limit output current capability of an application. LM2755 Total Output Current Capability The maximum output current that can be drawn from the LM2755 is 90mA. Each driver Group has a maximum allotted current per Dx sink that must not be exceeded. DRIVER TYPE Dx MAXIMUM Dx CURRENT 30mA per Dx Pin TJ = TA + (PDISS x θJA) The junction temperature rating takes precedence over the ambient temperature rating. The LM2755 may be operated outside the ambient temperature rating, so long as the junction temperature of the device does not exceed the maximum operating rating of 105°C. The maximum ambient temperature rating must be derated in applications where high power dissipation and/or poor thermal resistance causes the junction temperature to exceed 105°C. THERMAL PROTECTION Internal thermal protection circuitry disables the LM2755 when the junction temperature exceeds 160°C (typ.). This feature protects the device from being damaged by high die temperatures that might otherwise result from excessive power dissipation. The device will recover and operate normally when the junction temperature falls below 155°C (typ.). It is important that the board layout provide good thermal conduction to keep the junction temperature within the specified operating ratings. CAPACITOR SELECTION The LM2755 requires 4 external capacitors for proper operation (CIN = COUT = 1µF, C1 = C2 = 0.47µF). Surface-mount multi-layer ceramic capacitors are recommended. These capacitors are small, inexpensive and have very low equivalent series resistance (ESR