LM27966

LM27966 White LED Driver with I2C Compatible Brightness Control August 2006 LM27966 White LED Driver with I2C Compatible Interface General Description The LM27966 is a highly integrated charge-pump-based display LED driver. The device can drive up to 6 LEDs in parallel with a total output current of 180mA. Regulated internal current sources deliver excellent current and brightness matching in all LEDs. The LED driver current sources are split into two independently controlled groups. The primary group, which can be configured with 4 or 5 LEDs, can be used to backlight the main phone display. An additional, independently controlled led driver is provided for driving an indicator or other general purpose LED function. The LM27966 has an I2C compatible interface that allows the user to independently control the brightness on each bank of LEDs. The device provides excellent efficiency without the use of an inductor by operating the charge pump in a gain of 3/2, or in Pass-Mode. The proper gain for maintaining current regulation is chosen, based on LED forward voltage, so that efficiency is maximized over the input voltage range. The LM27966 is available in National’s small 24-pin Leadless Leadframe Package (LLP-24). Features n n n n n n n n n n n 91% Peak LED Drive Efficiency No Inductor Required 0.3% Current Matching Drives 6 LEDs with up to 30mA per LED 180mA of total driver current I2C Compatible Brightness Control Interface Adaptive 1x- 3/2x Charge Pump Resistor-Programmable Current Settings External Chip RESET Pin (RESET) Extended Li-Ion Input: 2.7V to 5.5V Small low profile industry standard leadless package, LLP 24 : (4mm x 4mm x 0.8mm) Applications n Mobile Phone Display Lighting n PDAs Backlighting n General LED Lighting Typical Application Circuit 20190101 © 2006 National Semiconductor Corporation DS201901 www.national.com LM27966 Connection Diagram 24 Pin Quad LLP Package NS Package Number SQA24A 20190102 Pin Descriptions Pin #s 24 23 19, 22 (C1) 20, 21 (C2) 12, 13, 14, 15, 16 3 17 Pin Names VIN POUT C1, C2 D5, D4, D3, D2, D1 DAUX ISET Charge Pump Output Voltage Flying Capacitor Connections LED Drivers - Main Display LED Driver - Indicator LED Placing a resistor (RSET) between this pin and GND sets the full-scale LED current for Dx , and DAUX LEDs. LED Current = 200 x (1.25V ÷ RSET) Serial Clock Pin Serial Data Input/Output Pin Serial Bus Voltage Level Pin Harware Reset Pin. High = Normal Operation, Low = RESET Ground No Connect Pin Descriptions Input voltage. Input range: 2.7V to 5.5V. 1 2 7 10 9, 18, DAP 4, 5, 6, 8, 11 SCL SDIO VIO RESET GND NC Ordering Information Order Information LM27966SQ LM27966SQX Package SQA24 LLP Supplied As 1000 Units, Tape & Reel 4500 Units, Tape & Reel www.national.com 2 LM27966 Absolute Maximum Ratings (Notes 1, 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN pin voltage SCL, SDIO, VIO, RESET pin voltages IDx Pin Voltages -0.3V to 6.0V -0.3V to (VIN+0.3V) w/ 6.0V max -0.3V to (VPOUT+0.3V) w/ 6.0V max Internally Limited 150oC -65oC to +150o C (Note 4) Operating Rating Input Voltage Range LED Voltage Range (Notes 1, 2) 2.7V to 5.5V 2.0V to 4.0V -30˚C to +100˚C -30˚C to +85˚C Junction Temperature (TJ) Range Ambient Temperature (TA) Range(Note 6) Thermal Properties Juntion-to-Ambient Thermal Resistance (θJA), SQA24A Package (Note 7) 41.3˚C/W Continuous Power Dissipation (Note 3) Junction Temperature (TJ-MAX) Storage Temperature Range Maximum Lead Temperature (Soldering) ESD Rating(Note 5) Human Body Model 2.0kV (Notes 2, 8) ESD Caution Notice National Semiconductor recommends that all integrated circuits be handled with appropriate ESD precautions. Failure to observe proper ESD handling techniques can result in damage to the device. Electrical Characteristics Limits in standard typeface are for TJ = 25˚C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = 3.6V; VRESET = VIN; VIO = 1.8V VDx = 0.4V; VDAUX = 0.4V; RSET = 16.9kΩ; Dx = DAUX = Fullscale Current; EN-MAIN, EN-D5 Bits = “1”; C1=C2=1.0µF, CIN=COUT=1.0µF; Specifications related to output current(s) and current setting pins (IDx and ISET) apply to Main Display and Auxiliary LED. (Note 9) Symbol Parameter Output Current Regulation Main Display or Auxiliary LED Enabled IDx Maximum Output Current Regulation Main Display and Auxiliary LED Enabled (Note 10) LED Current Matching Open-Loop Charge Pump Output Resistance VDx 1x to 3/2x Gain Transition Threshold Current Source Headroom Voltage Requirement (Note 12) Quiescent Supply Current Shutdown Supply Current ISET Pin Voltage Output Current to Current Set Ratio Main Display, DAUX Switching Frequency Start-up Time Internal Diode Current PWM Frequency POUT = 90% steady state 0.89 Condition 3.0V ≤ VIN ≤ 5.5V EN-AUX= ’0’ 3.0V ≤ VIN ≤ 5.5V EN-AUX = ’1’ and EN-MAIN = EN-D5 = ’0’ 3.2V ≤ VIN ≤ 5.5V RSET = 8.33kΩ VLED = 3.6V EN-MAIN = EN-D5 = EN-AUX = “1” (Note 11) Gain = 3/2 Gain = 1 VDx Falling RSET = 16.9kΩ IDxx = 95% xIDxx (nom.) (IDxx (nom) ≈ 15mA) Gain = 3/2 EN-MAIN = EN-D5 and/or EN-AUX= "1" Gain = 1.5x, No Load All EN-x bits = "0" 2.7V ≤ VIN ≤ 5.5V Min 18.2 (-9.5%) 19.2 (-7.7%) Typ 20.1 20.8 30 Dx mA 30 DAUX 0.3 2.75 1 175 1.7 % Ω mV Max 22.0 (+9.5%) 22.4 (+7.7%) Units mA (%) mA (%) IDx-MATCH ROUT VDxTH VHR 110 mV IQ ISD VSET IDx/ ISET fSW tSTART fPWM 2.90 3.4 1.25 200 1.27 250 20 3.32 5.4 mA µA V 1.57 MHz µs kHz 3 www.national.com LM27966 Electrical Characteristics (Notes 2, 8) (Continued) Limits in standard typeface are for TJ = 25˚C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = 3.6V; VRESET = VIN; VIO = 1.8V VDx = 0.4V; VDAUX = 0.4V; RSET = 16.9kΩ; Dx = DAUX = Fullscale Current; EN-MAIN, EN-D5 Bits = “1”; C1=C2=1.0µF, CIN=COUT=1.0µF; Specifications related to output current(s) and current setting pins (IDx and ISET) apply to Main Display and Auxiliary LED. (Note 9) Symbol VRESET Parameter Reset Voltage Thresholds Condition 2.7V ≤ VIN ≤ 5.5V Reset Normal Operation I2C Compatible Interface Voltage Specifications (SCL, SDIO, VIO) VIO VIL VIH VOL t1 t2 t3 t4 t5 Serial Bus Voltage Level Input Logic Low "0" Input Logic High "1" Output Logic Low "0" SCL (Clock Period) Data In Setup Time to SCL High Data Out stable After SCL Low SDIO Low Setup Time to SCL Low (Start) SDIO High Hold Time After SCL High (Stop) 2.7V ≤ VIN ≤ 5.5V(Note 13) 2.7V ≤ VIN ≤ 5.5V, VIO = 3.0V 2.7V ≤ VIN ≤ 5.5V, VIO = 3.0V ILOAD = 3mA 2.5 100 0 100 100 1.4 0 0.7 x VIO VIN 0.3 x VIO VIO 400 V V V mV µs ns ns ns ns Min 0 1.2 Typ Max 0.45 VIN V Units I2C Compatible Interface Timing Specifications (SCL, SDIO, VIO)(Note 14) 20190113 Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 2: All voltages are with respect to the potential at the GND pin. Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 170˚C (typ.) and disengages at TJ = 165˚C (typ.). Note 4: For detailed soldering specifications and information, please refer to National Semiconductor Application Note 1187: Leadless Leadframe Package (AN-1187). Note 5: The human body model is a 100pF capacitor discharged through 1.5kΩ resistor into each pin. (MIL-STD-883 3015.7) Note 6: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 100˚C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA x PD-MAX). Note 7: Junction-to-ambient thermal resistance is highly dependent on application and board layout. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues in board design. For more information, please refer to National Semiconductor Application Note 1187: Leadless Leadframe Package (AN-1187). Note 8: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm. Note 9: CIN, CPOUT, C1, and C2 : Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics www.national.com 4 LM27966 Electrical Characteristics (Notes 2, 8) (Continued) Note 10: The maximum total output current for the LM27966 should be limited to 180mA. The total output current can be split among any of the three banks (IDxA = IDxC = 30mA Max.). Under maximum output current conditions, special attention must be given to input voltage and LED forward voltage to ensure proper current regulation. See the Maximum Output Current section of the datasheet for more information. Note 11: For the Main Display group of outputs on a part, the following are determined: the maximum output current in the group (MAX), the minimum output current in the group (MIN), and the average output current of the group (AVG). Two matching numbers are calculated: (MAX-AVG)/AVG and (AVG-MIN)/AVG. The largest number of the two (worst case) is considered the matching figure for the bank. The typical specification provided is the most likely norm of the matching figure for all parts. Note 12: For each IDxx output pin, headroom voltage is the voltage across the internal current sink connected to that pin. For Main and Aux outputs, VHR = VOUT -VLED. If headroom voltage requirement is not met, LED current regulation will be compromised. Note 13: SCL and SDIO signals are referenced to VIO and GND for minimum VIO voltage testing. Note 14: SCL and SDIO should be glitch-free in order for proper brightness control to be realized. 5 www.national.com LM27966 Block Diagram 20190103 www.national.com 6 LM27966 Typical Performance Characteristics LED Drive Efficiency vs Input Voltage Unless otherwise specified: TA = 25˚C; VIN = 3.6V; VRESET = VIN; VLEDx = VLEDAUX = 3.6V; RSET = 16.9kΩ; C1=C2= CIN = CPOUT = 1µF; EN = EN5 = ’1’. Input Current vs Input Voltage 20190119 20190118 Main Bank Current Regulation vs Input Voltage DAUX Current Regulation vs Input Voltage 20190116 20190115 Main Bank Current Matching vs Input Voltage Main Bank Diode Current vs Brightness Register Code 20190116 20190117 7 www.national.com LM27966 Circuit Description OVERVIEW The LM27966 is a white LED driver system based upon an adaptive 1.5x/1x CMOS charge pump capable of supplying up to 180mA of total output current. With two controlled banks of constant current sinks (Main and AUX), the LM27966 is an ideal solution for platforms requiring a single white LED driver for main display and indicator lighting. The tightly matched current sinks ensure uniform brightness from the LEDs across the entire small-format display. Each LED is configured in a common anode configuration, with the peak drive current being programmed through the use of an external RSET resistor. An I2C compatible interface is used to enable the device and vary the brightness within the individual current sink banks. For Main Display LEDs, 32 levels of brightness control are available. The brightness control is achieved through a mix of analog and pulse width modulated (PWM) methods. DAUX has 4 analog brightness levels available. CIRCUIT COMPONENTS Charge Pump The input to the 1.5x/1x charge pump is connected to the VIN pin, and the regulated output of the charge pump is connected to the VOUT pin. The recommended input voltage range of the LM27966 is 3.0V to 5.5V. The device’s regulated charge pump has both open loop and closed loop modes of operation. When the device is in open loop, the voltage at VOUT is equal to the gain times the voltage at the input. When the device is in closed loop, the voltage at VOUT is regulated to 4.6V (typ.). The charge pump gain transitions are actively selected to maintain regulation based on LED forward voltage and load requirements. This allows the charge pump to stay in the most efficient gain (1x) over as much of the input voltage range as possible, reducing the power consumed from the battery. LED Forward Voltage Monitoring The LM27966 has the ability to switch converter gains (1x or 1.5x) based on the forward voltage of the LED load. This ability to switch gains maximizes efficiency for a given load. Forward voltage monitoring occurs on all diode pins within Main Display. At higher input voltages, the LM27966 will operate in pass mode, allowing the POUT voltage to track the input voltage. As the input voltage drops, the voltage on the DX pins will also drop (VDX = VPOUT – VLEDx). Once any of the active Dx pins reaches a voltage approximately equal to 175mV, the charge pump will then switch to the gain of 1.5x. This switchover ensures that the current through the LEDs never becomes pinched off due to a lack of headroom on the current sources. Diode pin D5 can have the diode sensing circuity disabled through the general purpose register if D5 is not going to be used. DAUX is not a monitored LED current sink. RESET Pin The LM27965 has a hardware reset pin (RESET) that allows the device to be disabled by an external controller without requiring an I2C write command. Under normal operation, the RESET pin should be held high (logic ’1’) to prevent an unwanted reset. When the RESET is driven low (logic ’0’), all internal control registers reset to the default states and the part becomes disabled. Please see the Electrical Characteristics section of the datasheet for required voltage thresholds. I2C Compatible Interface DATA VALIDITY The data on SDIO line must be stable during the HIGH period of the clock signal (SCL). In other words, state of the data line can only be changed when CLK is LOW. 20190125 FIGURE 1. Data Validity Diagram A pull-up resistor between VIO and SDIO must be greater than [ (VIO-VOL) / 3mA] to meet the VOL requirement on SDIO. Using a larger pull-up resistor results in lower switching current with slower edges, while using a smaller pull-up results in higher switching currents with faster edges. START AND STOP CONDITIONS START and STOP conditions classify the beginning and the end of the I2C session. A START condition is defined as SDIO signal transitioning from HIGH to LOW while SCL line is HIGH. A STOP condition is defined as the SDIO transitioning from LOW to HIGH while SCL is HIGH. The I2C master always generates START and STOP conditions. The I2C bus is considered to be busy after a START condition and free after a STOP condition. During data transmission, the I2C master can generate repeated START conditions. First START and repeated START conditions are equivalent, function-wise. The data on SDIO line must be stable during the HIGH period of the clock signal (SCL). In other words, the state of the data line can only be changed when CLK is LOW. 20190111 FIGURE 2. Start and Stop Conditions TRANSFERING DATA Every byte put on the SDIO line must be eight bits long, with the most significant bit (MSB) being transferred first. Each byte of data has to be followed by an acknowledge bit. The acknowledge related clock pulse is generated by the master. The master releases the SDIO line (HIGH) during the acknowledge clock pulse. The LM27966 pulls down the SDIO www.national.com 8 LM27966 Circuit Description (Continued) line during the 9th clock pulse, signifying an acknowledge. The LM27966 generates an acknowledge after each byte has been received. After the START condition, the I2C master sends a chip address. This address is seven bits long followed by an eighth bit which is a data direction bit (R/W). The LM27966 address is 36h. For the eighth bit, a “0” indicates a WRITE and a “1” indicates a READ. The second byte selects the register to which the data will be written. The third byte contains data to write to the selected register. 20190112 FIGURE 3. Write Cycle w = write (SDIO = "0") r = read (SDIO = "1") ack = acknowledge (SDIO pulled down by either master or slave) rs = repeated start id = chip address, 36h for LM27966 I2C COMPATIBLE CHIP ADDRESS The chip address for LM27966 is 0110110, or 36h. 20190108 FIGURE 5. General Purpose Register Description Internal Hex Address: 10h 20190109 Note: EN-MAIN: Enables Dx LED drivers (Main Display) T0: Must be set to ’0’ EN-AUX: Enables DAUX LED driver (Indicator Lighting) EN-D5: Enables D5 LED voltage sense T1: Must be set to ’0’ FIGURE 4. Chip Address INTERNAL REGISTERS OF LM27966 Internal Hex Address 10h Power On Value 0010 0000 1110 0000 Register General Purpose Register Main Display A0h Brightness Control Register Auxiliary LED C0h Brightness Control Register 20190105 1111 1100 20190107 FIGURE 6. Brightness Control Register Description Internal Hex Address: 0xA0 (Main Display), 0xC0 (DAUX) Note: Dx4-Dx0: Sets Brightness for Dx pins (Main Display). 11111=Fullscale 9 www.national.com LM27966 Circuit Description Bit7 to Bit 5: Not Used (Continued) Bit7 to Bit2:Not Used Full-Scale Current set externally by the following equation: IDx = 200 x 1.25V / RSET DAUX1-DAUX0: Sets Brightness for DAUX pin. 11 = Fullscale Brightness Level Control Table (Main Display) Brightness Code (hex) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F Analog Current (% of Full-Scale) 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 40 40 40 40 40 40 40 70 70 70 70 70 70 100 100 100 Duty Cycle (%) 1/16 2/16 3/16 4/16 5/16 6/16 7/16 8/16 9/16 10/16 11/16 12/16 13/16 14/16 15/16 16/16 10/16 11/16 12/16 13/16 14/16 15/16 16/16 11/16 12/16 13/16 14/16 15/16 16/16 13/16 15/16 16/16 Perceived Brightness Level (%) 1.25 2.5 3.75 5 6.25 7.5 8.75 10 11.25 12.5 13.75 15 16.25 17.5 18.75 20 25 27.5 30 32.5 35 37.5 40 48.125 52.5 56.875 61.25 65.625 70 81.25 93.75 100 DAUX Brightness Levels (%of Full-Scale) = 20%, 40%, 70%, 100% Application Information SETTING LED CURRENT The current through the LEDs connected to Dx can be set to a desired level simply by connecting an appropriately sized resistor (RSET) between the ISET pin of the LM27966 and GND. The Dx currents are proportional to the current that flows out of the ISET pin and are a factor of 200 times greater than the ISET current. The feedback loops of the internal amplifiers set the voltage of the ISET pin to 1.25V (typ.). The statements above are simplified in the equations below: IDx= 200 x (VISET / RSET) RSET = 200 x (1.25V / IDx) Once the desired RSET value has been chosen, the LM27966 has the ability to internally dim the LEDs using a mix of Pulse Width Modulation (PWM) and analog current scaling. The PWM duty cycle is set through the I2C compatible interface. LEDs connected to Main Display current sinks (Dx) can be dimmed to 32 different levels/duty-cycles. The internal PWM frequency for Main Display is a fixed 20kHz. DAUX has 4 analog current levels. Please refer to the I2C Compatible Interface section of this datasheet for detailed instructions on how to adjust the brightness control registers. www.national.com 10 LM27966 Application Information (Continued) MAXIMUM OUTPUT CURRENT, MAXIMUM LED VOLTAGE, MINIMUM INPUT VOLTAGE The LM27966 can drive 6 LEDs at 30mA each (Main Display and DAUX) from an input voltage as low as 3.2V, so long as the LEDs have a forward voltage of 3.6V or less (room temperature). The statement above is a simple example of the LED drive capabilities of the LM27966. The statement contains the key application parameters that are required to validate an LEDdrive design using the LM27966: LED current (ILEDx), number of active LEDs (Nx), LED forward voltage (VLED), and minimum input voltage (VIN-MIN). The equation below can be used to estimate the maximum output current capability of the LM27966: ILED_MAX = [(1.5 x VIN) - VLED - (IDAUX x ROUT)] / [(NMAIN x ROUT) + kHR] (eq. 1) ILED_MAX = [(1.5 x VIN ) - VLED - (IDAUX x 2.75Ω)] / [(NMAIN x 2.75Ω) + kHR] IDAUX is the additional current that could be delivered to the AUX LED. ROUT – Output resistance. This parameter models the internal losses of the charge pump that result in voltage droop at the pump output POUT. Since the magnitude of the voltage droop is proportional to the total output current of the charge pump, the loss parameter is modeled as a resistance. The output resistance of the LM27966 is typically 2.75Ω (VIN = 3.6V, TA = 25˚C). In equation form: (eq. VPOUT = (1.5 x VIN) – [NMAINx ILED-MAIN x ROUT] 2) kHR – Headroom constant. This parameter models the minimum voltage required to be present across the current sources for them to regulate properly. This minimum voltage is proportional to the programmed LED current, so the constant has units of mV/mA. The typical kHR of the LM27966 is 8mV/mA. In equation form: (eq. 3) (VPOUT – VLEDx) > kHR x ILEDx Typical Headroom Constant Value kHR = 8mV/mA The "ILED-MAX" equation (eq. 1) is obtained from combining the ROUT equation (eq. 2) with the kHR equation (eq. 3) and solving for ILEDx. Maximum LED current is highly dependent on minimum input voltage and LED forward voltage. Output current capability can be increased by raising the minimum input voltage of the application, or by selecting an LED with a lower forward voltage. Excessive power dissipation may also limit output current capability of an application. Total Output Current Capability The maximum output current that can be drawn from the LM27966 is 180mA. Each driver bank has a maximum allotted current per Dx sink that must not be exceeded. MAXIMUM Dx CURRENT 30mA The 180mA load can be distributed in many different configurations. Special care must be taken when running the LM27966 at the maximum output current to ensure proper functionality. PARALLEL CONNECTED AND UNUSED OUTPUTS Outputs D1-5 may be connected together to drive one or two LEDs at higher currents. In such a configuration, all five parallel current sinks (Main Display) of equal value can drive a single LED. The LED current programmed for Main Display should be chosen so that the current through each of the outputs is programmed to 20% of the total desired LED current. For example, if 60mA is the desired drive current for a single LED, RSET should be selected such that the current through each of the current sink inputs is 12mA. Connecting the outputs in parallel does not affect internal operation of the LM27966 and has no impact on the Electrical Characteristics and limits previously presented. The available diode output current, maximum diode voltage, and all other specifications provided in the Electrical Characteristics table apply to this parallel output configuration, just as they do to the standard 5-LED application circuit. Main Display utilizes LED forward voltage sensing circuitry on each Dxx pin to optimize the charge-pump gain for maximum efficiency. Due to the nature of the sensing circuitry, it is not recommended to leave any of the Dx (D1-D4) pins unused if either diode bank is going to be used during normal operation. Leaving Dx pins unconnected will force the charge-pump into 1.5x mode over the entire VIN range negating any efficiency gain that could be achieve by switching to 1x mode at higher input voltages. If D5 is not used, it is recommended that the driver pin be grounded and the general purpose register bit EN-D5 be set to 0 to ensure proper gain transitions. Care must be taken when selecting the proper RSET value. The current on any Dx pin must not exceed the maximum current rating for any given current sink pin. POWER EFFICIENCY The efficiency of LED drivers is commonly taken to be the ratio of power consumed by the LEDs (PLED) to the power drawn at the input of the part (PIN). With a 1.5x/1x charge pump, the input current is equal to the charge pump gain times the output current (total LED current). The efficiency of the LM27966 can be predicted as follows: PLEDTOTAL = (VLED-MAIN x NMAIN x ILED-MAIN) + (VLED-AUX x ILED-AUX) PIN = VIN x IIN PIN = VIN x (GAIN x ILEDTOTAL + IQ) E = (PLEDTOTAL ÷ PIN) It is also worth noting that efficiency as defined here is in part dependent on LED voltage. Variation in LED voltage does not affect power consumed by the circuit and typically does not relate to the brightness of the LED. For an advanced analysis, it is recommended that power consumed by the circuit (VIN x IIN) be evaluated rather than power efficiency. POWER DISSIPATION The power dissipation (PDISS) and junction temperature (TJ) can be approximated with the equations below. PIN is the power generated by the 1.5x/1x charge pump, PLED is the power consumed by the LEDs, TA is the ambient temperature, and θJA is the junction-to-ambient thermal resistance for the LLP-24 package. VIN is the input voltage to the LM27966, VLED is the nominal LED forward voltage, N is the number of LEDs and ILED is the programmed LED current. PDISS = PIN - PLEDA PDISS= (GAIN x VIN x ILEDA ) - (VLEDA x NA x ILEDA) (VLED x IDAUX) 11 www.national.com LM27966 Application Information TJ = TA + (PDISS x θJA) (Continued) The junction temperature rating takes precedence over the ambient temperature rating. The LM27966 may be operated outside the ambient temperature rating, so long as the junction temperature of the device does not exceed the maximum operating rating of 100˚C. The maximum ambient temperature rating must be derated in applications where high power dissipation and/or poor thermal resistance causes the junction temperature to exceed 100˚C. THERMAL PROTECTION Internal thermal protection circuitry disables the LM27966 when the junction temperature exceeds 170˚C (typ.). This feature protects the device from being damaged by high die temperatures that might otherwise result from excessive power dissipation. The device will recover and operate normally when the junction temperature falls below 165˚C (typ.). It is important that the board layout provide good thermal conduction to keep the junction temperature within the specified operating ratings. CAPACITOR SELECTION The LM27966 requires 4 external capacitors for proper operation (C1 = C2 = 1µF, CIN = COUT = 1µF). Surface-mount multi-layer ceramic capacitors are recommended. These capacitors are small, inexpensive and have very low equivalent series resistance (ESR < 20mΩ typ.). Tantalum capacitors, OS-CON capacitors, and aluminum electrolytic capacitors are not recommended for use with the LM27966 due to their high ESR, as compared to ceramic capacitors. For most applications, ceramic capacitors with X7R or X5R temperature characteristic are preferred for use with the LM27966. These capacitors have tight capacitance tolerance (as good as ± 10%) and hold their value over temperature (X7R: ± 15% over -55˚C to 125˚C; X5R: ± 15% over -55˚C to 85˚C). Capacitors with Y5V or Z5U temperature characteristic are generally not recommended for use with the LM27966. Capacitors with these temperature characteristics typically have wide capacitance tolerance (+80%, -20%) and vary significantly over temperature (Y5V: +22%, -82% over -30˚C to +85˚C range; Z5U: +22%, -56% over +10˚C to +85˚C range). Under some conditions, a nominal 1µF Y5V or Z5U capacitor could have a capacitance of only 0.1µF. Such detrimental deviation is likely to cause Y5V and Z5U capacitors to fail to meet the minimum capacitance requirements of the LM27966. The minimum voltage rating acceptable for all capacitors is 6.3V. The recommended voltage rating for the input and output capacitors is 10V to account for DC bias capacitance losses. PCB LAYOUT CONSIDERATIONS The LLP is a leadframe based Chip Scale Package (CSP) with very good thermal properties. This package has an exposed DAP (die attach pad) at the center of the package measuring 2.6mm x 2.5mm. The main advantage of this exposed DAP is to offer lower thermal resistance when it is soldered to the thermal land on the PCB. For PCB layout, National highly recommends a 1:1 ratio between the package and the PCB thermal land. To further enhance thermal conductivity, the PCB thermal land may include vias to a ground plane. For more detailed instructions on mounting LLP packages, please refer to National Semiconductor Application Note AN-1187. www.national.com 12 LM27966 White LED Driver with I2C Compatible Brightness Control Physical Dimensions inches (millimeters) unless otherwise noted SQA24: 24 Lead LLP X1 = 4.0mm X2 = 4.0mm X3 = 0.8mm National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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