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LM3206TLX

LM3206TLX

  • 厂商:

    NSC

  • 封装:

  • 描述:

    LM3206TLX - 650mA Miniature, Step-Down DC-DC Converter for Portable Applications - National Semicond...

  • 数据手册
  • 价格&库存
LM3206TLX 数据手册
LM3206 650mA Miniature, Step-Down DC-DC Converter for Portable Applications October 2006 LM3206 650mA Miniature, Step-Down DC-DC Converter for Portable Applications General Description The LM3206 is a DC-DC converter optimized for powering portable applications from a single Lithium-Ion cell, however they may be used in many other applications. It steps down an input voltage from 3.25V to 5.5V to a fixed output voltage of 3.09V. The LM3206 offers superior performance for mobile phones and other applications requiring low dropout voltage. Fixedfrequency PWM operation minimizes RF interference. The Shutdown function turns the device off and reduces battery consumption to 0.01 µA (typ.). The LM3206 is available in an 8-pin lead free micro SMD package. A high switching frequency (2 MHz) allows use of tiny surface-mount components. Only three small external surface-mount components, an inductor and two ceramic capacitors are required. Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 2 MHz (typ.) PWM Switching Frequency Operates from a single Li-Ion cell Fixed Output Voltage (3.09V) 650mA Maximum load capability High Efficiency (96% Typ at 3.6VIN, 3.09VOUT at 400mA) from internal synchronous rectification 8-pin micro SMD Package Current Overload Protection Thermal Overload Protection Soft Start function Low Dropout Voltage (140 mΩ Typ PFET) Applications ■ ■ ■ ■ ■ Cellular Phones Hand-Held Radios RF PC Cards Battery Powered RF Devices RFIC Chipsets Typical Application 20198901 FIGURE 1. LM3206 Typical Application © 2007 National Semiconductor Corporation 201989 www.national.com LM3206 Connection Diagrams 20198999 8–Bump Thin Micro SMD Package, Large Bump NS Package Number TLA08HPA Order Information Order Number LM3206TL LM3206TLX Package Marking (Note) XTS/29 XTS/29 Supplied As 250 units, Tape-and-Reel 3000 units, Tape-and-Reel Note: The actual physical placement of the package marking will vary from part to part. The package marking “X” designates the date code. “T” is a NSC internal code for die traceability. “S” designates the device type as switcher device. Both will vary considerably. “29” identifies the device (part number, option, etc.). Call National Semiconductor for detailed ordering information. Pin Descriptions Pin # A1 B1 C1 C2 C3 B3 A3 A2 Name PVIN VDD EN NC FB SGND PGND SW Analog Supply Input. Enable Input. Set this digital input high for normal operation. For shutdown, set low. May be connected to VDD , SGND or floating. Feedback Analog Input. Connect to the output at the output filter capacitor. Analog and Control Ground Power Ground Switch node connection to the internal PFET switch and NFET synchronous rectifier. Connect to an inductor with a saturation current rating that exceeds the maximum Switch Peak Current Limit specification of the LM3206. Description Power Supply Voltage Input to the internal PFET switch. www.national.com 2 LM3206 Absolute Maximum Ratings (Notes 1, 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VDD, PVIN to SGND PGND to SGND EN, FB, NC −0.2V to +6.0V −0.2V to +0.2V (SGND −0.2V) to (VDD +0.2V) w/6.0V max (PGND −0.2V) to (PVIN +0.2V) w/6.0V max −0.2V to +0.2V Internally Limited +150°C −65°C to +150°C Maximum Lead Temperature (Soldering, 10 sec) ESD Rating (Notes 4, 13) Human Body Model: Machine Model: +260°C 2 kV 200V (Notes 1, 2) 2.7V to 5.5V 0mA to 650mA −30°C to +125°C −30°C to +85°C Operating Ratings SW Input Voltage Range Recommended Load Current Junction Temperature (TJ) Range Ambient Temperature (TA) Range  (Note 5) PVIN to VDD Continuous Power Dissipation  (Note 3) Junction Temperature (TJ-MAX) Storage Temperature Range Thermal Properties Junction-to-Ambient Thermal Resistance (θJA), TLA08 Package (Note 6) 100°C/W Electrical Characteristics Symbol VFB ISHDN IQ RDSON(P) RDSON(N) ILIM,PFET FOSC VIH,EN VIL,EN Parameter Feedback Voltage Shutdown supply current DC bias current into VDD Pin-pin resistance for PFET Pin-pin resistance for NFET Switch peak current limit Internal oscillator frequency Logic high input threshold Logic low input threshold (Notes 2, 7, 8) Limits in standard typeface are for TA = TJ = 25°C. Limits in boldface type apply over the full operating ambient temperature range (−30°C ≤ TA = TJ ≤ +85°C). Unless otherwise noted, all specifications apply to LM3206 with: PVIN = VDD = EN = 3.6V. Conditions PVIN = 3.6V EN = SW = 0V, (Note 9) FB = 0V, No Switching (Note 10) ISW = 200mA ISW = -200mA (Note 11) 935 1.7 1.2 0.5 5 10 Min 3.028 Typ 3.09 0.01 1 140 300 1100 2 Max 3.15 2 1.4 200 230 415 485 1200 2.3 Units V µA mA mΩ mΩ mA MHz V V µA IPIN,ENABLE Pin pull down current 3 www.national.com LM3206 The following spec table entries are guaranteed by design providing the component values in the typical application circuit are used. These parameters are not guaranteed by production testing. Min and Max limits apply over the full operating ambient temperature range (−30°C ≤ TA ≤ 85°C) and over the VIN range = 3.25V to 5.5V unless otherwise specified, Typical values are at TA = 25°C, PVIN = VDD = EN = 3.6V unless otherwise specified, L = 3.3µH(Note 14), DCR of L ≤ 100mΩ (FDK, MIPSA2520D3R3), CIN = 10µF, 0603, 6.3V (TDK, 1608X5R0J106M), COUT = 10µF, 0603, 6.3V(TDK, 1608X5R0J106M). Symbol T_ON Parameter Turn on time (time for output to reach 3.09V from Enable low to high transition) Efficiency (L = 3.3µH, DCR ≤ 100mΩ) Conditions EN = Low to High, VIN = 4.2V, VO = 3.09V, COUT = 10µF, IOUT ≤ 1mA 210 350 µs Min Typ Max Units System Characteristics η VIN = 3.6V, VOUT = 3.09V, IOUT = 400mA VIN = 4.2V, VOUT = 3.09V, IOUT = 10mA to 400mA (Note 12) VIN = 600mV perturbance, over Vin range 3.4V to 5.5V TRISE = TFALL = 10µs, VOUT = 3.09V, IOUT = 100mA VIN = 4.2V, VOUT = 3.09V, transients up to 100mA, TRISE = TFALL = 10µs 96 5 % mVp-p VOUT_ripple Ripple voltage, PWM mode Line_tr Line transient response 50 mVpk Load_tr Load transient response 50 mVpk Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 2: All voltages are with respect to the potential at the GND pins. The LM3206 is designed for mobile phone applications where turn-on after power-up is controlled by the system controller and where requirements for a small package size overrule increased die size for internal Under Voltage Lock-Out (UVLO) circuitry. Thus, it should be kept in shutdown by holding the EN pin low until the input voltage exceeds 3.25V. Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 150°C (typ.) and disengages at TJ = 130°C (typ.). Note 4: The Human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. (MIL-STD-883 3015.7) The machine model is a 200pF capacitor discharged directly into each pin. Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX). Note 6: Junction-to-ambient thermal resistance (θJA) is taken from thermal measurements, performed under the conditions and guidelines set forth in the JEDEC standard JESD51-7. A 4 layer, 4" x 4", 2/1/1/2 oz. Cu board as per JEDEC standards is used for the measurements. Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm. Due to the pulsed nature of the testing TA = TJ for the electrical characteristics table. Note 8: The parameters in the electrical characteristics table are tested under open loop conditions at PVIN = VDD = 3.6V. For performance over the input voltage range and closed loop results refer to the datasheet curves. Note 9: Shutdown current includes leakage current of PFET. Note 10: IQ specified here is when the part is operating at 100% duty cycle. Note 11: Current limit is built-in, fixed, and not adjustable. Refer to datasheet curves for closed loop data and its variation with regards to supply voltage and temperature. Electrical Characteristic table reflects open loop data (FB = 0V and current drawn from SW pin ramped up until cycle by cycle limit is activated). Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current until output voltage drops by 10%. Note 12: Ripple voltage should measured at COUT electrode on good layout PC board and under condition using suggested inductors and capacitors. Note 13: National Semiconductor recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper ESD handling techniques can result in damage. Note 14: Performance listed was taken using the FDK (MIPSA2520D3R3). Please refer to Inductor selection guide in Application Information section for proper inductor selection. www.national.com 4 LM3206 Typical Performance Characteristics (Circuit in Figure 3, PVIN = VDD = EN = 3.6V, L = 3.3uH(Note 14), DCR of L ≤ 100mΩ (FDK, MIPSA2520D3R3), CIN = 10uF, 0603, 6.3V (TDK, 1608X5R0J106M), COUT = 10uF, 0603, 6.3V (TDK, 1608X5R0J106M) unless otherwise noted. Quiescent Current vs Supply Voltage (No Switching) Shutdown Current vs Temperature (EN = 0V) 20198957 20198956 Switching Frequency Variation vs Temperature (VOUT = 3.09V, IOUT = 200mA) Output Voltage vs Supply Voltage (VOUT = 3.09V) 20198962 20198963 5 www.national.com LM3206 Output Voltage vs Temperature (VIN = 3.6V, VOUT = 3.09V) Open/Closed Loop Current Limit vs Temperature (PWM mode) 20198961 20198964 Efficiency vs Output Current (VOUT = 3.09V) Load Transient Response (VOUT = 3.09V) 20198917 20198965 Startup (VIN = 3.6V, VOUT = 3.09V, IOUT < 1mA) Startup (VIN = 4.2V, VOUT = 3.09V, IOUT < 1mA) 20198976 20198983 www.national.com 6 LM3206 Shutdown Respone (VIN= 3.6V, VOUT= 3.09V, RLOAD = 5 ohm) Shutdown Response (VIN = 4.2V, VOUT = 3.09V, RLOAD = 5Ω) 20198921 20198919 Line Transient Response (VIN = 3.3V to 3.9V, IOUT = 100mA) Timed Current Limit Response (VIN = 3.6V) 20198920 20198977 Output Voltage Ripple (VOUT = 3.09V) Output Voltage Ripple in Pulse Skip (VIN = 3.310V, VOUT = 3.09V, RLOAD = 5Ω) 20198978 20198980 7 www.national.com LM3206 RDSON vs Temperature (P-ch, ISW = 200mA) RDSON vs Temperature (N-ch, ISW = -200mA) 20198902 20198982 EN High Threshold vs. Vin 20198979 www.national.com 8 LM3206 Block Diagram 20198935 FIGURE 2. Functional Block Diagram 9 www.national.com LM3206 Operation Description The LM3206 is a simple, step-down DC-DC converter optimized for powering portable applications which require low dropout voltages such as mobile phones, portable communicators, and similar battery powered RFIC devices. It is designed to allow the application to operate at maximum efficiency over a wide range of power levels from a single LiIon battery cell. It is based on a current-mode buck architecture, with synchronous rectification for high efficiency. It is designed for a maximum load capability of 650mA in PWM mode. The maximum load range may vary from this depending on input voltage, output voltage and the inductor chosen. Efficiency is typically 96% for a 400mA load with a 3.6V input, and a fixed output voltage of 3.09V. Additional features include current overload protection, thermal overload shutdown and soft start. The LM3206 is constructed using a chip-scale 8-pin micro SMD package. This package offers the smallest possible size for space-critical applications such as cell phones, where board area is an important design consideration. Use of a high switching frequency (2MHz) reduces the size of external components. As shown in Figure 3, only three external power components are required for implementation. Use of a micro SMD package requires special design considerations for implementation. (See Micro SMD Package Assembly and use in the Applications Information section.) Its fine bump-pitch requires careful board design and precision assembly equipment. Use of this package is best suited for opaque-case applications, where its edges are not subject to high-intensity ambient red or infrared light. Also, the system controller should set EN low during power-up and other low supply voltage conditions. (See Shutdown Mode in the Device Information section.) 20198936 FIGURE 3. Typical Operating System Circuit Circuit Operation Referring to Figure 2 and Figure 3, the LM3206 operates as follows. During the first part of each switching cycle, the control block in the LM3206 turns on the internal PFET (Pchannel MOSFET) switch. This allows current to flow from the input through the inductor to the output filter capacitor and load. The inductor limits the current to a ramp with a slope of around (VIN - VOUT) / L, by storing energy in a magnetic field. During the second part of each cycle, the controller turns the PFET switch off, blocking current flow from the input, and then turns the NFET (N-channel MOSFET) synchronous rectifier on. In response, the inductor’s magnetic field collapses, generating a voltage that forces current from ground through the synchronous rectifier to the output filter capacitor and load. As the stored energy is transferred back into the circuit and depleted, the inductor current ramps down with a slope around VOUT / L. The output filter capacitor stores charge when the inductor current is high, and releases it when low, smoothing the voltage across the load. The output voltage is regulated by modulating the PFET switch on time to control the average current sent to the load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the switch and synchronous rectifier at SW to a low-pass filter formed by the inductor and output filter capacitor. The output voltage is equal to the average voltage at the SW pin. While in operation, the output voltage is regulated by switching at a constant frequency and then modulating the energy per cycle to control power to the load. Energy per cycle is set by modulating the PFET switch on-time pulse width to control the peak inductor current. This is done by comparing the signal from the current-sense amplifier with a slope compensated error signal from the voltage-feedback error amplifier. At the beginning of each cycle, the clock turns on the PFET switch, causing the inductor current to ramp up. When the current sense signal ramps past the error amplifier signal, the PWM comparator turns off the PFET switch and turns on the NFET synchronous rectifier, ending the first part of the cycle. If an increase in load pulls the output down, the error amplifier output increases, which allows the inductor current to ramp higher before the comparator turns off the PFET. This increases the average current sent to the output and adjusts for the increase in the load. Before appearing at the PWM comparator, a slope compensation ramp from the oscillator is subtracted from the error signal for stability of the current feedback loop. The minimum on time of PFET in PWM mode is 50ns (typ.) www.national.com 10 LM3206 Shutdown Mode Setting the EN digital pin low (1.2V) enables normal operation. EN should be set low to turn off the LM3206 during power-up and under voltage conditions when the power supply is less than the 2.7V minimum operating voltage. The LM3206 is designed for compact portable applications, such as mobile phones. In such applications, the system controller determines power supply sequencing and requirements for small package size outweigh the additional size required for inclusion of UVLO (Under Voltage Lock-Out) circuitry. be paid to this limit, because some small inductors show large inductance drops at high DC bias. These can not be used with the LM3206. Table 1 suggests some inductors and suppliers. There are two methods to choose the inductor saturation current rating. Method 1: The saturation current should be greater than the sum of the maximum load current and the worst case average to peak inductor current. This can be written as Internal Synchronous Rectification The LM3206 uses an internal NFET as a synchronous rectifier to reduce rectifier forward voltage drop and associated power loss. Synchronous rectification provides a significant improvement in efficiency whenever the output voltage is relatively low compared to the voltage drop across and ordinary rectifier diode. The internal NFET synchronous rectifier is turned on during the inductor current down slope in the second part of each cycle. The synchronous rectifier is turned off prior to the next cycle. The NFET is designed to conduct through its intrinsic body diode during transient intervals before it turns on, eliminating the need for an external diode. • • • • IRIPPLE: average to peak inductor current IOUTMAX: maximum load current ( ≤ 650mA) VIN: maximum input voltage in application L : min inductor value including worst case tolerances (30% drop can be considered for method 1) • f : minimum switching frequency (1.7Mhz) • VOUT: output voltage Method 2: A more conservative and recommended approach is to choose an inductor that has a saturation current rating greater than the maximum current limit of 1200mA. TABLE 1. Suggested inductors and their suppliers Model MIPSA2520D3R3 MIPW3226D3R0M NR3012T3R3M 1098AS-3R3M Size (WxLxH) [mm] 2.5 x 2.0 x 1.2 3.2 x 2.6 x 1.0 3.0 x 3.0 x 1.2 3.0 x 2.8 x 1.2 Vendor FDK FDK Taiyo-Yuden TOKO Current Limiting A current limit feature allows the LM3206 to protect itself and external components during overload conditions. In PWM mode, an 1200mA (max.) cycle-by-cycle current limit is normally used. If an excessive load pulls the output voltage down to approximately 0.375V, then the device switches to a timed current limit mode. In timed current limit mode the internal PFET switch is turned off after the current comparator trips and the beginning of the next cycle is inhibited for 3.5us to force the instantaneous inductor current to ramp down to a safe value. The synchronous rectifier is off in timed current limit mode. Timed current limit prevents the loss of current control seen in some products when the output voltage is pulled low in serious overload conditions. Thermal Overload Protection The LM3206 has a thermal overload protection function that operates to protect itself from short-term misuse and overload conditions. When the junction temperature exceeds around 150°C, the device inhibits operation. Both the PFET and the NFET are turned off in PWM mode. When the temperature drops below 125°C, normal operation resumes. Prolonged operation in thermal overload conditions may damage the device and is considered bad practice. Inductor MIPSA2520D3R3 is recommended to be used in applications of < 400mA load current. The other three inductors may be used in applications of > 400mA load current. If a smaller inductance inductor is used incorrectly for the wrong application, the LM3206 may become unstable during line and load transients. For low-cost applications, an unshielded bobbin inductor is suggested. For noise-critical applications, a toroidal or shielded-bobbin inductor should be used. A good practice is to lay out the board with footprints accommodating both types for design flexibility. This allows substitution of a low-noise toroidal inductor, in the event that noise from low-cost bobbin models is unacceptable. Saturation occurs when the magnetic flux density from current through the windings of the inductor exceeds what the inductor’s core material can support with a corresponding magnetic field. This can cause poor efficiency, regulation errors or stress to a DC-DC converter like the LM3206. CAPACITOR SELECTION The LM3206 is designed for use with a 10uF ceramic capacitors for its input and output filters. They should maintain at least 50% capacitance at DC bias and temperature conditions. Ceramic capacitors types such as X5R, X7R are recommended for both filters. These provide an optimal balance between small size, cost, reliability and performance for cell phones and similar applications. Table 2 lists the suggested part number and supplier. DC bias characteristics of the ca- Application Information INDUCTOR SELECTION A 3.3µH inductor with saturation current rating over 1200mA and low inductance drop at the full DC bias condition is recommended for almost all applications. The inductor’s DC resistance should be less than 0.2Ω for good efficiency. For low dropout voltage, lower DCR inductors are advantageous. The lower limit of acceptable inductance is 2.3µH at 400mA over the operating temperature range. Full attention should 11 www.national.com LM3206 pacitors must be considered when selecting the voltage rating and case size of the capacitor. TABLE 2. Suggested capacitor and their supplier Model C1608X5R0J106M, 10uF, 6.3V C2012X5R0J106M, 10µF, 6.3V Vendor TDK TDK The input filter capacitor supplies AC current drawn by the PFET switch of the LM3206 in the first part of each cycle and reduces the voltage ripple imposed on the input power source. The output filter capacitor absorbs the AC inductor current, helps maintain a steady output voltage during transient load changes and reduces output voltage ripple. These capacitors must be selected with sufficient capacitance and sufficiently low ESR (Equivalent Series Resistance) to perform these functions. The ESR of the filter capacitors is generally a major factor in voltage ripple. EN PIN CONTROL Drive the EN pin using the system controller to turn the LM3206 ON and OFF. Use a comparator, Schmidt trigger or logic gate to drive the EN pin. Set EN high (>1.2V) for normal operation and low (
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