LM3423

LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 N-Channel Controllers for Constant Current LED Drivers LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 January 21, 2010 N-Channel Controllers for Constant Current LED Drivers General Description The LM3421/23 are versatile high voltage N-channel MosFET controllers for LED drivers . They can be easily configured in buck, boost, buck-boost and SEPIC topologies. This flexibility, along with an input voltage rating of 75V, makes the LM3421/23 ideal for illuminating LEDs in a large family of applications. Adjustable high-side current sense voltage allows for tight regulation of the LED current with the highest efficiency possible. The LM3421/23 uses Predictive Off-time (PRO) control, which is a combination of peak current-mode control and a predictive off-timer. This method of control eases the design of loop compensation while providing inherent input voltage feed-forward compensation. The LM3421/23 devices include a high-voltage startup regulator that operates over a wide input range of 4.5V to 75V. The internal PWM controller is designed for adjustable switching frequencies of up to 2.0 MHz, thus enabling compact solutions. Additional features include "zero current" shutdown, analog dimming, PWM dimming, over-voltage protection, under-voltage lock-out, cycle-by-cycle current limit, and thermal shutdown. The LM3423 also includes an LED output status flag, a fault flag, a programmable fault timer, and a logic input to select the polarity of the dimming output driver. The LM3421Q1/23Q1 are AEC-Q100 grade 1 qualified and LM3421Q0/23Q0 are AEC-Q100 grade 0 qualified. Features ■ LM3421Q1/LM3423Q1 are Automotive Grade products that are AEC-Q100 grade 1 qualified (-40°C to +125°C operating junction temperature) and similarly LM3421Q0/ LM3423Q0 are AEC-Q100 grade 0 qualified (-40°C to +150°C operating junction temperature) ■ VIN range from 4.5V to 75V ■ High-side adjustable current sense ■ ■ ■ ■ ■ ■ ■ ■ 2Ω, 1A Peak MosFET gate driver Input under-voltage and output over-voltage protection PWM and analog dimming Cycle-by-cycle current limit Programmable switching frequency "Zero current" shutdown and thermal shutdown LED output status flag (LM3423/23Q1/23Q0 only) Fault status flag and timer (LM3423/23Q1/23Q0 only) Applications ■ ■ ■ ■ ■ LED Drivers - Buck, Boost, Buck-Boost, and SEPIC Indoor and Outdoor Area SSL Automotive General Illumination Constant-Current Regulators Typical Boost Application Circuit 300673b6 Boost Evaluation Board 9 Series LEDs at 1A 300673k9 © 2010 National Semiconductor Corporation 300673 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 Connection Diagrams Top View Top View 30067304 16-Lead TSSOP EP NS Package Number MXA16A 300673a1 20-Lead TSSOP EP NS Package Number MXA20A Ordering Information Order Number Spec. Package Type NSC Package Drawing MXA16A MXA16A MXA20A MXA20A MXA16A MXA16A MXA20A MXA20A MXA16A MXA16A MXA20A MXA20A Supplied As Features LM3421MH LM3421MHX LM3423MH LM3423MHX LM3421Q1MH LM3421Q1MHX LM3423Q1MH LM3423Q1MHX LM3421Q0MH LM3421Q0MHX LM3423Q0MH LM3423Q0MHX NOPB NOPB NOPB NOPB NOPB NOPB NOPB NOPB NOPB NOPB NOPB NOPB TSSOP-16 EP TSSOP-16 EP TSSOP-20 EP TSSOP-20 EP TSSOP-16 EP TSSOP-16 EP TSSOP-20 EP TSSOP-20 EP TSSOP-16 EP TSSOP-16 EP TSSOP-20 EP TSSOP-20 EP 92 Units, Rail 2500 Units, Tape and Reel 73 Units, Rail 2500 Units, Tape and Reel 92 Units, Rail 2500 Units, Tape and Reel 73 Units, Rail 2500 Units, Tape and Reel 92 Units, Rail 2500 Units, Tape and Reel 73 Units, Rail 2500 Units, Tape and Reel AEC-Q100 Grade 0 qualified. Automotive Grade Production Flow* AEC-Q100 Grade 1 qualified. Automotive Grade Production Flow* *Automotive Grade (Q) product incorporates enhanced manufacturing and support processes for the automotive market, including defect detection methodologies. Reliability qualification is compliant with the requirements and temperature grades defined in the AEC-Q100 standard. Automotive grade products are identified with the letter Q. For more information go to http://www.national.com/automotive. www.national.com 2 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 Pin Descriptions LM3423 1 2 3 LM3421 1 2 3 Name VIN EN COMP Description Input Voltage Enable Compensation Function Bypass with 100 nF capacitor to AGND as close to the device as possible in the circuit board layout. Connect to AGND for zero current shutdown or apply > 2.4V to enable device. Connect a capacitor to AGND to set the compensation. Connect a resistor to AGND to set the signal current. For analog dimming, connect a controlled current source or a potentiometer to AGND as detailed in the Analog Dimming section. External RC network sets the predictive “off-time” and thus the switching frequency. Connect to PGND through the DAP copper pad to provide ground return for CSH, COMP, RCT, and TIMR. Connect to a resistor divider from VO to program output over-voltage lockout (OVLO). Turn-off threshold is 1.24V and hysteresis for turn-on is provided by 23 µA current source. Connect a PWM signal for dimming as detailed in the PWM Dimming section and/or a resistor divider from VIN to program input under-voltage lockout (UVLO). Turn-on threshold is 1.24V and hysteresis for turn-off is provided by 23 µA current source. Connect to pull-up resistor from VIN and N-channel MosFET open drain output is high when a fault condition is latched by the timer. Connect a capacitor to AGND to set the time delay before a sensed fault condition is latched. Connect to pull-up resistor from VIN and N-channel MosFET open drain output pulls down when the LED current is not in regulation. Connect to AGND if dimming with a series P-channel MosFET or leave open when dimming with series Nchannel MosFET. Connect to the gate of the dimming MosFET. Connect to AGND through the DAP copper pad to provide ground return for GATE and DDRV. Connect to the gate of the main switching MosFET. Bypass with 2.2 µF–3.3 µF ceramic capacitor to PGND. Connect to the drain of the main N-channel MosFET switch for RDS-ON sensing or to a sense resistor installed in the source of the same device. Connect the low side of all external resistor dividers (VIN UVLO, OVP) to implement “zero-current” shutdown. Connect through a series resistor to the positive side of the LED current sense resistor. Connect through a series resistor to the negative side of the LED current sense resistor. Star ground, connecting AGND and PGND. For thermal considerations please refer to (Note 2). 4 4 CSH Current Sense High 5 6 5 6 RCT AGND Resistor Capacitor Timing Analog Ground 7 7 OVP Over-Voltage Protection 8 8 nDIM Dimming Input / Under-Voltage Protection 9 - FLT Fault Flag 10 - TIMR Fault Timer 11 - LRDY LED Ready Flag 12 13 14 15 16 17 9 10 11 12 13 DPOL DDRV PGND GATE VCC IS Dim Polarity Dim Gate Drive Output Power Ground Main Gate Drive Output Internal Regulator Output Main Switch Current Sense 18 14 RPD Resistor Pull Down 19 20 DAP (21) 15 16 DAP (17) HSP HSN DAP LED Current Sense Positive LED Current Sense Negative Thermal PAD on bottom of IC 3 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN, EN, RPD, nDIM OVP, HSP, HSN, LRDY, FLT, DPOL RCT IS -0.3V to 76.0V -1 mA continuous -0.3V to 76.0V -100 µA continuous -0.3V to 76.0V -1 mA to +5 mA continuous -0.3V to 76.0V -2V for 100 ns -1mA continuous -0.3V to 8.0V -0.3V to 7.0V -100µA to +100µA Continuous -0.3V to 6.0V -200 µA to +200 µA Continuous -0.3V to VCC -2.5V for 100 ns VCC+2.5V for 100 ns -1 mA to +1 mA continuous -0.3V to 0.3V -2.5V to 2.5V for 100 ns Maximum Junction Temperature Storage Temperature Range Maximum Lead Temperature (Solder and Reflow) (Note 3) Continuous Power Dissipation ESD Susceptibility (Note 4) Human Body Model Charge Device Model Internally Limited −65°C to +150°C 260°C Internally Limited 2 kV 500V CSH pin 750V all other pins (Note 1) VCC TIMR COMP, CSH Operating Conditions Operating Junction Temperature Range LM3421, LM3421Q1, LM3423, LM3423Q1 LM3421Q0, LM3423Q0 Input Voltage VIN GATE, DDRV −40°C to +125°C −40°C to +150°C 4.5V to 75V PGND (Note 1) Specifications in standard type face are for TJ = 25°C and those with boldface type apply over the full Operating Temperature Range ( TJ = −40°C to +150°C for LM3421Q0/LM3423Q0, TJ = −40°C to +125°C for all others). Specifications that differ between the two operating ranges will be identified in the Temp Range column as Q0 for TJ = −40°C to +150°C and as Q1 for TJ = −40°C to +125°C. If no temperature range is indicated then the specification holds for both Q1 and Q0. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = +25°C, and are provided for reference purposes only. Unless otherwise stated the following condition applies: VIN = +14V. Symbol Parameter Conditions Temp Range Min (Note 5) 6.30 20 Q1 Q0 ISD VCC SUPPLY VCCUV VCCHYS ENST VCC UVLO Threshold VCC UVLO Hysteresis EN Startup Threshold EN Increasing EN Decreasing ENSTHYS REN EN Startup Hysteresis EN Pulldown Resistance EN = 1V Q1 Q0 CSH THRESHOLDS CSH High Fault CSH Increasing 1.6 1.0 V CSH Low Condition on LRDY CSH increasing Pin (LM3423) 0.45 Q1 Q0 0.80 VCC Increasing VCC Decreasing EN THRESHOLDS 1.75 1.63 0.1 0.82 1.30 1.80 MΩ 2.40 2.75 V 3.70 4.17 4.08 0.1 4.50 V Shutdown Current EN = 0V Typ (Note 6) 6.90 25 2 0.1 3 3.5 1.0 µA mA Max (Note 5) 7.35 Units Electrical Characteristics STARTUP REGULATOR VCCREG ICCLIM IQ VCC Regulation VCC Current Limit Quiescent Current ICC = 0 mA VCC = 0V EN = 3.0V, Static V www.national.com 4 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 Symbol OV THRESHOLDS OVPCB OVPHYS Parameter Conditions Temp Range Min (Note 5) 1.185 Typ (Note 6) 1.240 23 Max (Note 5) 1.285 25 26 Units OVP OVLO Threshold OVP Hysteresis Source Current DPOL Logic Threshold DPOL Pullup Resistance Fault Threshold Fault Pin Source Current OVP Increasing OVP Active (high) Q1 Q0 DPOL Increasing V µA 20 DPOL THRESHOLDS DPOLTHRES H 2.0 2.3 500 2.6 1200 1.285 1.290 13.0 13.5 1.260 0.6 35 36 V kΩ RDPOL VFLTTH IFLT FAULT TIMER Q1 Q0 Q1 Q0 ERROR AMPLIFIER VREF CSH Reference Voltage Error Amplifier Input Bias Current COMP Sink / Source Current Transconductance Linear Input Range (Note 7) 0.5 Transconductance Bandwidth -6dB Unloaded Response (Note 7) OFF TIMER Minimum Off-time RRCT VRCT f RCT Reset Pull-down Resistance VIN/25 Reference Voltage Continuous Conduction Switching Frequency COMP to PWM Offset CURRENT LIMIT (IS) ILIM Current Limit Threshold ILIM Delay to Output Leading Edge Blanking Time HIGH SIDE TRANSCONDUCTANCE AMPLIFIER Input Bias Current Transconductance Input Offset Current Input Offset Voltage Transconductance Bandwidth ICSH = 100 µA (Note 7) GATE DRIVER (GATE) RSRC(GATE) RSNK(GATE) GATE Sourcing Resistance GATE Sinking Resistance GATE = High GATE = Low 2.0 1.3 6.0 4.5 Ω 20 -1.5 -7 250 11.5 119 0 0 500 1.5 7 µA mA/V µA mV kHz Q1 Q0 115 215 245 35 210 275 75 90 325 ns mV VIN = 14V 2.2 nF > CT > 470 pF RCT = 1V through 1 kΩ Q1 Q0 Q1 Q0 Q1 Q0 540 35 36 565 25/(CTRT) 75 90 120 125 585 590 ns Ω mV Hz Q1 Q0 With Respect to AGND 1.210 -0.6 22 1.235 0 30 100 ±125 1.0 V 1.185 10.0 1.240 11.5 V µA µA µA/V mV MHz PWM COMPARATOR 700 800 900 mV 5 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 Symbol Parameter Conditions Temp Range Min (Note 5) 1.185 Typ (Note 6) 1.240 23 13.5 3.5 Max (Note 5) 1.285 25 26 30.0 10.0 300 350 300 350 300 350 Units DIM DRIVER (DIM, DDRV) nDIMVTH nDIMHYS RSRC(DDRV) RSNK(DDRV) RRPD RFLT RLRDY nDIM / UVLO Threshold nDIM Hysteresis Current DDRV Sourcing Resistance DDRV Sinking Resistance RPD Pull-down Resistance FLT Pull-down Resistance LRDY Pull-down Resistance DDRV = High DDRV = Low Q1 Q0 Q1 Q0 Q1 Q0 THERMAL SHUTDOWN TSD THYS θJA θJC Thermal Shutdown Threshold (Note 7) Thermal Shutdown Hysteresis (Note 7) Junction to Ambient (Note 2) 16L TSSOP EP 20L TSSOP EP Junction to Exposed Pad (EP) 16L TSSOP EP 20L TSSOP EP Q1 Q0 THERMAL RESISTANCE 37.4 34.0 2.3 2.3 °C/W °C/W 165 210 25 °C Q1 Q0 V µA Ω 20 PULL-DOWN N-CHANNEL MosFETS 145 145 135 Ω Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Operating Ratings is not implied. The recommended Operating Ratings indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are with respect to the potential at the AGND pin, unless otherwise specified. Note 2: Junction-to-ambient thermal resistance is highly board-layout dependent. The numbers listed in the table are given for an reference layout wherein the 16L TSSOP package has its EP pad populated with 9 vias and the 20L TSSOP has its EP pad populated with 12 vias. In applications where high maximum power dissipation exists, namely driving a large MosFET at high switching frequency from a high input voltage, special care must be paid to thermal dissipation issues during board design. In high-power dissipation applications, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TAMAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125°C for Q1, or 150°C for Q0), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the package in the application (θJA), as given by the following equation: TA-MAX = TJMAX-OP – (θJA × PD-MAX). In most applications there is little need for the full power dissipation capability of this advanced package. Under these circumstances, no vias would be required and the thermal resistances would be 104 °C/W for the 16L TSSOP and 86.7 °C/W for the 20L TSSOP. It is possible to conservatively interpolate between the full via count thermal resistance and the no via count thermal resistance with a straight line to get a thermal resistance for any number of vias in between these two limits. Note 3: Refer to National’s packaging website for more detailed information and mounting techniques. http://www.national.com/analog/packaging/ Note 4: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The applicable standard is JESD22-A114C. Note 5: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100% production tested. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL). Note 6: Typical numbers are at 25°C and represent the most likely norm. Note 7: These electrical parameters are guaranteed by design, and are not verified by test. Note 8: The measurements were made using the standard buck-boost evaluation board from AN-2010. Note 9: The measurements were made using the standard boost evaluation board from AN-2011. www.national.com 6 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 Typical Performance Characteristics Boost Efficiency vs. Input Voltage VO = 32V (9 LEDs) (Note 9) TA=+25°C and VIN = 14V unless otherwise specified Buck-Boost Efficiency vs. Input Voltage VO = 21V (6 LEDs) (Note 8) 300673b6 300673b5 Boost LED Current vs. Input Voltage VO = 32V (9 LEDs) (Note 9) Buck-Boost LED Current vs. Input Voltage VO = 21V (6 LEDs) (Note 8) 300673b8 300673b7 Analog Dimming VO = 21V (6 LEDs); VIN = 24V (Note 8) PWM Dimming VO = 32V (9 LEDs); VIN = 24V (Note 9) 300673b9 300673c0 7 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 VCSH vs. Junction Temperature VCC vs. Junction Temperature 300673b0 300673b1 VRCT vs. Junction Temperature VLIM vs. Junction Temperature 300673b2 300673b3 tON-MIN vs. Junction Temperature 300673b4 www.national.com 8 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 Block Diagram 30067303 Theory of Operation The LM3421/23 are N-channel MosFET (NFET) controllers for buck, boost and buck-boost current regulators which are ideal for driving LED loads. The controller has wide input voltage range allowing for regulation of a variety of LED loads. The high-side differential current sense, with low adjustable threshold voltage, provides an excellent method for regulating output current while maintaining high system efficiency. The LM3421/23 uses a Predictive Off-time (PRO) control architecture that allows the regulator to be operated using minimal external control loop compensation, while providing an inher- ent cycle-by-cycle current limit. The adjustable current sense threshold provides the capability to amplitude (analog) dim the LED current and the output enable/disable function with external dimming FET driver allows for fast PWM dimming of the LED load. When designing, the maximum attainable LED current is not internally limited because the LM3421/23 is a controller. Instead it is a function of the system operating point, component choices, and switching frequency allowing the LM3421/23 to easily provide constant currents up to 5A. This controller contains all the features necessary to implement a high efficiency versatile LED driver. 9 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 30067398 FIGURE 1. Ideal CCM Regulator Inductor Current iL(t) CURRENT REGULATORS Current regulators can be designed to accomplish three basic functions: buck, boost, and buck-boost. All three topologies in their most basic form contain a main switching MosFET, a recirculating diode, an inductor and capacitors. The LM3421/23 is designed to drive a ground referenced NFET which is perfect for a standard boost regulator. Buck and buck-boost regulators, on the other hand, usually have a highside switch. When driving an LED load, a ground referenced load is often not necessary, therefore a ground referenced switch can be used to drive a floating load instead. The LM3421/23 can then be used to drive all three basic topologies as shown in the Basic Topology Schematics section. Other topologies such as the SEPIC and flyback converter (both derivatives of the buck-boost) can be implemented as well. Looking at the buck-boost design, the basic operation of a current regulator can be analyzed. During the time that the NFET (Q1) is turned on (tON), the input voltage source stores energy in the inductor (L1) while the output capacitor (CO) provides energy to the LED load. When Q1 is turned off (tOFF), the re-circulating diode (D1) becomes forward biased and L1 provides energy to both CO and the LED load. Figure 1 shows the inductor current (iL(t)) waveform for a regulator operating in CCM. The average output LED current (ILED) is proportional to the average inductor current (IL) , therefore if IL is tightly controlled, ILED will be well regulated. As the system changes input voltage or output voltage, the ideal duty cycle (D) is varied to regulate IL and ultimately ILED. For any current regulator, D is a function of the conversion ratio: Buck PREDICTIVE OFF-TIME (PRO) CONTROL PRO control is used by the LM3421/23 to control ILED. It is a combination of average peak current control and a one-shot off-timer that varies with input voltage. The LM3421/23 uses peak current control to regulate the average LED current through an array of HBLEDs. This method of control uses a series resistor in the LED path to sense LED current and can use either a series resistor in the MosFET path or the MosFET RDS-ON for both cycle-by-cycle current limit and input voltage feed forward. D is indirectly controlled by changes in both tOFF and tON, which vary depending on the operating point. Even though the off-time control is quasi-hysteretic, the input voltage proportionality in the off-timer creates an essentially constant switching frequency over the entire operating range for boost and buck-boost topologies. The buck topology can be designed to give constant ripple over either input voltage or output voltage, however switching frequency is only constant at a specific operating point . This type of control minimizes the control loop compensation necessary in many switching regulators, simplifying the design process. The averaging mechanism in the peak detection control loop provides extremely accurate LED current regulation over the entire operating range. PRO control was designed to mitigate “current mode instability” (also called “sub-harmonic oscillation”) found in standard peak current mode control when operating near or above 50% duty cycles. When using standard peak current mode control with a fixed switching frequency, this condition is present, regardless of the topology. However, using a constant off-time approach, current mode instability cannot occur, enabling easier design and control. Predictive off-time advantages: • There is no current mode instability at any duty cycle. • Higher duty cycles / voltage transformation ratios are possible, especially in the boost regulator. The only disadvantage is that synchronization to an external reference frequency is generally not available. Boost Buck-boost www.national.com 10 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 SWITCHING FREQUENCY An external resistor (RT) connected between the RCT pin and the switch node (where D1, Q1, and L1 connect), in combination with a capacitor (CT) between the RCT and AGND pins, sets the off-time (tOFF) as shown in Figure 2. For boost and buck-boost topologies, the VIN proportionality ensures a virtually constant switching frequency (fSW). For a buck topology, RT and CT are also used to set tOFF, however the VIN proportionality will not ensure a constant switching frequency. Instead, constant ripple operation can be achieved. Changing the connection of RT in Figure 2 from VSW to VIN will provide a constant ripple over varying VIN. Adding a PNP transistor as shown in Figure 3 will provide constant ripple over varying VO. The switching frequency is defined: Buck (Constant Ripple vs. VIN) 30067399 FIGURE 2. Off-timer Circuitry for Boost and Buck-boost Regulators Buck (Constant Ripple vs. VO) Boost and Buck-boost For all topologies, the CT capacitor is recommended to be 1 nF and should be located very close to the LM3421/23. 30067301 FIGURE 3. Off-timer Circuitry for Buck Regulators 30067357 FIGURE 4. LED Current Sense Circuitry 11 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 AVERAGE LED CURRENT The LM3421/23 uses an external current sense resistor (RSNS) placed in series with the LED load to convert the LED current (ILED) into a voltage (VSNS) as shown in Figure 4. The HSP and HSN pins are the inputs to the high-side sense amplifier which are forced to be equal potential (VHSP=VHSN) through negative feedback. Because of this, the VSNS voltage is forced across RHSP to generate the signal current (ICSH) which flows out of the CSH pin and through the RCSH resistor. The error amplifier will regulate the CSH pin to 1.24V, therefore ICSH can be calculated: ANALOG DIMMING The CSH pin can be used to analog dim the LED current by adjusting the current sense voltage (VSNS). There are several different methods to adjust VSNS using the CSH pin: 1. External variable resistance : Adjust a potentiometer placed in series with RCSH to vary VSNS. 2. External variable current source: Source current (0 µA to ICSH) into the CSH pin to adjust VSNS. This means VSNS will be regulated as follows: ILED can then be calculated: 300673k3 The selection of the three resistors (RSNS, RCSH, and RHSP) is not arbitrary. For matching and noise performance, the suggested signal current ICSH is approximately 100 µA. This current does not flow in the LEDs and will not affect either the off-state LED current or the regulated LED current. ICSH can be above or below this value, but the high-side amplifier offset characteristics may be affected slightly. In addition, to minimize the effect of the high-side amplifier voltage offset on LED current accuracy, the minimum VSNS is suggested to be 50 mV. Finally, a resistor (RHSN = RHSP) should be placed in series with the HSN pin to cancel out the effects of the input bias current (~10 µA) of both inputs of the high-side sense amplifier. The sense resistor (RSNS) can be placed anywhere in the series string of LEDs as long as the voltage at the HSN and HSP pins (VHSP and VHSN) satisfies the following conditions. FIGURE 5. Analog Dimming Circuitry In general, analog dimming applications require a lower switching frequency to minimize the effect of the leading edge blanking circuit. As the LED current is reduced, the output voltage and the duty cycle decreases. Eventually, the minimum on-time is reached. The lower the switching frequency, the wider the linear dimming range. Figure 5 shows how both CSH methods are physically implemented. Method 1 uses an external potentiometer in the CSH path which is a simple addition to the existing circuitry. However, the LEDs cannot dim completely because there is always some resistance causing signal current to flow. This method is also susceptible to noise coupling at the CSH pin since the potentiometer increases the size of the signal current loop. Method 2 provides a complete dimming range and better noise performance, though it is more complex. It consists of a PNP current mirror and a bias network consisting of an NPN, 2 resistors and a potentiometer (RADJ), where RADJ controls the amount of current sourced into the CSH pin. A higher resistance value will source more current into the CSH pin causing less regulated signal current through RHSP, effectively dimming the LEDs. VREF should be a precise external voltage reference, while Q7 and Q8 should be a dual pair PNP for best matching and performance. The additional current (IADD) sourced into the CSH pin can be calculated: Typically, for a buck-boost configuration, RSNS is placed at the bottom of the string (LED-) which allows for greater flexibility of input and output voltage. However, if there is substantial input voltage ripple allowed, it can help to place RSNS at the top of the string (LED+) which limits the output voltage of the string to: Note that he CSH pin can also be used as a low-side current sense input regulated to 1.24V. The high-side sense amplifier is disabled if HSP and HSN are tied to AGND (or VHSN > VHSP) . The corresponding ILED for a specific IADD is: www.national.com 12 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 CURRENT SENSE/CURRENT LIMIT The LM3421/23 achieves peak current mode control using a comparator that monitors the main MosFET (Q1) transistor current, comparing it with the COMP pin voltage as shown in Figure 6. Further, it incorporates a cycle-by-cycle over-current protection function. Current limit is accomplished by a redundant internal current sense comparator. If the voltage at the current sense comparator input (IS) exceeds 245 mV (typical), the on cycle is immediately terminated. The IS input pin has an internal N-channel MosFET which pulls it down at the conclusion of every cycle. The discharge device remains on an additional 210 ns (typical) after the beginning of a new cycle to blank the leading edge spike on the current sense signal. The leading edge blanking (LEB) determines the minimum achievable on-time (tON-MIN). OVER-CURRENT PROTECTION The LM3421/23 devices have a secondary method of overcurrent protection. Switching action is disabled whenever the current in the LEDs is more than 30% above the regulation set point. The dimming MosFET switch driver (DDRV) is not disabled however as this would immediately remove the fault condition and cause oscillatory behavior. ZERO CURRENT SHUTDOWN The LM3421/23 devices implement "zero current" shutdown via the EN and RPD pins. When pulled low, the EN pin places the devices into near-zero current state, where only the leakage currents will be observed at the pins (typical 0.1 µA). The applications circuits, frequently have resistor dividers to set UVLO, OVLO, or other similar functions. The RPD pin is an open drain N-channel MosFET that is enabled only when the device is enabled. Tying the bottom of all resistor dividers to the RPD pin as shown in Figure 7 allows them to float during shutdown, thus removing their current paths and providing true application-wide zero current shutdown. 300673a2 FIGURE 6. Current Sense / Current Limit Circuitry There are two possible methods to sense the transistor current. The RDS-ON of the main power MosFET can be used as the current sense resistance because the IS pin was designed to withstand the high voltages present on the drain when the MosFET is in the off state. Alternatively, a sense resistor located in the source of the MosFET may be used for current sensing, however a low inductance (ESL) type is suggested. The cycle-by-cycle current limit (ILIM) can be calculated using either method as the limiting resistance (RLIM): 300673j1 FIGURE 7. Zero Current Shutdown Circuit 13 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 CONTROL LOOP COMPENSATION The LM3421/23 control loop is modeled like any current mode controller. Using a first order approximation, the uncompensated loop can be modeled as a single pole created by the output capacitor and, in the boost and buck-boost topologies, a right half plane zero created by the inductor, where both have a dependence on the LED string dynamic resistance. There is also a high frequency pole in the model, however it is near the switching frequency and plays no part in the compensation design process therefore it will be neglected. Since ceramic capacitance is recommended for use with LED drivers due to long lifetimes and high ripple current rating, the ESR of the output capacitor can also be neglected in the loop analysis. Finally, there is a DC gain of the uncompensated loop which is dependent on internal controller gains and the external sensing network. A buck-boost regulator will be used as an example case. See the Design Guide section for compensation of all topologies. The uncompensated loop gain for a buck-boost regulator is given by the following equation: And the right half plane zero (ωZ1) is: 300673a7 FIGURE 8. Uncompensated Loop Gain Frequency Response Figure 8 shows the uncompensated loop gain in a worst-case scenario when the RHP zero is below the output pole. This occurs at high duty cycles when the regulator is trying to boost the output voltage significantly. The RHP zero adds 20dB/ decade of gain while loosing 45°/decade of phase which places the crossover frequency (when the gain is zero dB) extremely high because the gain only starts falling again due to the high frequency pole (not modeled or shown in figure). The phase will be below -180° at the crossover frequency which means there is no phase margin (180° + phase at crossover frequency) causing system instability. Even if the output pole is below the RHP zero, the phase will still reach -180° before the crossover frequency in most cases yielding instability. Where the uncompensated DC loop gain of the system is described as: And the output pole (ωP1) is approximated: 300673a3 FIGURE 9. Compensation Circuitry www.national.com 14 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 To mitigate this problem, a compensator should be designed to give adequate phase margin (above 45°) at the crossover frequency. A simple compensator using a single capacitor at the COMP pin (CCMP) will add a dominant pole to the system, which will ensure adequate phase margin if placed low enough. At high duty cycles (as shown in Figure 8), the RHP zero places extreme limits on the achievable bandwidth with this type of compensation. However, because an LED driver is essentially free of output transients (except catastrophic failures open or short), the dominant pole approach, even with reduced bandwidth, is usually the best approach. The dominant compensation pole (ωP2) is determined by CCMP and the output resistance (RO) of the error amplifier (typically 5 MΩ): 30067361 FIGURE 11. Start-Up Waveforms START-UP REGULATOR The LM3421/23 includes a high voltage, low dropout bias regulator. When power is applied, the regulator is enabled and sources current into an external capacitor (CBYP) connected to the VCC pin. The recommended bypass capacitance for the VCC regulator is 2.2 µF to 3.3 µF. The output of the VCC regulator is monitored by an internal UVLO circuit that protects the device from attempting to operate with insufficient supply voltage and the supply is also internally current limited. Figure 11 shows the typical start-up waveforms for the LM3421/23. First, CBYP is charged to be above VCC UVLO threshold (~4.2V). The CVCC charging time (tVCC) can be estimated as: It may also be necessary to add one final pole at least one decade above the crossover frequency to attenuate switching noise and, in some cases, provide better gain margin. This pole can be placed across RSNS to filter the ESL of the sense resistor at the same time. Figure 9 shows how the compensation is physically implemented in the system. The high frequency pole (ωP3) can be calculated: The total system transfer function becomes: CCMP is then charged to 0.9V over the charging time (tCMP) which can be estimated as: The resulting compensated loop gain frequency response shown in Figure 10 indicates that the system has adequate phase margin (above 45°) if the dominant compensation pole is placed low enough, ensuring stability: Once CCMP = 0.9V, the part starts switching to charge CO until the LED current is in regulation. The CO charging time (tCO) can be roughly estimated as: The system start-up time (tSU) is defined as: In some configurations, the start-up waveform will overshoot the steady state COMP pin voltage. In this case, the LED current and output voltage will overshoot also, which can trip the over-voltage or protection, causing a race condition. The easiest way to prevent this is to use a larger compensation capacitor (CCMP), thereby slowing down the control loop. 300673a4 FIGURE 10. Compensated Loop Gain Frequency Response 15 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 OVER-VOLTAGE LOCKOUT (OVLO) The OVLO feature can cause some interesting results if the OVLO trip-point is set too cose to VO. At turn-on, the converter has a modest amount of voltage overshoot before the control loop gains control of ILED. If the overshoot exceeds the OVLO threshold, the controller shuts down, opening the dimming MosFET. This isolates the LED load from the converter and the output capacitance. The voltage will then discharge very slowly through the HSP and HSN pins until VO drops below the lower threshold, where the process repeats. This looks like the LEDs are blinking at around 2 Hz. This mode can be escaped if the input voltage is reduced. 30067358 FIGURE 12. Over-Voltage Protection Circuitry The LM3421/23 can be configured to detect an output (or input) over-voltage condition via the OVP pin. The pin features a precision 1.24V threshold with 23 µA (typical) of hysteresis current as shown in Figure 12. When the OVLO threshold is exceeded, the GATE pin is immediately pulled low and a 23 µA current source provides hysteresis to the lower threshold of the OVLO hysteretic band. If the LEDs are referenced to a potential other than ground (floating), as in the buck-boost and buck configuration, the output voltage (VO) should be sensed and translated to ground by using a single PNP as shown in Figure 13. The over-voltage turn-off threshold (VTURN-OFF) is defined: Ground Referenced INPUT UNDER-VOLTAGE LOCKOUT (UVLO) The nDIM pin is a dual-function input that features an accurate 1.24V threshold with programmable hysteresis as shown in Figure 14. This pin functions as both the PWM dimming input for the LEDs and as a VIN UVLO. When the pin voltage rises and exceeds the 1.24V threshold, 23 µA (typical) of current is driven out of the nDIM pin into the resistor divider providing programmable hysteresis. 300673a5 FIGURE 14. UVLO Circuit Floating When using the nDIM pin for UVLO and PWM dimming concurrently, the UVLO circuit can have an extra series resistor to set the hysteresis. This allows the standard resistor divider to have smaller resistor values minimizing PWM delays due to a pull-down MosFET at the nDIM pin (see PWM Dimming section). In general, at least 3V of hysteresis is preferable when PWM dimming, if operating near the UVLO threshold. The turn-on threshold (VTURN-ON) is defined as follows: In the ground referenced configuration, the voltage across ROV2 is VO - 1.24V whereas in the floating configuration it is VO - 620 mV where 620 mV approximates VBE of the PNP. The over-voltage hysteresis (VHYSO) is defined: The hysteresis (VHYS) is defined as follows: UVLO only PWM dimming and UVLO 30067359 FIGURE 13. Floating Output OVP Circuitry When "zero current" shutdown and UVLO are implemented together, the EN pin can be used to escape UVLO. The nDIM pin will pull-up to VIN when EN is pulled low, therefore if VIN is within the UVLO hysteretic window when EN is pulled high again, the controller will start-up even though VTURN-ON is not exceeded. www.national.com 16 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 PWM DIMMING The active low nDIM pin can be driven with a PWM signal which controls the main NFET and the dimming FET (dimFET). The brightness of the LEDs can be varied by modulating the duty cycle of this signal. LED brightness is approximately proportional to the PWM signal duty cycle, (i.e. 30% duty cycle ~ 30% LED brightness). This function can be ignored if PWM dimming is not required by using nDIM solely as a VIN UVLO input as described in the Input Under-Voltage Lockout section or by tying it directly to VCC or VIN. When using a series dimFET to PWM dim the LED current, more output capacitance is always better. A general rule of thumb is to use a minimum of 40 µF when PWM dimming. For most applications, this will provide adequate energy storage at the output when the dimFET turns off and opens the LED load. Then when the dimFET is turned back on, the capacitance helps source current into the load, improving the LED current rise time. A minimum on-time must be maintained in order for PWM dimming to operate in the linear region of its transfer function. Because the controller is disabled during dimming, the PWM pulse must be long enough such that the energy intercepted from the input is greater than or equal to the energy being put into the LEDs. For boost and buck-boost regulators, the minimum dimming pulse length in seconds (tPULSE) is: 300673a6 FIGURE 15. PWM Dimming Circuit Figure 15 shows how the PWM signal is applied to nDIM: 1. Connect the dimming MosFET (QDIM) with the drain to the nDIM pin and the source to AGND. Apply an external logic-level PWM signal to the gate of QDIM. 2. Connect the anode of a Schottky diode (DDIM) to the nDIM pin. Apply an inverted external logic-level PWM signal to the cathode of the same diode. The DDRV pin is a PWM output that follows the nDIM PWM input signal. When the nDIM pin rises, the DDRV pin rises and the PWM latch reset signal is removed allowing the main MosFET Q1 to turn on at the beginning of the next clock set pulse. In boost and buck-boost topologies, the DDRV pin is used to control a N-channel MosFET placed in series with the LED load, while it would control a P-channel MosFET in parallel with the load for a buck topology. The series dimFET will open the LED load, when nDIM is low, effectively speeding up the rise and fall times of the LED current. Without any dimFET, the rise and fall times are limited by the inductor slew rate and dimming frequencies above 1 kHz are impractical. Using the series dimFET, dimming frequencies up to 30 kHz are achievable. With a parallel dimFET (buck topology), even higher dimming frequencies are achievable. When using the PWM functionality in a boost regulator, the PWM signal can drive a ground referenced FET. However, with buck-boost and buck topologies, level shifting circuitry is necessary to translate the PWM dim signal to the floating dimFET as shown in Figure 16 and Figure 17. If high side dimming is necessary in a boost regulator using the LM3423, level shifting can be added providing the polarity inverting DPOL pin is pulled low (see LM3423 ONLY: DPOL, FLT, TIMR, and LRDY section) as shown in Figure 18. Even maintaining a dimming pulse greater than tPULSE, preserving linearity at low dimming duty cycles is difficult. The second helpful modification is to remove the CFS capacitor and RFS resistor, eliminating the high frequency compensation pole. This should not affect stability, but it will speed up the response of the CSH pin, specifically at the rising edge of the LED current when PWM dimming, thus improving the achievable linearity at low dimming duty cycles. 300673a0 FIGURE 16. Buck-boost Level-Shifted PWM Circuit 30067331 FIGURE 17. Buck Level-Shifted PWM Circuit 17 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 300673j5 FIGURE 18. Boost Level-Shifted PWM Circuit LM3423 ONLY: DPOL, FLT, TIMR, and LRDY The LM3423 has four additional pins: DPOL, FLT, TIMR, and LRDY. The DPOL pin is simply used to invert the DDRV polarity . If DPOL is left open, then it is internally pulled high and the polarity is correct for driving a series N-channel dimFET. If DPOL is pulled low then the polarity is correct for using a series P-channel dimFET in high-side dimming applications. For a parallel P-channel dimFET, as used in the buck topology, leave DPOL open for proper polarity. Among the LM3423's other additional pins are TIMR and FLT which can be used in conjunction with an input disconnect MosFET switch as shown in Figure 19 to protect the module from various fault conditions. A fault is detected and an 11.5 µA (typical) current is sourced from the TIMR pin whenever any of the following conditions exist: 1. LED current is above regulation by more than 30%. 2. OVLO has engaged. 3. Thermal shutdown has engaged. An external capacitor (CTMR) from TIMR to AGND programs the fault filter time as follows: When the voltage on the TIMR pin reaches 1.24V, the device is latched off and the N-channel MosFET open drain FLT pin transitions to a high impedance state. The TIMR pin will be immediately pulled to ground (reset) if the fault condition is removed at any point during the filter period. Otherwise, if the timer expires, the fault will remain latched until one of three things occurs: 1. The EN pin is pulled low long enough for the VCC pin to drop below 4.1V (approximately 200 ms). 2. The TIMR pin is pulled to ground. 3. A complete power cycle occurs. When using the EN and OVP pins in conjunction with the RPD pull-down pin, a race condition exists when exiting the disabled (EN low) state. When disabled, the OVP pin is pulled up to the output voltage because the RPD pull-down is disabled, and this will appear to be a real OVLO condition. The timer pin will immediately rise and latch the controller to the fault state. To protect against this behavior, a minimum timer capacitor (C TMR = 220pF) should be used. If fault latching is not required, short the TMR pin to AGND which will disable the FLT flag function. The LM3423 also includes an LED Ready (LRDY) flag to notify the system that the LEDs are in proper regulation. The Nchannel MosFET open drain LRDY pin is pulled low whenever any of the following conditions are met: 1. VCC UVLO has engaged. 2. LED current is below regulation by more than 20%. 3. LED current is above regulation by more than 30%. 4. Over-voltage protection has engaged 5. Thermal shutdown has engaged. 6. A fault has latched the device off. Note that the LRDY pin is pulled low during startup of the device and remains low until the LED current is in regulation. 300673j4 FIGURE 19. Fault Detection and LED Status Circuit www.national.com 18 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 Design Considerations This section describes the application level considerations when designing with the LM3421/23. For corresponding calculations, refer to the Design Guide section. INDUCTOR The inductor (L1) is the main energy storage device in a switching regulator. Depending on the topology, energy is stored in the inductor and transfered to the load in different ways (as an example, buck-boost operation is detailed in the Current Regulators section). The size of the inductor, the voltage across it, and the length of the switching subinterval (tON or tOFF) determines the inductor current ripple (ΔiL-PP ). In the design process, L1 is chosen to provide a desired ΔiL-PP. For a buck regulator the inductor has a direct connection to the load, which is good for a current regulator. This requires little to no output capacitance therefore ΔiL-PP is basically equal to the LED ripple current ΔiLED-PP. However, for boost and buck-boost regulators, there is always an output capacitor which reduces ΔiLED-PP, therefore the inductor ripple can be larger than in the buck regulator case where output capacitance is minimal or completely absent. In general, ΔiLED-PP is recommended by manufacturers to be less than 40% of the average LED current (ILED). Therefore, for the buck regulator with no output capacitance, ΔiL-PP should also be less than 40% of ILED. For the boost and buckboost topologies, ΔiL-PP can be much higher depending on the output capacitance value. However, ΔiL-PP is suggested to be less than 100% of the average inductor current (IL) to limit the RMS inductor current. L1 is also suggested to have an RMS current rating at least 25% higher than the calculated minimum allowable RMS inductor current (IL-RMS). LED DYNAMIC RESISTANCE When the load is a string of LEDs, the output load resistance is the LED string dynamic resistance plus RSNS. LEDs are PN junction diodes, and their dynamic resistance shifts as their forward current changes. Dividing the forward voltage of a single LED (VLED) by the forward current (ILED) leads to an incorrect calculation of the dynamic resistance of a single LED (rLED). The result can be 5 to 10 times higher than the true rLED value. Obtaining rLED is accomplished by refering to the manufacturer's LED I-V characteristic. It can be calculated as the slope at the nominal operating point as shown in Figure 20. For any application with more than 2 series LEDs, RSNS can be neglected allowing rD to be approximated as the number of LEDs multiplied by rLED. OUTPUT CAPACITOR For boost and buck-boost regulators, the output capacitor (CO) provides energy to the load when the recirculating diode (D1) is reverse biased during the first switching subinterval. An output capacitor in a buck topology will simply reduce the LED current ripple (ΔiLED-PP) below the inductor current ripple (ΔiL-PP). In all cases, CO is sized to provide a desired ΔiLEDPP. As mentioned in the Inductor section, ΔiLED-PP is recommended by manufacturers to be less than 40% of the average LED current (ILED-PP). CO should be carefully chosen to account for derating due to temperature and operating voltage. It must also have the necessary RMS current rating. Ceramic capacitors are the best choice due to their high ripple current rating, long lifetime, and good temperature performance. An X7R dieletric rating is suggested. INPUT CAPACITORS The input capacitance (CIN) provides energy during the discontinuous portions of the switching period. For buck and buck-boost regulators, CIN provides energy during tON and during tOFF, the input voltage source charges up CIN with the average input current (IIN). For boost regulators, CIN only needs to provide the ripple current due to the direct connection to the inductor. CIN is selected given the maximum input voltage ripple (ΔvIN-PP) which can be tolerated. ΔvIN-PP is suggested to be less than 10% of the input voltage (VIN). An input capacitance at least 100% greater than the calculated CIN value is recommended to account for derating due to temperature and operating voltage. When PWM dimming, even more capacitance can be helpful to minimize the large current draw from the input voltage source during the rising transistion of the LED current waveform. The chosen input capacitors must also have the necessary RMS current rating. Ceramic capacitors are again the best choice due to their high ripple current rating, long lifetime, and good temperature performance. An X7R dieletric rating is suggested. For most applications, it is recommended to bypass the VIN pin with an 0.1 µF ceramic capacitor placed as close as possible to the pin. In situations where the bulk input capacitance may be far from the LM3421/23 device, a 10 Ω series resistor can be placed between the bulk input capacitance and the bypass capacitor, creating a 150 kHz filter to eliminate undesired high frequency noise. 30067374 FIGURE 20. Dynamic Resistance 19 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 MAIN MosFET / DIMMING MosFET The LM3421/23 requires an external NFET (Q1) as the main power MosFET for the switching regulator. Q1 is recommended to have a voltage rating at least 15% higher than the maximum transistor voltage to ensure safe operation during the ringing of the switch node. In practice, all switching regulators have some ringing at the switch node due to the diode parasitic capacitance and the lead inductance. The current rating is recommended to be at least 10% higher than the average transistor current. The power rating is then verified by calculating the power loss given the RMS transistor current and the NFET on-resistance (RDS-ON). When PWM dimming, the LM3421/23 requires another MosFET (Q2) placed in series (or parallel for a buck regulator) with the LED load. This MosFET should have a voltage rating equal to the output voltage (VO) and a current rating at least 10% higher than the nominal LED current (ILED) . The power rating is simply VO multiplied by ILED, assuming 100% dimming duty cycle (continuous operation) will occur. In general, the NFETs should be chosen to minimize total gate charge (Qg) when fSW is high and minimize RDS-ON otherwise. This will minimize the dominant power losses in the system. Frequently, higher current NFETs in larger packages are chosen for better thermal performance. RE-CIRCULATING DIODE A re-circulating diode (D1) is required to carry the inductor current during tOFF. The most efficient choice for D1 is a Schottky diode due to low forward voltage drop and near-zero reverse recovery time. Similar to Q1, D1 is recommended to have a voltage rating at least 15% higher than the maximum transistor voltage to ensure safe operation during the ringing of the switch node and a current rating at least 10% higher than the average diode current. The power rating is verified by calculating the power loss through the diode. This is accomplished by checking the typical diode forward voltage from the I-V curve on the product datasheet and multiplying by the average diode current. In general, higher current diodes have a lower forward voltage and come in better performing packages minimizing both power losses and temperature rise. BOOST INRUSH CURRENT When configured as a boost converter, there is a “phantom” power path comprised of the inductor, the output diode, and the output capacitor. This path will cause two things to happen when power is applied. First, there will be a very large inrush of current to charge the output capacitor. Second, the energy stored in the inductor during this inrush will end up in the output capacitor, charging it to a higher potential than the input voltage. Depending on the state of the EN pin, the output capacitor would be discharged by: 1. EN < 1.3V: no discharge path (leakage only). 2. EN > 1.3V, the OVP divider resistor path, if present, and 10µA into each of the HSP & HSN pins. In applications using the OVP divider and with EN > 1.3V, the output capacitor voltage can charge higher than VTURN-OFF. In this situation, the FLT pin (LM3423 only) is open and the PWM dimming MosFET is turned off. This condition (the system appearing disabled) can persist for an undesirably long time. Possible solutions to this condition are: • Add an inrush diode from VIN to the output as shown in Figure 21. • Add an NTC thermistor in series with the input to prevent the inrush from overcharging the output capacitor too high. • Use a current limited source supply. • Raise the OVP threshold. 300673i9 FIGURE 21. Boost Topology with Inrush Diode CIRCUIT LAYOUT The performance of any switching regulator depends as much upon the layout of the PCB as the component selection. Following a few simple guidelines will maximimize noise rejection and minimize the generation of EMI within the circuit. Discontinuous currents are the most likely to generate EMI, therefore care should be taken when routing these paths. The main path for discontinuous current in the LM3421/23 buck regulator contains the input capacitor (CIN), the recirculating diode (D1), the N-channel MosFET (Q1), and the sense resistor (RLIM). In the LM3421/23 boost regulator, the discontinuous current flows through the output capacitor (CO), D1, Q1, and RLIM. In the buck-boost regulator both loops are discontinuous and should be carefully layed out. These loops should be kept as small as possible and the connections between all the components should be short and thick to minimize parasitic inductance. In particular, the switch node (where L1, D1 and Q1 connect) should be just large enough to connect the components. To minimize excessive heating, large copper pours can be placed adjacent to the short current path of the switch node. The RT, COMP, CSH, IS, HSP and HSN pins are all highimpedance inputs which couple external noise easily, therefore the loops containing these nodes should be minimized whenever possible. In some applications the LED or LED array can be far away (several inches or more) from the LM3421/23, or on a separate PCB connected by a wiring harness. When an output capacitor is used and the LED array is large or separated from the rest of the regulator, the output capacitor should be placed close to the LEDs to reduce the effects of parasitic inductance on the AC impedance of the capacitor. www.national.com 20 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 Basic Topology Schematics BOOST REGULATOR (VIN < VO) 30067322 21 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 BUCK REGULATOR (VIN > VO) 30067351 www.national.com 22 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 30067350 BUCK-BOOST REGULATOR 23 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 Design Guide Refer to Basic Topology Schematics section. SPECIFICATIONS Number of series LEDs: N Single LED forward voltage: VLED Single LED dynamic resistance: rLED Nominal input voltage: VIN Input voltage range: VIN-MAX, VIN-MIN Switching frequency: fSW Current sense voltage: VSNS Average LED current: ILED Inductor current ripple: ΔiL-PP LED current ripple: ΔiLED-PP Peak current limit: ILIM Input voltage ripple: ΔvIN-PP Output OVLO characteristics: VTURN-OFF, VHYSO Input UVLO characteristics: VTURN-ON, VHYS 1. OPERATING POINT Given the number of series LEDs (N), the forward voltage (VLED) and dynamic resistance (rLED) for a single LED, solve for the nominal output voltage (VO) and the nominal LED string dynamic resistance (rD): Buck (Constant Ripple vs. VO) Boost and Buck-boost 3. AVERAGE LED CURRENT For all topologies, set the average LED current (ILED) knowing the desired current sense voltage (VSNS) and solving for RSNS: If the calculated RSNS is too far from a desired standard value, then VSNS will have to be adjusted to obtain a standard value. Setup the suggested signal current of 100 µA by assuming RCSH = 12.4 kΩ and solving for RHSP: If the calculated RHSP is too far from a desired standard value, then RCSH can be adjusted to obtain a standard value. 4. INDUCTOR RIPPLE CURRENT Set the nominal inductor ripple current (ΔiL-PP) by solving for the appropriate inductor (L1): Buck Solve for the ideal nominal duty cycle (D): Buck Boost Boost and Buck-boost Buck-boost To set the worst case inductor ripple current, use VIN-MAX and DMIN when solving for L1. The minimum allowable inductor RMS current rating (IL-RMS) can be calculated as: Buck Using the same equations, find the minimum duty cycle (DMIN) using maximum input voltage (VIN-MAX) and the maximum duty cycle (DMAX) using the minimum input voltage (VINMIN). Also, remember that D' = 1 - D. 2. SWITCHING FREQUENCY Set the switching frequency (fSW) by assuming a CT value of 1 nF and solving for RT: Buck (Constant Ripple vs. VIN) Boost and Buck-boost www.national.com 24 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 5. LED RIPPLE CURRENT Set the nominal LED ripple current (ΔiLED-PP), by solving for the output capacitance (CO): Buck Where the pole (ωP1) is approximated: Buck Boost Boost and Buck-boost Buck-boost To set the worst case LED ripple current, use DMAX when solving for C O. Remember, when PWM dimming it is recommended to use a minimum of 40 µF of output capacitance to improve performance. The minimum allowable RMS output capacitor current rating (ICO-RMS) can be approximated: Buck Buck-boost And the RHP zero (ωZ1) is approximated: Boost Boost and Buck-boost And the uncompensated DC loop gain (TU0) is approximated: Buck 6. PEAK CURRENT LIMIT Set the peak current limit (ILIM) by solving for the transistor path sense resistor (RLIM): Boost 7. LOOP COMPENSATION Using a simple first order peak current mode control model, neglecting any output capacitor ESR dynamics, the necessary loop compensation can be determined. First, the uncompensated loop gain (T U) of the regulator can be approximated: Buck Buck-boost For all topologies, the primary method of compensation is to place a low frequency dominant pole (ωP2) which will ensure that there is ample phase margin at the crossover frequency. This is accomplished by placing a capacitor (CCMP) from the COMP pin to AGND, which is calculated according to the lower value of the pole and the RHP zero of the system (shown as a minimizing function): Boost and Buck-boost If analog dimming is used, CCMP should be approximately 4x larger to maintain stability as the LEDs are dimmed to zero. 25 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 A high frequency compensation pole (ωP3) can be used to attenuate switching noise and provide better gain margin. Assuming RFS = 10Ω, CFS is calculated according to the higher value of the pole and the RHP zero of the system (shown as a maximizing function): Buck-boost 9. NFET The NFET voltage rating should be at least 15% higher than the maximum NFET drain-to-source voltage (VT-MAX): Buck The total system loop gain (T) can then be written as: Boost Buck Buck-boost Boost and Buck-boost The current rating should be at least 10% higher than the maximum average NFET current (IT-MAX): Buck Boost and Buck-boost 8. INPUT CAPACITANCE Set the nominal input voltage ripple (ΔvIN-PP) by solving for the required capacitance (CIN): Buck Approximate the nominal RMS transistor current (IT-RMS) : Buck Boost Boost and Buck-boost Buck-boost Given an NFET with on-resistance (RDS-ON), solve for the nominal power dissipation (PT): Use DMAX to set the worst case input voltage ripple, when solving for CIN in a buck-boost regulator and DMID = 0.5 when solving for CIN in a buck regulator. The minimum allowable RMS input current rating (ICIN-RMS) can be approximated: Buck 10. DIODE The Schottky diode voltage rating should be at least 15% higher than the maximum blocking voltage (VRD-MAX): Buck Boost Boost Buck-boost www.national.com 26 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 The current rating should be at least 10% higher than the maximum average diode current (ID-MAX): Buck To set VTURN-ON, solve for RUV1: Boost and Buck-boost Method #2: If PWM dimming is required, a three resistor network is suggested. To set VTURN-ON, assume RUV2 = 10 kΩ and solve for RUV1 as in Method #1. To set VHYS, solve for RUVH: Replace DMAX with D in the ID-MAX equation to solve for the average diode current (ID). Given a diode with forward voltage (VFD), solve for the nominal power dissipation (PD): 13. PWM DIMMING METHOD PWM dimming can be performed several ways: Method #1: Connect the dimming MosFET (Q3) with the drain to the nDIM pin and the source to AGND. Apply an external PWM signal to the gate of QDIM. A pull down resistor may be necessary to properly turn off Q3. Method #2: Connect the anode of a Schottky diode to the nDIM pin. Apply an external inverted PWM signal to the cathode of the same diode. The DDRV pin should be connected to the gate of the dimFET with or without level-shifting circuitry as described in the PWM Dimming section. The dimFET should be rated to handle the average LED current and the nominal output voltage. 14. ANALOG DIMMING METHOD Analog dimming can be performed several ways: Method #1: Place a potentiometer in series with the RCSH resistor to dim the LED current from the nominal ILED to near zero. Method #2: Connect a controlled current source as detailed in the Analog Dimming section to the CSH pin. Increasing the current sourced into the CSH node will decrease the LEDs from the nominal ILED to zero current in the same manner as the thermal foldback circuit. 11. OUTPUT OVLO For boost and buck-boost regulators, output OVLO is programmed with the turn-off threshold voltage (VTURN-OFF) and the desired hysteresis (VHYSO). To set VHYSO, solve for ROV2: To set VTURN-OFF, solve for ROV1: Boost Buck-boost A small filter capacitor (COVP = 47 pF) should be added from the OVP pin to ground to reduce coupled switching noise. 12. INPUT UVLO For all topologies, input UVLO is programmed with the turnon threshold voltage (VTURN-ON) and the desired hysteresis (VHYS). Method #1: If no PWM dimming is required, a two resistor network can be used. To set VHYS, solve for RUV2: 27 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 Design Example DESIGN #1 - LM3421 BUCK-BOOST Application 300673i1 SPECIFICATIONS N=6 VLED = 3.5V rLED = 325 mΩ VIN = 24V VIN-MIN = 10V VIN-MAX = 70V fSW = 500 kHz VSNS = 100 mV ILED = 1A ΔiL-PP = 700 mA ΔiLED-PP = 12 mA ΔvIN-PP = 100 mV ILIM = 6A VTURN-ON = 10V VHYS = 3V VTURN-OFF = 40V VHYSO = 10V www.national.com 28 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 1. OPERATING POINT Solve for VO and rD: 4. INDUCTOR RIPPLE CURRENT Solve for L1: Solve for D, D', DMAX, and DMIN: The closest standard inductor is 33 µH therefore ΔiL-PP is: Determine minimum allowable RMS current rating: 2. SWITCHING FREQUENCY Assume CT = 1 nF and solve for RT: The chosen component from step 4 is: The closest standard resistor is 49.9 kΩ therefore fSW is: 5. OUTPUT CAPACITANCE Solve for CO: The chosen component from step 2 is: 3. AVERAGE LED CURRENT Solve for RSNS: The closest capacitance totals 40 µF therefore ΔiLED-PP is: Assume RCSH = 12.4 kΩ and solve for RHSP: Determine minimum allowable RMS current rating: The closest standard resistor for RSNS is actually 0.1Ω and for RHSP is actually 1 kΩ therefore ILED is: The chosen components from step 5 are: The chosen components from step 3 are: 29 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 6. PEAK CURRENT LIMIT Solve for RLIM: The closest standard resistor is 0.04 Ω therefore ILIM is: 8. INPUT CAPACITANCE Solve for the minimum CIN: The chosen component from step 6 is: 7. LOOP COMPENSATION ωP1 is approximated: To minimize power supply interaction a 200% larger capacitance of approximately 20 µF is used, therefore the actual ΔvIN-PP is much lower. Since high voltage ceramic capacitor selection is limited, four 4.7 µF X7R capacitors are chosen. Determine minimum allowable RMS current rating: The chosen components from step 8 are: ωZ1 is approximated: 9. NFET Determine minimum Q1 voltage rating and current rating: TU0 is approximated: To ensure stability, calculate ωP2: A 100V NFET is chosen with a current rating of 32A due to the low RDS-ON = 50 mΩ. Determine IT-RMS and PT: Solve for CCMP: The chosen component from step 9 is: To attenuate switching noise, calculate ωP3: 10. DIODE Determine minimum D1 voltage rating and current rating: Assume RFS = 10Ω and solve for CFS: A 100V diode is chosen with a current rating of 12A and VD = 600 mV. Determine PD: The chosen components from step 7 are: www.national.com 30 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 The chosen component from step 10 is: 12. OUTPUT OVLO Solve for ROV2: 11. INPUT UVLO Solve for RUV2: The closest standard resistor is 432 kΩ therefore VHYSO is: The closest standard resistor is 130 kΩ therefore VHYS is: Solve for ROV1: Solve for RUV1: The closest standard resistor is 13.7 kΩ making VTURN-OFF: The closest standard resistor is 18.2 kΩ making VTURN-ON: The chosen components from step 12 are: The chosen components from step 11 are: 31 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 DESIGN #1 Bill of Materials Qty 1 1 1 1 4 4 1 1 1 1 1 1 1 1 2 1 1 1 1 1 1 1 Part ID LM3421 CBYP CCMP CFS CIN CO COV CT D1 L1 Q1 Q2 RCSH RFS RHSP, RHSN RLIM ROV1 ROV2 RSNS RT RUV1 RUV2 Part Value Buck-boost controller 2.2 µF X7R 10% 16V 0.33 µF X7R 10% 25V 0.27 µF X7R 10% 25V 4.7 µF X7R 10% 100V 10 µF X7R 10% 50V 47 pF COG/NPO 5% 50V Schottky 100V 12A 33 µH 20% 6.3A NMOS 100V 32A PNP 150V 600 mA 12.4 kΩ 1% 10Ω 1% 1.0 kΩ 1% 0.04Ω 1% 1W 13.7 kΩ 1% 432 kΩ 1% 0.1Ω 1% 1W 49.9 kΩ 1% 18.2 kΩ 1% 130 kΩ 1% Manufacturer NSC MURATA MURATA MURATA TDK TDK AVX VISHAY COILCRAFT FAIRCHILD FAIRCHILD VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY Part Number LM3421MH GRM21BR71C225KA12L GRM21BR71E334KA01L GRM21BR71E274KA01L C5750X7R2A475K C4532X7R1H106K 08055A470JAT2A GRM2165C1H102JA01D 12CWQ10FNPBF MSS1278-333MLB FDD3682 MMBT5401 CRCW080512K4FKEA CRCW080510R0FKEA CRCW08051K00FKEA WSL2512R0400FEA CRCW080513K7FKEA CRCW0805432KFKEA WSL2512R1000FEA CRCW080549K9FKEA CRCW080518K2FKEA CRCW0805130KFKEA 1000 pF COG/NPO 5% 50V MURATA www.national.com 32 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 Applications Information The following designs are provided as reference circuits. For a specific design, the steps in the Design Procedure section should be performed. In all designs, an RC filter (0.1 µF, 10Ω) is recommended at VIN placed as close as possible to the LM3421/23 device. This filter is not shown in the following designs. DESIGN #2 - LM3421 BOOST Application 300673h5 Features • • • • Input: 8V to 28V Output: 9 LEDs at 1A PWM Dimming up to 30kHz 700 kHz Switching Frequency 33 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 DESIGN #2 Bill of Materials Qty 1 1 1 0 4 4 1 1 2 1 2 1 2 1 2 1 1 1 1 1 1 1 Part ID LM3421 CBYP CCMP CFS CIN CO COV CT D1, D2 L1 Q1, Q2 Q3 RCSH, ROV1 RFS RHSP, RHSN RLIM ROV2 RSNS RUV2 RT RUV1 RUVH Part Value Boost controller 2.2 µF X7R 10% 16V 0.1 µF X7R 10% 25V DNP 4.7 µF X7R 10% 100V 10 µF X7R 10% 50V 47 pF COG/NPO 5% 50V Schottky 60V 5A 33 µH 20% 6.3A NMOS 60V 8A NMOS 60V 115mA 12.4 kΩ 1% 0Ω 1% 1.0 kΩ 1% 0.06Ω 1% 1W 499 kΩ 1% 0.1Ω 1% 1W 10.0 kΩ 1% 35.7 kΩ 1% 1.82 kΩ 1% 17.8 kΩ 1% TDK TDK AVX COMCHIP COILCRAFT VISHAY ON-SEMI VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY C5750X7R2A475K C4532X7R1H106K 08055A470JAT2A GRM2165C1H102JA01D CDBC560-G MSS1278-333MLB SI4436DY 2N7002ET1G CRCW080512K4FKEA CRCW08050000Z0EA CRCW08051K00FKEA WSL2512R0600FEA CRCW0805499KFKEA WSL2512R1000FEA CRCW080510K0FKEA CRCW080535K7FKEA CRCW08051K82FKEA CRCW080517K8FKEA Manufacturer NSC MURATA MURATA Part Number LM3421MH GRM21BR71C225KA12L GRM21BR71E104KA01L 1000 pF COG/NPO 5% 50V MURATA www.national.com 34 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 DESIGN #3 - LM3421 BUCK-BOOST Application 300673h6 Features • • • • • Input: 10V to 30V Output: 4 LEDs at 2A PWM Dimming up to 10kHz Analog Dimming 600 kHz Switching Frequency 35 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 DESIGN #3 Bill of Materials Qty 1 1 1 3 1 0 4 4 1 1 1 1 1 2 1 1 1 1 1 1 1 1 1 2 1 1 1 1 1 1 1 1 1 1 Part ID LM3421 CB CBYP CCMP, CREF, CSS CF CFS CIN CO COV CT D1 D2 L1 Q1, Q2 Q3 Q4 Q5 Q6 Q7 RCSH RF RFS RUV2 RHSP, RHSN RLIM ROV1 ROV2 RPOT RPU RSER RSNS RT RUV1 RUVH Part Value Buck-boost controller 100 pF COG/NPO 5% 50V 2.2 µF X7R 10% 16V 1 µF X7R 10% 25V 0.1 µF X7R 10% 25V DNP 6.8 µF X7R 10% 50V 10 µF X7R 10% 50V 47 pF COG/NPO 5% 50V Schottky 100V 12A Zener 10V 500mA 22 µH 20% 7.2A NMOS 60V 8A NMOS 60V 260mA PNP 40V 200 mA PNP 150V 600 mA NPN 300V 600 mA NPN 40V 200 mA 12.4 kΩ 1% 10Ω 1% 0Ω 1% 10.0 kΩ 1% 1.0 kΩ 1% 0.04Ω 1% 1W 18.2 kΩ 1% 499 kΩ 1% 1 MΩ potentiometer 4.99 kΩ 1% 499Ω 1% 0.05Ω 1% 1W 41.2 kΩ 1% 1.43 kΩ 1% 17.4 kΩ 1% TDK TDK AVX VISHAY ON-SEMI COILCRAFT VISHAY ON-SEMI FAIRCHILD FAIRCHILD FAIRCHILD FAIRCHILD VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY BOURNS VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY C5750X7R1H685K C4532X7R1H106K 08055A470JAT2A GRM2165C1H102JA01D 12CWQ10FNPBF BZX84C10LT1G MSS1278-223MLB SI4436DY 2N7002ET1G MMBT5087 MMBT5401 MMBTA42 MMBT6428 CRCW080512K4FKEA CRCW080510R0FKEA CRCW08050000Z0EA CRCW080510K0FKEA CRCW08051K00FKEA WSL2512R0400FEA CRCW080518K2FKEA CRCW0805499KFKEA 3352P-1-105 CRCW08054K99FKEA CRCW0805499RFKEA WSL2512R0500FEA CRCW080541K2FKEA CRCW08051K43FKEA CRCW080517K4FKEA Manufacturer NSC MURATA MURATA MURATA MURATA Part Number LM3421MH GRM2165C1H101JA01D GRM21BR71C225KA12L GRM21BR71E105KA01L GRM21BR71E104KA01L 1000 pF COG/NPO 5% 50V MURATA www.national.com 36 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 DESIGN #4 - LM3423 BOOST Application 300673h7 Features • • • • • • Input: 18V to 38V Output: 12 LEDs at 700mA High Side PWM Dimming up to 30 kHz Analog Dimming Zero Current Shutdown 700 kHz Switching Frequency 37 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 DESIGN #4 Bill of Materials Qty 1 1 1 1 4 4 1 1 2 1 1 1 1 1 1 1 1 1 1 2 1 3 1 1 1 1 1 1 1 Part ID LM3423 CBYP CCMP CFS CIN CO COV CT D1, D2 D3 L1 Q1 Q2 Q3 Q4, Q5 (dual pack) Q6 Q7 RADJ RBIAS2 RCSH, ROV1 RFS RHSP, RHSN, RMAX RLIM ROV2 RSNS RT RUV1 RUV2 RUVH Part Value Boost controller 2.2 µF X7R 10% 16V 1 µF X7R 10% 25V 0.1 µF X7R 10% 25V 4.7 µF X7R 10% 100V 10 µF X7R 10% 50V 47 pF COG/NPO 5% 50V Schottky 60V 5A Zener 10V 500mA 47 µH 20% 5.3A NMOS 60V 8A PMOS 70V 5.7A NMOS 60V 260mA Dual PNP 40V 200mA NPN 300V 600mA NPN 40V 200 mA 100 kΩ potentiometer 17.4 kΩ 1% 12.4 kΩ 1% 10Ω 1% 1.0 kΩ 1% 0.06Ω 1% 1W 499 kΩ 1% 0.15Ω 1% 1W 35.7 kΩ 1% 1.43 kΩ 1% 10.0 kΩ 1% 16.9 kΩ 1% Manufacturer NSC MURATA MURATA MURATA TDK TDK AVX COMCHIP ON-SEMI COILCRAFT VISHAY ZETEX ON-SEMI FAIRCHILD FAIRCHILD FAIRCHILD BOURNS VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY Part Number LM3423MH GRM21BR71C225KA12L GRM21BR71E105KA01L GRM21BR71E104KA01L C5750X7R2A475K C4532X7R1H106K 08055A470JAT2A GRM2165C1H102JA01D CDBC560-G BZX84C10LT1G MSS1278-473MLB SI4436DY ZXMP7A17K 2N7002ET1G FFB3906 MMBTA42 MMBT3904 3352P-1-104 CRCW080517K4FKEA CRCW080512K4FKEA CRCW080510R0FKEA CRCW08051K00FKEA WSL2512R0600FEA CRCW0805499KFKEA WSL2512R1500FEA CRCW080535K7FKEA CRCW08051K43FKEA CRCW080510K0FKEA CRCW080516K9FKEA 1000 pF COG/NPO 5% 50V MURATA www.national.com 38 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 DESIGN #5 - LM3421 BUCK-BOOST Application 300673h9 Features • • • • • • Input: 10V to 70V Output: 6 LEDs at 500mA PWM Dimming up to 10 kHz Slow Fade Out MosFET RDS-ON Sensing 700 kHz Switching Frequency 39 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 DESIGN #5 Bill of Materials Qty 1 1 1 1 1 0 4 4 1 1 1 1 1 2 1 2 1 1 2 1 1 1 2 1 1 1 1 1 1 1 1 Part ID LM3421 CB CBYP CCMP CF CFS CIN CO COV CT D1 D2 L1 Q1, Q2 Q3 Q4, Q8 Q5 Q6 Q7, Q9 RCSH RFS RUV2 RHSP, RHSN ROV1 ROV2 RPU RSER RSNS RT RUV1 RUVH Part Value Buck-boost controller 100 pF COG/NPO 5% 50V 2.2 µF X7R 10% 16V 1 µF X7R 10% 25V 0.1 µF X7R 10% 25V DNP 4.7 µF X7R 10% 100V 10 µF X7R 10% 50V 47 pF COG/NPO 5% 50V Schottky 100V 12A Zener 10V 500mA 68 µH 20% 4.3A NMOS 100V 32A NMOS 60V 260mA PNP 40V 200mA PNP 150V 600 mA NPN 300V 600mA NPN 40V 200mA 12.4 kΩ 1% 0Ω 1% 10.0 kΩ 1% 1.0 kΩ 1% 15.8 kΩ 1% 499 kΩ 1% 4.99 kΩ 1% 499Ω 1% 0.2Ω 1% 1W 35.7 kΩ 1% 1.43 kΩ 1% 17.4 kΩ 1% TDK TDK AVX VISHAY ON-SEMI COILCRAFT FAIRCHILD ON-SEMI FAIRCHILD FAIRCHILD FAIRCHILD FAIRCHILD VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY C5750X7R2A475K C4532X7R1H106K 08055A470JAT2A GRM2165C1H102JA01D 12CWQ10FNPBF BZX84C10LT1G MSS1278-683MLB FDD3682 2N7002ET1G MMBT5087 MMBT5401 MMBTA42 MMBT6428 CRCW080512K4FKEA CRCW08050000Z0EA CRCW080510K0FKEA CRCW08051K00FKEA CRCW080515K8FKEA CRCW0805499KFKEA CRCW08054K99FKEA CRCW0805499RFKEA WSL2512R2000FEA CRCW080535K7FKEA CRCW08051K43FKEA CRCW080517K4FKEA Manufacturer NSC MURATA MURATA MURATA MURATA Part Number LM3421MH GRM2165C1H101JA01D GRM21BR71C225KA12L GRM21BR71E105KA01L GRM21BR71E104KA01L 1000 pF COG/NPO 5% 50V MURATA www.national.com 40 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 DESIGN #6 - LM3423 BUCK Application 300673h8 Features • • • • • • Input: 15V to 50V Output: 3 LEDs at 1.25A PWM Dimming up to 50 kHz LED Status Indicator Zero Current Shutdown 700 kHz Switching Frequency 41 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 DESIGN #6 Bill of Materials Qty 1 1 2 0 4 0 1 1 1 1 1 1 1 1 1 1 1 2 1 1 1 3 1 1 1 Part ID LM3423 CBYP CCMP, CDIM CFS CIN CO COV CT D1 D2 L1 Q1 Q2 Q3 Q4 RCSH RFS RHSP, RHSN RLIM ROV1 ROV2 RPU, RPU2, RUV2 RT RSNS RUV1 Part Value Buck controller 2.2 µF X7R 10% 16V 0.1 µF X7R 10% 25V DNP 4.7 µF X7R 10% 100V DNP 47 pF COG/NPO 5% 50V Schottky 100V 12A Zener 10V 500mA 22 µH 20% 7.3A NMOS 60V 8A PMOS 30V 6.2A NMOS 60V 115mA PNP 150V 600 mA 12.4 kΩ 1% 0Ω 1% 1.0 kΩ 1% 0.04Ω 1% 1W 21.5 kΩ 1% 499 kΩ 1% 100 kΩ 1% 35.7 kΩ 1% 0.08Ω 1% 1W 11.5 kΩ 1% AVX VISHAY ON-SEMI COILCRAFT VISHAY VISHAY ON-SEMI FAIRCHILD VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY 08055A470JAT2A GRM2165C1H102JA01D 12CWQ10FNPBF BZX84C10LT1G MSS1278-223MLB SI4436DY SI3483DV 2N7002ET1G MMBT5401 CRCW080512K4FKEA CRCW08050000OZEA CRCW08051K00FKEA WSL2512R0400FEA CRCW080521K5FKEA CRCW0805499KFKEA CRCW0805100KFKEA CRCW080535K7FKEA WSL2512R0800FEA CRCW080511K5FKEA 1000 pF COG/NPO 5% 50V MURATA TDK C5750X7R2A475K Manufacturer NSC MURATA MURATA Part Number LM3423MH GRM21BR71C225KA12L GRM21BR71E104KA01L www.national.com 42 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 DESIGN #7 - LM3423 BUCK-BOOST Application 300673i0 Features • • • • • Input: 15V to 60V Output: 8 LEDs at 2.5A Fault Input Disconnect Zero Current Shutdown 500 kHz Switching Frequency 43 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 DESIGN #7 Bill of Materials Qty 1 1 1 1 4 4 1 1 1 1 1 1 1 1 1 2 1 2 2 2 1 1 1 1 1 Part ID LM3423 CBYP CCMP CFS CIN CO COV CT CTMR D1 D2 L1 Q1 Q2 Q5 RCSH, ROV1 RFS RFLT, RPU2 RHSP, RHSN RLIM, RSNS ROV1 ROV2 RT RUV1 RUV2 Part Value Buck-boost controller 2.2 µF X7R 10% 16V 0.33 µF X7R 10% 25V 0.1 µF X7R 10% 25V 4.7 µF X7R 10% 100V 10 µF X7R 10% 50V 47 pF COG/NPO 5% 50V 220 pF COG/NPO 5% 50V Schottky 100V 12A Zener 10V 500mA 22 µH 20% 7.2A NMOS 100V 32A PMOS 70V 5.7A PNP 150V 600 mA 12.4 kΩ 1% 10Ω 1% 100 kΩ 1% 1.0 kΩ 1% 0.04Ω 1% 1W 15.8 kΩ 1% 499 kΩ 1% 49.9 kΩ 1% 13.7 kΩ 1% 150 kΩ 1% Manufacturer NSC MURATA MURATA MURATA TDK TDK AVX MURATA VISHAY ON-SEMI COILCRAFT FAIRCHILD ZETEX FAIRCHILD VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY Part Number LM3423MH GRM21BR71C225KA12L GRM21BR71E334KA01L GRM21BR71E104KA01L C5750X7R2A475K C4532X7R1H106K 08055A470JAT2A GRM2165C1H102JA01D GRM2165C1H221JA01D 12CWQ10FNPBF BZX84C10LT1G MSS1278-223MLB FDD3682 ZXMP7A17K MMBT5401 CRCW080512K4FKEA CRCW080510R0FKEA CRCW0805100KFKEA CRCW08051K00FKEA WSL2512R0400FEA CRCW080515K8FKEA CRCW0805499KFKEA CRCW080549K9FKEA CRCW080513K7FKEA CRCW0805150KFKEA 1000 pF COG/NPO 5% 50V MURATA www.national.com 44 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 DESIGN #8 - LM3421 SEPIC Application 300673i8 Features • • • • Input: 9V to 36V Output: 5 LEDs at 750mA PWM Dimming up to 30 kHz 500 kHz Switching Frequency 45 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 DESIGN #8 Bill of Materials Qty 1 1 1 0 4 4 1 1 1 1 2 2 1 1 1 2 1 1 1 2 1 1 1 1 1 Part ID LM3421 CBYP CCMP CFS CIN CO CSEP COV CT D1 L1, L2 Q1, Q2 Q3 RCSH RFS RHSP, RHSN RLIM ROV1 ROV2 RREF1, RREF2 RSNS RT RUV1 RUV2 RUVH Part Value SEPIC controller 2.2 µF X7R 10% 16V 0.47 µF X7R 10% 25V DNP 4.7 µF X7R 10% 100V 10 µF X7R 10% 50V 1.0 µF X7R 10% 100V 47 pF COG/NPO 5% 50V Schottky 60V 5A 68 µH 20% 4.3A NMOS 60V 8A NMOS 60V 115 mA 12.4 kΩ 1% 0Ω 1% 750Ω 1% 0.04Ω 1% 1W 15.8 kΩ 1% 499 kΩ 1% 49.9 kΩ 1% 0.1Ω 1% 1W 49.9 kΩ 1% 1.62 kΩ 1% 10.0 kΩ 1% 16.9 kΩ 1% TDK TDK TDK AVX COMCHIP COILCRAFT VISHAY ON-SEMI VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY VISHAY C5750X7R2A475K C4532X7R1H106K C4532X7R2A105K 08055A470JAT2A GRM2165C1H102JA01D CDBC560-G DO3340P-683 SI4436DY 2N7002ET1G CRCW080512K4FKEA CRCW08050000OZEA CRCW0805750RFKEA WSL2512R0400FEA CRCW080515K8FKEA CRCW0805499KFKEA CRCW080549K9FKEA WSL2512R1000FEA CRCW080549K9FKEA CRCW08051K62FKEA CRCW080510K0FKEA CRCW080516K9FKEA Manufacturer NSC MURATA MURATA Part Number LM3421MH GRM21BR71C225KA12L GRM21BR71E474KA01L 1000 pF COG/NPO 5% 50V MURATA www.national.com 46 LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 Physical Dimensions inches (millimeters) unless otherwise noted TSSOP-16 Pin EP Package (MXA) For Ordering, Refer to Ordering Information Table NS Package Number MXA16A TSSOP-20 Pin EP Package (MXA) For Ordering, Refer to Ordering Information Table NS Package Number MXA20A 47 www.national.com LM3421 LM3421Q1 LM3421Q0 LM3423 LM3423Q1 LM3423Q0 N-Channel Controllers for Constant Current LED Drivers Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: www.national.com Products Amplifiers Audio Clock and Timing Data Converters Interface LVDS Power Management Switching Regulators LDOs LED Lighting Voltage References PowerWise® Solutions Temperature Sensors PLL/VCO www.national.com/amplifiers www.national.com/audio www.national.com/timing www.national.com/adc www.national.com/interface www.national.com/lvds www.national.com/power www.national.com/switchers www.national.com/ldo www.national.com/led www.national.com/vref www.national.com/powerwise WEBENCH® Tools App Notes Reference Designs Samples Eval Boards Packaging Green Compliance Distributors Quality and Reliability Feedback/Support Design Made Easy Design Support www.national.com/webench www.national.com/appnotes www.national.com/refdesigns www.national.com/samples www.national.com/evalboards www.national.com/packaging www.national.com/quality/green www.national.com/contacts www.national.com/quality www.national.com/feedback www.national.com/easy www.national.com/solutions www.national.com/milaero www.national.com/solarmagic www.national.com/training Applications & Markets Mil/Aero PowerWise® Design University Serial Digital Interface (SDI) www.national.com/sdi www.national.com/wireless www.national.com/tempsensors SolarMagic™ THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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