LM3700/LM3701 Microprocessor Supervisory Circuit with Low Line Output
June 2002
LM3700/LM3701 Microprocessor Supervisory Circuit with Low Line Output
General Description
The LM3700/LM3701 series of microprocessor supervisory circuits provide the maximum flexibility for monitoring power supplies and battery controlled functions in systems without backup batteries. The LM3700/LM3701 series are available in a 9-bump micro SMD package. Built-in features include the following: Reset: Reset is asserted during power-up, power-down, and brownout conditions. RESET is guaranteed down to VCC of 1.0V. Low Line Output: This early power failure warning indicator goes low when the supply voltage drops to a value which is 2% higher than the reset threshold voltage. n n n n n n n No external components required RESET (LM3700) or RESET (LM3701) outputs Precision supply voltage monitor Factory programmable Reset Timeout Delay Available in micro SMD package for minimum footprint ± 0.5% Reset threshold accuracy at room temperature ± 2% Reset threshold accuracy over temperature extremes n Reset assertion down to 1V VCC (RESET option only) n 28 µA VCC supply current
Applications
n n n n Embedded Controllers and Processors Intelligent Instruments Automotive Systems Critical µP Power Monitoring
Features
n Standard Reset Threshold voltage: 3.08V n Custom Reset Threshold voltages: For other voltages between 2.2V and 5.0V in 10mV increments, contact National Semiconductor Corp.
Typical Application
20011403
© 2002 National Semiconductor Corporation
DS200114
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LM3700/LM3701
Connection Diagram
Top View (looking from the coating side) micro SMD 9 Bump Package BPA09
20011401
Pin Descriptions
Bump No. B1 C1 Name VCC RESET Power Supply input. Reset Logic Output. Pulses low for tRP (Reset Timeout Period) when triggered, and stays low whenever VCC is below the reset threshold or when MR is below VMRT. It remains low for tRP after either VCC rises above the reset threshold, or after MR input rises above VMRT (LM3700 only). Reset Logic Output. RESET is the inverse of RESET (LM3701 only). Low-Line Logic Output. Early Power-Fail warning output. Low when VCC falls below VLLOT (Low-Line Output Threshold). This output can be used to generate an NMI (Non-Maskable Interrupt) to provide an early warning of imminent power-failure. Ground reference for all signals. No Connect. No Connect. Test input used at factory only. Leave floating. Function
RESET C3 LLO
B3 A1, A2, A3, C2 B2
GND NC NC
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LM3700/LM3701
Block Diagram
20011405
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LM3700/LM3701
Ordering Information
20011404
*For other voltages between 2.2V and 5.0V, please contact National Semiconductor sales office.
LM3700/LM3701
Part Number LM3700XCBP-308 LM3700XCBPX-308 LM3701XCBP-308 LM3701XCBPX-308
%% is the datecode and will vary with time.
Output totem-pole totem-pole totem-pole totem-pole
Reset Timeout Period 200ms 200ms 200ms 200ms
Package Marking %%I0 %%I0 %%I1 %%I1
Table Of Functions
Part Number LM3700 LM3701
* = available upon request. Contact National
Active Low Reset x
Active High Reset x
Output (X = totem-pole) (Y = open-drain) X, Y* X
Reset Timeout Period Customized Customized
Low Line Output x x
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LM3700/LM3701
Absolute Maximum Ratings
(Note 1)
Power Dissipation
(Note 3)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) All Other Inputs ESD Ratings (Note 2) Human Body Model Machine Model −0.3V to 6.0V −0.3V to VCC + 0.3V 1.5kV 150V
Operating Ratings (Note 1)
Temperature Range −40˚C ≤ TJ ≤ 85˚C
LM3700/LM3701 Series Electrical Characteristics
Limits in the standard typeface are for TJ = 25˚C and limits in boldface type apply over full operating range. Unless otherwise specified: VCC = +2.2V to 5.5V. Symbol VCC ICC Parameter Operating Voltage Range: VCC VCC Supply Current Reset Threshold LM3700 LM3701 All inputs = VCC; all outputs floating Conditions Min 1.0 1.2 28 Typ Max 5.5 5.5 50 Units POWER SUPPLY V µA
RESET THRESHOLD VRST VCC falling VCC falling: TA = 0˚C to 70˚C VRSTH tRP Reset Threshold Hysteresis Reset Timeout Period Reset Reset Reset Reset Timeout Timeout Timeout Timeout Period Period Period Period = = = = A B C D 1 20 140 1120 −0.5 −2 −1.5 0.0032 • VRST 1.4 28 200 1600 20 2 40 280 2240 VRST +0.5 +2 +1.5 mV %
ms
tRD
VCCto Reset Delay RESET
VCC falling at 1mV/µs
µs
RESET (LM3701) VOL VCC > 2.25V, ISINK = 900µA VCC > 2.7V, ISINK = 1.2mA VCC > 4.5V, ISINK = 3.2mA VOH RESET VCC > 1.2V, ISOURCE = 50µA VCC > 1.8V, ISOURCE = 150µA VCC > 2.25V, ISOURCE = 300µA VCC > 2.7V, ISOURCE = 500µA VCC > 4.5V, ISOURCE = 800µA ILKG Output Leakage Current RESET VRESET = 5.5V 0.8 VCC 0.8 VCC 0.8 VCC 0.8 VCC VCC − 1.5V 1.0 µA V 0.3 0.3 0.4 V
RESET (LM3700) VOL VCC > 1.0V, ISINK = 50µA VCC > 1.2V, ISINK = 100µA VCC > 2.25V, ISINK = 900µA VCC > 2.7V, ISINK = 1.2mA VCC > 4.5V, ISINK = 3.2mA VOH RESET VCC > 2.25V, ISOURCE = 300µA VCC > 2.7V, ISOURCE = 500µA VCC > 4.5V, ISOURCE = 800µA 0.8 VCC 0.8 VCC VCC − 1.5V 0.3 0.3 0.3 0.3 0.4 V
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LM3700/LM3701
LM3700/LM3701 Series Electrical Characteristics
Symbol LLO VOL LLO Output Voltage VCC > 2.25V, ISINK = 900µA VCC > 2.7V, ISINK = 1.2mA VCC > 4.5V, ISINK = 3.2mA VOH VCC VCC VCC LLO OUTPUT VLLOT LLO Output Threshold (VLLO − VRST, VCC falling) Low-Line Comparator Hysteresis Low-Line Comparator Delay VCC falling at 1mV/µs Parameter Conditions
(Continued) Limits in the standard typeface are for TJ = 25˚C and limits in boldface type apply over full operating range. Unless otherwise specified: VCC = +2.2V to 5.5V. Min Typ Max 0.3 0.3 0.4 0.8 VCC 0.8 VCC VCC − 1.5V 1.01 • VRST 1.02 • VRST 1.03 • VRST V V Units
> 2.25V, ISOURCE = 300µA > 2.7V, ISOURCE = 500µA > 4.5V, ISOURCE = 800µA
VLLOTH
0.0032 • VRST
mV
tCD
20
µs
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed conditions. Note 2: The Human Body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200pF capacitor discharged directly into each pin. Note 3: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJ-A, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperture is calculated using:
Where the value of θJ-A for the micro SMD package is 220˚C/W.
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LM3700/LM3701
Typical Performance Characteristics
Supply Current vs Supply Voltage 3.3V Supply Current vs Temperature
20011411 20011415
Normalized Reset Threshold Voltage vs Temperature
Reset Timeout Period vs VCC
20011412 20011432
Reset Timeout Period vs Temperature
Max. Transient Duration vs Reset Comparator Overdrive (VCC = 3.3V)
20011410 20011416
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LM3700/LM3701
Typical Performance Characteristics
Low-Line Comparator Propagation Delay vs Temperature
(Continued)
20011414
Circuit Information
Reset Output The Reset input of a µP initializes the device into a known state. The LM3700/LM3701 microprocessor supervisory circuits assert a forced reset output to prevent code execution errors during power-up, power-down, and brownout conditions. RESET is guaranteed valid for VCC > 1V. Once VCC exceeds the reset threshold, an internal timer maintains the output for the reset timeout period. After this interval, reset goes high. The LM3700 offers an active-low RESET; The LM3701 offers an active-high RESET. Any time VCC drops below the reset threshold (such as during a brownout), the reset activates. When VCC again rises above the reset threshold, the internal timer starts. Reset holds until VCC exceeds the reset threshold for longer than the reset timeout period. After this time, reset releases. Reset Threshold The LM3700/LM3701 family is available with a reset voltage of 3.08V. Other reset thresholds in the 2.20V to 5.0V range, in steps of 10 mV, are available; contact National Semiconductor for details. Low-Line Output (LLO) The low-line output comparator is typically used to provide a non-maskable interrupt to a µP when VCC begins falling. LLO monitors VCC and goes low when VCC falls below VLLOT (typically 1.02 • VRST) with hysteresis of 0.0032 • VRST.
Special Precautions for the micro SMD Package As with most integrated circuits, the LM3700 and LM3701 are sensitive to exposure from visible and infrared (IR) light radiation. Unlike a plastic encapsulated IC, the micro SMD package has very limited shielding from light, and some sensitivity to light reflected from the surface of the PC board or long wavelength IR entering the die from the side may be experienced. This light could have an unpredictable affect on the electrical performance of the IC. Care should be taken to shield the device from direct exposure to bright visible or IR light during operation. Micro SMD Mounting The micro SMD package requires specific mounting techniques which are detailed in National Semiconductor Application Note AN-1112. Referring to the section Surface Mount Technology (SMT) Assembly Considerations, it should be noted that the pad style which must be used with the 9-pin package is the NSMD (non-solder mask defined) type. For best results during assembly, alignment ordinals on the PC board may be used to facilitate placement of the micro SMD device.
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LM3700/LM3701
Timing Diagrams
20011428
FIGURE 1. LM3700 Reset Time
20011429
FIGURE 2. LLO Output
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LM3700/LM3701
Typical Application Circuits
20011424
FIGURE 3. LM3701 Power-On Delay
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LM3700/LM3701
Typical Application Circuits
(Continued)
20011422
FIGURE 4. Regulator/Switch with Long-Term Overvoltage Lockout Prevents Overdissipation in Linear Regulator
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LM3700/LM3701 Microprocessor Supervisory Circuit with Low Line Output
Physical Dimensions
unless otherwise noted
inches (millimeters)
NOTES: UNLESS OTHERWISE SPECIFIED 1. EPOXY COATING 2. 63Sn/37Pb EUTECTIC BUMP 3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD. 4. PIN 1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. REMAINING PINS ARE NUMBERED COUNTER CLOCKWISE. 5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS PACKAGE HEIGHT. 6.NO JEDEC REGISTRATION AS OF AUG.1999.
9 bump micro SMD Package NS Package Number BPA09FFB The dimensions of X1, X2 and X3 are given below X1 = 1.412mm X2 = 1.412mm X3 = 0.850mm
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