LM4510SD

LM4510 Synchronous Step-Up DC/DC Converter with True Shutdown Isolation October 2007 LM4510 Synchronous Step-Up DC/DC Converter with True Shutdown Isolation General Description The LM4510 is a current mode step-up DC/DC converter with a 1.2A internal NMOS switch designed to deliver up to 120 mA at 16V from a Li-Ion battery. The device's synchronous switching operation (no external Schottky diode) at heavy-load, and non-synchronous switching operation at light-load, maximizes power efficiency. True shutdown function by synchronous FET and related circuitry ensures input and output isolation. A programmable soft-start circuit allows the user to limit the amount of inrush current during startup. The output voltage can be adjusted by external resistors. The LM4510 features advanced short-circuit protection to maximize safety during output to ground short condition. During shutdown the feedback resistors and the load are disconnected from the input to prevent leakage current paths to ground. The LM4510 is available in a 10-pin thermally enhanced Leadless Leadframe Package: LLP-10. Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 18V@80 mA from 3.2V input 5V@280 mA from 3.2V input No external Schottky diode required 85% peak efficiency Soft start True shutdown isolation Stable with small ceramic or tantalum output capacitors Output short-circuit protection Feedback fault protection Input under-voltage lock out Thermal shutdown 0.002 µA shutdown current Wide input voltage range: 2.7V to 5.5V 1.0 MHz fixed frequency operation Low-profile 10–pin LLP package (3mm x 3mm x 0.8mm) Applications ■ ■ ■ ■ ■ ■ Organic LED Panel Power Supply Charging Holster White LED Backlight USB Power Supply Class D Audio Amplifier Camera Flash LED Driver Typical Application Circuit 30031001 FIGURE 1. Typical Application Circuit © 2007 National Semiconductor Corporation 300310 www.national.com LM4510 Efficiency at Vout = 16V 30031030 Connection Diagram LLP-10 No Pullback Package, 3mm x 3mm x 0.8mm NS Package Number SDA10A 30031002 Ordering Information Order Number LM4510SD LM4510SDX SPEC NOPB NOPB Package Type LLP-10 LLP-10 NSC Package Drawing SDA10A SDA10A Package Marking L4510 L4510 Supplied As 1000 Units, Tape and Reel 4500 Units, Tape and Reel Pin Descriptions/Functions Pin 1 2 3 4 5 6 7 Name SW PGND VIN EN SS AGND COMP Power ground Analog and Power supply input. Input range: 2.7V to 5.5V. Enable logic input. HIGH= Enabled, LOW=Shutdown. Soft-start pin Analog ground Compensation network connection. Function Switch pin. Drain connections of both internal NMOS and PMOS devices. www.national.com 2 LM4510 Pin 8 9 10 DAP Name FB N/C VOUT DAP Output voltage feedback connection. No internal connection. Function Internal PMOS source connection for synchronous rectification. Die Attach Pad thermal connection 3 www.national.com LM4510 Absolute Maximum Ratings (Notes 1, 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN VOUT SW (Note 3) EN, SS, COMP FB PGND to AGND Continuous Power Dissipation (Note 4) Junction Temperature (TJ-MAX) Storage Temperature Range (TS) Lead Temperature (Soldering, 10 sec) (Note 5) ESD Ratings (Note 12) Human Body Model Machine Model −0.3V to 6.5V −0.3V to 21V −0.3V to VOUT+0.3V −0.3V to 6.5V −0.2V to 0.2V Internally Limited 150°C −65°C to +150°C Operating Conditions Supply Voltage Range (VIN) Junction Temperature Range (TJ) (Note 6) Ambient Temperature Range (TA) Output Voltage Range (VOUT) 2.7V to 5.5V −40°C to +125°C −40°C to +85°C Up to 18V Thermal Properties Junction to Ambient Thermal Resistance (θJA) LLP-10 Package (Note 7) 36°C/W 260°C 2.0kV 200V (Notes 8, 9) Electrical Characteristics Limits in standard type face are for TJ = 25°C only. Limits in boldface type apply over the full operating junction temperature range ( −40°C ≤ TJ ≤+125°C). Unless otherwise stated the following conditions apply: VIN = 3.6V, EN = 3.6V. Symbol VFB IFB RDS(on) ICL IQ Parameter FB Pin Voltage FB Pin Bias Current (Note 11) NMOS Switch RDS(on) PMOS Switch RDS(on) NMOS Switch Current Limit Device Switching Non-switching Current Shutdown Current IL IVOUT IVL fSW DMAX DMIN Gm EN Threshold IEN FB Fault Protection UVLO ISS SW Leakage Current (Note 11) PMOS Switch Leakage Current Switching Frequency Maximum Duty Cycle Minimum Duty Cycle Error Amplifier Transconductance Device Enable Device Shutdown EN Pin Bias Current Feedback Fault Protection Input Undervoltage Lockout Soft-Start Pin Current (Note 10) HIGH LOW 0 < EN < 3.6V ON Threshold OFF Threshold ON Threshold OFF Threshold 2.1 9 18.0 17.0 70 1.2 FB = 0V EN = 3.6V, FB = COMP EN = 3.6V, FB > 1.29V EN = 0V SW = 20V 50 ISW = 0.3A ISW = 0.3A, VOUT = 10V 1.0 Conditions 2.7V ≤ VIN ≤ 5.5V Min (Note 8) 1.24 Typ (Note 9) 1.265 0.050 0.45 0.9 1.2 1.7 0.8 0.002 0.01 90 0.001 0.85 88 1.0 94 15 130 0.81 0.78 3.2 19.7 18.7 2.5 2.35 11.3 15 0.4 8.0 20.7 20.0 2.65 V µA 20 200 Max (Note 8) 1.29 1.5 1.1 1.1 1.8 2.5 2.0 0.050 0.150 150 0.100 1.2 Units V µA Ω A mA mA µA µA µA µA MHz % % µmho V µA V VOUT Bias Current (Note 11) VOUT = 20V SW = 0V, VOUT = 20V www.national.com 4 LM4510 Note 1: Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 2: All voltages are with respect to the potential at the GND pin. Note 3: This condition applies if VIN < VOUT. If VIN > VOUT, a voltage greater than VIN + 0.3V should not be applied to the VOUT or VSW pins. The absolute maximum specification applies to DC voltage. An extended negative voltage limit of -1V applies for a pulse of up to 1 µs, and -2V for a pulse of up to 40 ns. An extended positive voltage limit of 22V applies for a pulse of up to 20 ns. Note 4: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ=150°C (Typ.) and disengages at TJ=140°C (Typ.). Note 5: For detailed soldering information and specifications, please refer to National Semiconductor Application Note 1187: Leadless Leadframe Package (LLP) , available at www.national.com. Note 6: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX) Note 7: Junction-to-ambient thermal resistance (θJA) is taken by a numerical analysis conforming to JEDEC standards. In applications where high maximum power dissipation exists (high VIN, high IOUT), special care must be paid to thermal dissipation issues when designing the board layout. For more information on these topics, please refer to Application Note 1187: Leadless Leadframe Package (LLP). Note 8: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are production tested, guaranteed through statistical analysis or guaranteed by design. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL). Note 9: Typical numbers are at 25°C and represent the most likely norm. Note 10: Current flows out of the pin. Note 11: Current flows into the pin. Note 12: The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin (MIL-STD-883 3015.7). The machine model is a 200 pF capacitor discharged directly into each pin. 5 www.national.com LM4510 Typical Performance Characteristics LM4510SD, Circuit of Figure 1, (L=4.7 µH, COILCRAFT, DO3316-472ML; CIN=4.7 µF, TDK, C2012X5R0J475K; COUT=10 µF, AVX, 12103D106KAT2A; CS=10 nF, TDK, C1608C0G1E103J; CC1=2.2 nF, Taiyo Yuden, TMK107SD222JA-T; RC=46.4 KΩ, Yageo, 9t06031A4642FBHFT), VIN=3.6V, VOUT=16V, TA=25°C, unless otherwise noted. Switching Quiescent Current vs VIN RDS(on) vs Temperature at VIN= 3.6V 30031035 30031005 Load Capabilty vs VIN (VOUT = 16 V ) Output Voltage vs Temperature (VOUT = 17 V ) 30031006 30031010 www.national.com 6 LM4510 Switching Frequency vs Temperature Load Regulation (VOUT = 16 V ) 30031011 30031012 Load Regulation (VOUT = 5 V ) Line Regulation (VOUT = 16 V ) 30031034 30031029 Line Regulation (VOUT = 5 V ) Efficiency vs Output Current (VOUT = 16 V ) 30031033 30031030 7 www.national.com LM4510 Efficiency vs Output Current (VOUT = 12 V ) Efficiency vs Output Current (VOUT = 5 V, L= DO3314-472ML) 30031031 30031032 Line Transient Response (VOUT = 16 V ) Load Transient Response (VOUT = 16 V ) 30031003 30031004 Start Up (VOUT = 16 V, RLOAD = 530 Ω) Shut Down (VOUT = 16 V, RLOAD = 940 Ω) 30031007 30031009 www.national.com 8 LM4510 Short Circuit Response (VOUT = 16 V) Output Voltage Ripple (VOUT = 16 V, IOUT = 90 mA) 30031008 30031098 Output Voltage Ripple (VOUT = 5 V, IOUT = 100 mA) 30031099 9 www.national.com LM4510 Block Diagram 30031013 FIGURE 2. LM4510 Block Diagram Operation Description LM4510 is a peak current-mode, fixed-frequency PWM boost regulator that employs both Synchronous and Non-Synchronous Switching. The DC/DC regulator regulates the feedback output voltage providing excellent line and load transient response. The operation of the LM4510 can best be understood by referring to the Block Diagram. NON-SYNCHRONOUS OPERATION The device operates in Non-synchronous Mode at light load (IOUT < 10 mA) or when output voltage is lower than 10V (typ.). At light load, LM4510 automatically changes its switching operation from 'Synchronous' to 'Non-Synchronous' depending on VIN and L. Non-Synchronous operation at light load maximizes power efficiency by reducing PMOS driving loss. OPERATION IN SYNCHRONOUS CONTINUOUS CONDUCTION MODE (CYCLE 1, CYCLE 2) 30031014 FIGURE 3. Schematic of Synchronous Boost Converter www.national.com 10 LM4510 Synchronous boost converter is shown in Figure 3. At the start of each cycle, the oscillator sets the driver logic and turns on the NMOS power device and turns off the PMOS power device. Cycle 1 Description Refer to Figure 4. NMOS switch turn-on → Inductor current increases and flows to GND. PMOS switch turn-off → Isolate VOUT from SW → Output capacitor supplies load current. SHORT CIRCUIT PROTECTION When VOUT goes down to VIN–0.7V (typ.), the device stops switching due to the short-circuit protection circuitry and the short-circuit output current is limited to IINIT_CHARGE. FEEDBACK FAULT PROTECTION The LM4510 features unique Feedback Fault Protection to maximize safety when the feedback resistor is not properly connected to a circuit or the feedback node is shorted directly to ground. Feedback fault triggers VOUT monitoring. During monitoring, if VOUT reaches a protection level, the device shuts down. When the feedback network is reconnected and VOUT is lower than the OFF threshold level of Feedback Fault Protection, VOUT monitoring stops. VOUT is then regulated by the control loop. INPUT UNDER-VOLTAGE LOCK-OUT The LM4510 has dedicated circuitry to protect the IC and the external components when the battery voltage is lower than the preset threshold. This under-voltage lock-out with hysteresis prevents malfunctions during startup or abnormal power off. THERMAL SHUTDOWN If the die temperature exceeds 150°C (typ.), the thermal protection circuitry shuts down the device. The switches remain off until the die temperature is reduced to approximately 140°C (typ.). 30031015 FIGURE 4. Equivalent Circuit During Cycle 1 During operation, EAMP output voltage (VCOMP) increases for larger loads and decreases for smaller loads. When the sum of the ramp compensation and the sensed NMOS current reaches a level determined by the EAMP output voltage, the PWM COMP resets the logic, turning off the NMOS power device and turning on the PMOS power device. Cycle 2 Description Refer to Figure 5. NMOS Switch turn-off → PMOS Switch turnon→ Inductor current decreases and flows through PMOS → Inductor current recharges output capacitor and supplies load current. Application Information ADJUSTING OUTPUT VOLTAGE The output voltage is set using the feedback pin and a resistor voltage divider (RF1, RF2) connected to the output as shown in the Typical Application Circuit. The ratio of the feedback resistors sets the output voltage. RF2 Selection First of all choose a value for RF2 generally between 10 kΩ and 25 kΩ. 30031016 FIGURE 5. Equivalent Circuit During Cycle 2 After the switching period the oscillator then sets the driver logic again repeating the process. ON/OFF CONTROL The LM4510 shuts down when the EN pin is low. In this mode the feedback resistors and the load are disconnected from the input in order to avoid leakage current flow and to allow the output voltage to drop to 0V. The LM4510 turns on when EN is high. There is an internal pull-down resistor on the EN pin so the device is in a normally off state. RF1 Selection Calculate RF1 using the following equation: Table 1 gives suggested component values for several typical output voltages. 11 www.national.com LM4510 TABLE 1. Suggested Component Values for Different Output Voltages Output Voltage (V) 16 12 5 3.3 RF2 (kΩ) 20.5 20.5 20.5 20.5 RF1 (kΩ) 240 174 60.4 33 RC (kΩ) 46.4 46.4 46.4 46.4 CC1 (nF) 2.2 2.2 2.2 2.2 MAXIMUM OUTPUT CURRENT When the output voltage is set at different level, it is important to know the maximum load capability. By first order estimation, IOUT(MAX) can be estimated by the following equation: ΔI Define The inductor ripple current is given by the following equations: INDUCTOR SELECTION The larger value inductor makes lower peak inductor current and reduces stress on internal power NMOS. On the other hand, the smaller value inductor has smaller outline, lower DCR and a higher current capacity. Generally a 4.7 μH to 15 μH inductor is recommended. IL_AVE CHECK The average inductor current is given by the following equation: Where D is the on-duty cycle of the switching regulator. A common choice is to set ΔIL to about 30% of IL_AVE. IL_PK≤ ICL Check & IMIN Define The peak inductor current is given by the following equation: Where IOUT is output current, η is the converter efficiency of the total driven load and D’ is the off duty cycle of the switching regulator. Inductor DC current rating (40°C temperature rise) should be more than the average inductor current at worst case. To prevent loss of regulation, ensure that the NMOS power switch current limit is greater than the worst-case peak inductor current in the target application. Also make sure that the inductor saturation current is greater than the peak inductor current under the worst-case load transient, high ambient temperature and startup conditions. Refer to Table 2 for suggested inductors. TABLE 2. Suggested Inductors and Their Suppliers Model DO3314-472ML DO3316P-472ML Vendor COILCRAFT COILCRAFT Dimensions LxWxH (mm) 3.3mm x 3.3mm x 1.4mm 12.95mm x 9.4mm x 5.4mm D.C.R (max) 320 mΩ 18 mΩ INPUT CAPACITOR SELECTION Due to the presence of an inductor, the input current waveform is continuous and triangular. So the input capacitor is less critical than output capacitor in boost applications. Typically, a 4.7 μF to 10 μF ceramic input capacitor is recommended on the VIN pin of the IC. ICIN_RMS Check The RMS current in the input capacitor is given by the following equation: OUTPUT CAPACITOR SELECTION The output capacitor in a boost converter provides all the output current when the switch is closed and the inductor is charging. As a result, it sees very large ripple currents. A ceramic capacitor of value 4.7 μF to 10 μF is recommended at the output. If larger amounts of capacitance are desired for improved line support and transient response, tantalum capacitors can be used. ICOUT_RMS Check The RMS current in the output capacitor is given by the following equation: The input capacitor should be capable of handling the RMS current. www.national.com 12 LM4510 The output capacitor should be capable of handling the RMS current. The ESR and ESL of the output capacitor directly control the output ripple. Use capacitors with low ESR and ESL at the output for high efficiency and low ripple voltage. The output capacitor also affects the soft-start time. See Soft-Start Function and Soft-Start Capacitor Selection. Table 3 shows suggested input and output capacitors. TABLE 3. Suggested CIN and COUT Capacitors and Their Suppliers Model 4.7 µF for CIN C2012X5R0J475 GRM21BR60J475 JMK212BJ475 C2012X5R0J475K 10 µF for COUT TMK316BJ106KL 12103D106KAT2A Ceramic, X5R Ceramic, X5R Taiyo-Yuden AVX 25V 25V 1206 (3216) 1210 (3225) Ceramic, X5R Ceramic, X5R Ceramic, X5R Ceramic, X5R TDK muRata Taiyo-Yuden TDK 6.3V 6.3V 6.3V 6.3V 0805 (2012) 0805 (2012) 0805 (2012) 0603 (1608) Type Vendor Voltage Rating Case Size Inch (mm) SOFT-START FUNCTION AND SOFT-START CAPACITOR SELECTION The LM4510 has a soft-start pin that can be used to limit the input inrush current. Connect a capacitor from SS pin to GND to set the soft-start period. Figure 6 describes the soft start process. • Initial charging period: When the device is turned on, the control circuitry linearly regulating initial charge current charges VOUT by limiting the inrush current. • Soft-start period: After VOUT reaches VIN -0.7V (typ.), the device starts switching and the CS is charged at a constant current of 11 μA, ramping up to VIN. This period ends when VSS reaches VFB. CS should be large enough to ensure soft-start period ends after CO is fully charged. During the initial charging period, the required load current must be smaller than the initial charge current to ensure VOUT reaches VIN -0.7V (typ.). CS Selection The soft-start time without load can be estimated as: Where the IINIT_CHARGE is Initial Charging Current depending on VIN and ISS_CHARGE (11 μA (typ.)). Also, when selecting the fuse current rating, make sure the value is higher than the initial charging current. COMPENSATION COMPONENT SELECTION The LM4510 provides a compensation pin COMP to customize the voltage loop feedback. It is recommended that a series combination of RC and CC1 be used for the compensation network, as shown in the typical application circuit. In addition, CC2 is used for compensating high frequency zeros. The series combination of RC and CC1 introduces a pole-zero pair according to the following equations: In addition, CC2 introduces a pole according to the following equation: 30031023 FIGURE 6. Soft Start Timing Diagram Where RO is the output impedance of the error amplifier, approximately 1 MΩ, and amplifier voltage gain is typically 200 V/V depending on temperature and VIN. Refer to Table 4 for suggested soft start capacitor and compensation components. 13 www.national.com LM4510 TABLE 4. Suggested CS and Compensation Components Model (CS) C1608C0G1E103J (C1)TMK107SD222JA-T (RC) 9t06031A4642FBHFT Type Ceramic, X5R Ceramic, X5R Resistor Vendor TDK Taiyo Yuden Yageo Corporation Voltage Rating 6.3V 25V 1/10W Case Size Inch (mm) 603 (1608) 603 (1608) 603 (1608) LAYOUT CONSIDERATIONS AND THERMAL MANAGEMENT 30031096 FIGURE 7. Evaluation Board Layout High frequency switching regulators require very careful layout of components in order to get stable operation and low noise. All components must be as close as possible to the LM4510 device. Refer to Figure 7 as an example. Some additional guidelines to be observed: 1. CIN must be placed close to the device and connected directly from VIN to PGND pins. This reduces copper trace resistance, which affects the input voltage ripple of the device. For additional input voltage filtering, typically a 0.1 uF bypass capacitor can be placed between VIN and AGND. This bypass capacitor should be placed near the device closer than CIN. 2. COUT must also be placed close to the device and connected directly from VOUT to PGND pins. Any copper trace connections for the COUT capacitor can increase the series resistance, which directly affects output voltage ripple and makes noise during output voltage sensing. 3. All voltage-sensing resistors (RF1, RF2) should be kept close to the FB pin to minimize copper trace connections that can inject noise into the system. The ground connection for the voltage-sensing resistor should be connected directly to the AGND pin. 4. Trace connections made to the inductor should be minimized to reduce power dissipation, EMI radiation and increase overall efficiency. Also poor trace connection increases the ripple of SW. 5. CS, CC1, CC2, RC must be placed close to the device and connected to AGND. 6. The AGND pin should connect directly to the ground. Not connecting the AGND pin directly, as close to the chip as possible, may affect the performance of the LM4510 and limit its current driving capability. AGND and PGND should be separate planes and should be connected at a single point. 7. For better thermal performance, DAP should be connected to ground, but cannot be used as the primary ground connection. The PC board land may be modified to a "dog bone" shape to reduce LLP thermal impedance. For detail information, refer to Application Note AN-1187. FLASH/TORCH APPLICATION LM4510 can be configured to drive white LEDs for the flash and torch functions. The flash/torch can be set up with the circuit shown in Figure 8 by using the resistor RT to determine the current in Torch Mode and RF to determine the current in Flash Mode. The amount of current can be estimated using the following equations: www.national.com 14 LM4510 30031028 FIGURE 8. Flash/Torch Circuit Using LM4510 15 www.national.com LM4510 Physical Dimensions inches (millimeters) unless otherwise noted 10-pin LLP Package For Ordering, Refer to Ordering Information Table NS Package Number SDA10A 3mm x 3mm x 0.8mm www.national.com 16 LM4510 Notes 17 www.national.com LM4510 Synchronous Step-Up DC/DC Converter with True Shutdown Isolation Notes THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS, IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT NATIONAL’S PRODUCT WARRANTY. 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All other brand or product names may be trademarks or registered trademarks of their respective holders. Copyright© 2007 National Semiconductor Corporation For the most current product information visit us at www.national.com National Semiconductor Americas Customer Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 National Semiconductor Europe Customer Support Center Fax: +49 (0) 180-530-85-86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +49 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Support Center Email: ap.support@nsc.com National Semiconductor Japan Customer Support Center Fax: 81-3-5639-7507 Email: jpn.feedback@nsc.com Tel: 81-3-5639-7560 www.national.com