LM4831VF

LM4831 Multimedia Computer Audio Chip November 1998 LM4831 Multimedia Computer Audio Chip General Description The LM4831 is a monolithic integrated circuit that provides a stereo three input mixer, two stereo input analog multiplexer, a stereo line out and a dual 1W bridged audio power amplifier. In addition, a low noise microphone preamp is included on-chip. The LM4831 is ideal for multimedia computers since it incorporates an input mixer, analog multiplexer, and configurable stereo audio power amplifier, as well as a microphone preamp stage. This combination allows for all of the analog audio processing to be enclosed in a 44-pin TQFP package. The LM4831 features an externally controlled, low-power consumption shutdown mode, as well as both headphone and docking station modes. To temporarily override the shutdown mode and allow audio signals to be amplified, the LM4831 provides four “beep” pins. Key Specifications n THD+N at 1W into 8Ω n Microphone Input Referred Noise n Supply Current - Bridged Mode n Shutdown Current 0.6% (typ) 10µV (typ) 16mA (typ) 2µA (typ) Features Stereo 1W audio power amplifier “Click and pop” suppression circuitry Stereo three input mixer Shutdown mode Multiple operating modes — bridged, single-ended and docking station modes n Internal mux for switching in/out external filter n Beep circuitry for “wake-up” while in shutdown n 44 Pin TQFP Packaging n n n n n Applications n Portable and Desktop Computers Block Diagram Connection Diagram DS100057-1 FIGURE 1. LM4831 Block Diagram DS100057-3 Top View Order Number LM4831VF See NS Package Number VEJ44A Boomer ® is a registered trademark of National Semiconductor Corporation. TRI-STATE ® is a registered trademark of National Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100057 www.national.com Absolute Maximum Ratings (Note 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage Storage Temperature Input Voltage Power Dissipation (Note 3) ESD Susceptibility (Note 4) ESD Susceptibility (Note 5) Junction Temperature Soldering Information Small Outline Package 6.0V −65˚C to 150˚C −0.3V to VDD +0.3V Internally limited 2500V 200V 150˚C Vapor Phase (60 sec.) Infrared (15 sec.) 215˚C 220˚C See AN-450 “Surface Mounting and their Effects on Product Reliability” for other methods of soldering surface mount devices. Thermal Resistance θJC (typ) θJA (typ) 15˚C/W 62˚C/W Operating Ratings Temperature Range Supply Voltage −40˚C to 85˚C 2.7 ≤ VDD ≤ 5.5V Electrical Characteristics (Notes 1, 2) The following specifications apply for VDD = 5V, RL = 8Ω and f = 1 kHz, unless otherwise specified. Distortion measurements represent the full audio chain from Input A of each channel to their respective output. Limits apply for TA = 25˚C. LM4831 Symbol Parameter Conditions Typical (Note 6) Limit (Note 7) 2.7 5.5 I DD Quiescent Power Supply Current Shutdown Current Half Supply Bypass Voltage Bridged Mode, IO = 0 mA Single-Ended Mode, IO = 0 mA Docking Station Mode, IO = 0 mA ISD VDD/2 VPIN-43 = 5V, V PIN-41 Units (Limits) General Characteristics For Entire IC VDD Supply Voltage 16 10.5 7 2 2.45 50 2.4 2.6 Power Amplifiers PO Output Power - Bridged Mode Output Power Single-Ended Mode THD Total Harmonic Distortion RL = 8Ω,THD = 1% RL = 4Ω, THD = 1% RL = 8Ω, THD = 1% RL = 4Ω, THD = 1% Bridged Mode, PO = 1W, RL = 8Ω Single-Ended Mode, PO = 225mW, RL = 8Ω VOS ENoise Output Offset Voltage Input Referred Noise VIN = 0V A-Weighted Filter, VIN = 0V, RL = 8Ω Bridged Output Single-Ended Output PSRR Power Supply Rejection Ratio Channel to Channel Crosstalk TRI-STATE ® Current-Single Ended Mode f = 1kHz, CB = 0.5µF, RL = 8Ω Bridged Output Single-Ended Output XTALK f = 1kHz, PO = 1W, RL = 8Ω Right to Left Left to Right ITS VPIN-41 = 4.0V, L_PA+OUT = R_PA+OUT = VDD or GND −82 −73 80 100 dB dB µA (max) 47 45 dB dB 45 35 100 100 µV (max) µV (max) 1.1 1.5 300 550 0.5 0.15 5 50 2.0 1 W (min) W mW mW % (Max) % mV (Max) V (min) V (max) mA (max) mA mA µA (max) V (min) V (max) 50 = VPIN-42 = 0V VIN = 0V, VPin-43 = 0V www.national.com 2 Electrical Characteristics (Continued) (Notes 1, 2) The following specifications apply for VDD = 5V, RL = 8Ω and f = 1 kHz, unless otherwise specified. Distortion measurements represent the full audio chain from Input A of each channel to their respective output. Limits apply for TA = 25˚C. LM4831 Symbol Parameter Conditions Typical (Note 6) 0.15 10 95 18 Limit (Note 7) Units (Limits) Microphone Amplifier THD ENoise XTALK Total Harmonic Distortion Input Referred Noise Crosstalk R L = 10 kΩ, VIN = 1 VRMS % µV (max) dB A-−weighted Filter Amplifier Bridged Output, f = 1kHz, PO = 1W, RL-mic = 20kΩ Other Audio Characteristics R = 20 kΩ, VIN = 1 VRMS THD Total Harmonic Distortion L Line Out Equalizer Out ENoise AV Input Referred Noise Channel Path Gain A-weighted filter, Line Out Line Out Equalizer Out MUX Out ET VIL VIH VOL VOH Stereo Tracking Error Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Line Out Digital Inputs and Outputs 0.15 0.01 20 0.5 100 % (max) % µV (max) dB (max) dB (max) dB dB (max) V (max) V (min) V (max) V (min) ± 0.1 ± 0.1 −0.25 ± 0.7 ± 0.6 −0.85, +0.3 ± 0.1 ± 0.5 1.0 4.0 0.5 3.5 Note 1: All voltages are measured with respect to the ground pins, 12, 17, 20, and 44, unless otherwise specified. Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is given, however, the typical value is a good indication of device performance. Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature TA. The maximum allowable power dissipation is PDMAX = (TJMAX − TA)/θJA. For the LM4831, TJMAX = 150˚C, and the typical junction-to-ambient thermal resistance, when board mounted, is 62˚C/W assuming the VEF44A package. Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor. Note 5: Machine Model, 220 pF–240 pF discharged through all pins. Note 6: Typicals are measured at 25˚C and represent the parametric norm. Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level). Digital Inputs Pin Truth Table Pin Name PWRDWN 0 0 0 1 HPIN 0 0 1 X DSIN 0 1 X(Note 8) X Bridged Outputs Active Equalizer In/Out Active Line-Outs Active Single-Ended Outputs Active Shutdown LM4831 State Note 8: “X” means that the state of that pin does not matter in that particular input combination. 3 www.national.com Typical Application DS100057-2 FIGURE 3. Typical Application Circuit www.national.com 4 Pin Descriptions VDDA This is the analog power supply pin which powers all internal circuitry, with the exceptions of the output amplifiers and the digital logic in the Beep and Switching circuit sections. This pin should be connected to the same supply voltage as the two VDDD pins (typically 5V), but have a separate ground return path to the supply ground to minimize interaction with the high current amplifier returns and digital switching noise. In addition, this pin should be bypassed with a 0.01 µF–0.1 µF capacitor. These pins are the “digital” and high current power supply pins which power the stereo bridged output amplifier and the digital logic in the Beep and Switching circuit sections. These pins should be connected to the same supply voltage as the VDDA pin (typically 5V), but have a separate return path to the supply to avoid interferring with low level signals. In addition, this pin should be bypassed with a 0.01 µF–0.1 µF capacitor. At the power supply connection, a bulk storage capacitor of at least 10 µF will reduce the instantaneous current demanded from the power supply. These are the power supply ground pins. GNDA is the ground pin for the low current analog circuitry. The two GNDD pins are for the digital logic and bridged output amplifiers. GNDM is the ground for the microphone amplifier. Make sure that the high current GNDD paths are not returned through the low current GNDM or GNDA paths. These four ground pins should be star-grounded at a stable, low-impedance, noise-free system ground. BYPASS VDDD This voltage at this pin is nominally 1/2 VDDD and is created by an internal 50 kΩ resistor divider. This node should be bypassed with a capacitor value from 0.1 µF-1.0 µF. Increasing the capacitor value will increase the ramp time of the amplifiers, thereby improving turn-on pop performance. 0.1µF is typical for the bypass capacitor. In addition, a 1 MΩ resistor from the bypass pin to the positive supply is shown in Figure 3. This resistor guarantees that the LM4831 will turn-on if the device is powered up with both the PWRDWN and DS-IN pins high. If the the LM4831 will never enter that state, then the 1MΩ resistor can be removed. This pin places the output power amplifier in “headphone” mode. If HP-IN is low, the amplifier is in bridged mode and the 2:1 mux passes the input on the EQ_IN pin. If HP-IN is high, the amplifier is in single-ended mode and the 2:1 mux passes the output of the mixing stage. Single-ended mode places the non-inverting amplifier in the output amplifiers into a high impedance state. HP-IN also has priority over the DS-IN pin, so if HP-IN and DS-IN are both high, the device is in single-ended mode and the stereo line out amplifier is in a high-impedance state. This pin is used to put the LM4831 into “docking-station” mode and control the line out drivers and the state of the internal 2:1 analog multiplexer. If DS-IN is high, the stereo line out amplifier is on and the stereo bridged amplifier is in a high impedance state. Asserting the DS-IN pin also changes the 2:1 analog multiplexer output from the stereo signal on the L_EQIN and R_EQIN pins to the internal path from the stereo input mixer. HP-IN GNDA, GNDD, GNDM DS-IN 5 www.national.com Pin Descriptions PWRDWN (Continued) L_LINEOUT, R_LINEOUT This pin is used to power down the entire IC (except BEEP Circuitry). Placing a logic high on the PWRDWN pin will place the LM4831 in a low supply current state. To minimize the shutdown-mode supply current, the PWRDWN pin should be pulled up to the voltage on the LM4831 power supply pins. The PWRDWN pin is overridden if an edge change occurs on any of the BEEP A–D inputs. These pins are the left channel inputs. Typical input impedance on each input is 20 kΩ. These pins are the right channel inputs. Typical input impedance on each input is 20 kΩ. These pins are the inverting input nodes of the input mixer for the left and right channel, respectively. These are the outputs of the input mixer for the left and right channel, respectively. This output is generally fed to an external filter to equalize the response of internal computer speakers and then back into the EQIN pins. These pins are one of the two inputs to the 2:1 analog multiplexer and are used to feed in externally filtered versions of the EQOUT signals. The 2:1 multiplexer selects the signal on L_EQIN and R_EQIN if the HP_IN and DS_IN pins are both low. These are the stereo outputs of the 2:1 analog multiplexer. The output of the 2:1 multiplexer is decided by the state of the HP-IN and DS-IN pins. If both HP-IN and DS-IN are low, the 2:1 mux selects the analog input on the EQIN pins. If either HP-IN or DS-IN is high, the 2:1 mux selects the internal analog path. See . These are the line outputs for the left and right channel, respectively. Although these outputs are capable of driving a wide range of resistive loads, they are typically used to drive an impedance of at least 10 kΩ. These outputs are only enabled when the DS-IN pin is high, otherwise, they are in a high-impedance state. These pins are the positive inputs of the output audio power amplifiers. Since the power amplifier is typically configured as an inverting amplifier, these pins should be connected to the BYPASS pin to properly bias the output power amplifiers. Further, these pins should be individually bypassed with a capacitor of 0.01 µF–0.1 µF. These pins are the inverting inputs for the output audio power amplifier for the left and right channel, respectively. These pins are the inverted power amp outputs for the left and right channel, respectively. In bridged mode (DS-IN = HP_IN = PWRDWN = low), each output drives one terminal of a direct coupled bridged speaker. In single-ended (headphone) mode, (HP_IN = high, PWRDWN = low, DS-IN = N/A) these outputs drive a capacitively coupled stereo headphone. In docking station mode (DS-IN = high, HP_IN = PWRDWN = low), these outputs are disabled. These pins are the non-inverted power amp outputs for the left and right channel, respectively. In bridged mode (DS-IN = HP_IN = PWRDWN = low), each output drives one terminal of a direct coupled bridged speaker. In single-ended (headphone) mode (HP_IN = high, PWRDWN = low, DS-IN = N/A), these outputs are in a high impedance state, effectively muting the bridged loudspeaker. In docking station mode (DS-IN = high, HP_IN = PWRDWN = low), these outputs are disabled. L_PA+IN, R_PA+IN L_INA, L_INB, L_INC R_INA, R_INB, R_INC L_MIX, R_MIX L_PA−IN, R_PA−IN L_PA−OUT, R_PA−OUT L_EQOUT, R_EQOUT L_EQIN, R_EQIN L_PA+OUT, R_PA+OUT L_MUX, R_MUX www.national.com 6 Pin Descriptions MIC+IN (Continued) BEEP BEEP BEEP BEEP A, B, C, D These four pins are used to “wake up” the LM4831 for a specified amount of time (dictated by the parallel resistor and capacitor connected to the RC pin). If the device is in shutdown and an edge appears at any of the four BEEP pins, then the device will power-up, pass the sound, and then power-down again. This pin outputs the result of an exclusive-or of the four BEEP inputs. BEEP OUT connects back to the Audio Codec as a status pin. This pin is connected to an external resistor-capacitor network which sets the on-time for a beep request. Typically, a 0.1µF capacitor is paralleled with a 1–10MΩ resistor. This pin is the positive input of the microphone amplifier. The microphone amplifier is typically configured as an inverting amplifier, so this pin should be connected to the BYPASS pin to properly bias the amplifier. Further, this pin should be individually bypassed with a capacitor of 0.01µF–0.1 µF. This pin is the inverting input for the microphone amplifier. Because the microphone amplifier is typically used as an inverting amplifier, this pin should be capacitor coupled to the input signal. This pin is the microphone amplifier output. If this pin is to be connected to any chips other than the LM4831, it should be capacitor coupled to the load. MIC−IN BEEP OUT RC MIC OUT Typical Performance Characteristic Supply Current vs Supply Voltage Power Derating Curve DS100057-31 DS100057-23 THD+N vs Frequency THD+N vs Frequency THD+N vs Frequency DS100057-29 DS100057-5 DS100057-4 7 www.national.com Typical Performance Characteristic THD+N vs Frequency (Continued) THD+N vs Output Power THD+N vs Output Power DS100057-17 DS100057-11 DS100057-6 THD+N vs Output Power THD+N vs Output Power THD+N vs Output Power DS100057-14 DS100057-15 DS100057-16 Power Amplifier Noise Floor Power Amplifer Crosstalk, Bridged Power Amplifer Crosstalk, Bridged DS100057-28 DS100057-13 DS100057-12 Power Amplifier Crosstalk to Mic Power Amplifier PSRR DS100057-21 DS100057-30 www.national.com 8 Typical Performance Characteristic Power Dissipation, Bridged (Continued) Power Dissipation, Single-Ended DS100057-25 DS100057-26 Ouput Power vs Supply Voltage Bridged Ouput Power vs Supply Voltage Single-Ended Output Power vs Load DS100057-24 DS100057-27 DS100057-22 Microphone THD+N vs Frequency Microphone THD+N vs Output Level Microphone Noise Floor DS100057-19 DS100057-18 DS100057-20 Line Out THD+N vs Frequency Line Out Noise Floor Equalizer Output THD+N vs Frequency DS100057-9 DS100057-10 DS100057-7 9 www.national.com Typical Performance Characteristic Equalizer Output Noise Floor (Continued) DS100057-8 Application Information GROUNDING Certain grounding techniques should be followed when laying out the LM4831 circuit. Figure 4 shows how to setup the grounds for the LM4831. The half-supply bypass ground should be tied with the input source grounds and brought back to the power supply ground separately from the output load grounds. in with the input grounds. Bringing the output load grounds back to the supply separately will keep large signal currents from interfering with the stable input ground references. DS100057-99 FIGURE 4. Grounding Strategy for LM4831 LAYOUT As stated in the Grounding section, placement of ground return lines is critical for maintaining the highest level of system performance. It is not only important to route the correct ground return lines together, but also important to be aware of where those ground return lines are routed relative to each other. The output load ground returns should be physically located as far as reasonably possible from low signal level lines and their ground return lines. The layout of the microphone amplifier signal lines is critical, since these lines generally work at very low signal levels. SUPPLY BYPASSING As with all op amps and power op amps, the LM4831 requires the power supplies to be bypassed to reduce distortion and avoid oscillation. To avoid high frequency instabilities, a 0.1µF metallized-film or ceramic capacitor should be used to bypass each supply pin as near to the chip as possible. For low frequency considerations, a 10µF or greater tantalum or electrolytic capacitor should be paralleled with the high frequency bypass capacitor. If power supply bypass capacitors are not sufficiently large, the current in the power supply leads, which is a rectified version of the output current, may be fed back into internal circuitry. This internal feedback signal can cause high frequency distortion and oscillation. If power supply lines to the chip are long, larger bypass capacitors could be required. Long power supply leads have inductance and resistance associated with them, which could prevent peak low frequency current demands from being met. The extra bypass capacitance will reduce the peak current requirements from the power supply lines. Under certain conditions, the LM4831 may refuse to come out of shutdown. A 1MΩ resistor connected from the power supply to the bypass pin, as shown in the Typical Application section circuit, Figure 3, will guarantee startup. CLICK & POP CIRCUITRY AND THE BYPASS CAPACITOR The LM4831 contains circuitry to minimize turn-on transients. In this case, turn-on refers to either power supply turn-on or the device coming out of shutdown mode. During turn-on, an internal current source charges the bypass capacitor on the bypass pin. Both the inputs and outputs track the voltage at the bypass pin. As soon as the bypass node is stable at 1/2 VDD, the amplifier will become fully operational. Although the bypass pin current source cannot be modified, the size of the bypass capacitor, Cb, can be changed to alter the device turn-on time and the amount of “click and pop”. The relationship between the size of Cb and the turn-on time is linear. By increasing Cb, the amount of turn-on pop can be reduced. However, the trade-off for using a larger bypass capacitor is an increase in the turn-on time for the device. Re- www.national.com 10 Application Information (Continued) ducing Cb will decrease turn-on time and increase “click and pop”. If Cb is too small, the LM4831 can develop a low-frequency oscillation (“motorboat”) when used at high gains. In order to eliminate “click and pop”, all coupling capacitors must be discharged before turn-on. Rapid on/off switching of the device or shutdown function may cause the “click and pop” circuitry to not operate fully, resulting in increased “click and pop” noise. For single-ended (headphone) circuitry, the output coupling cap, Co, is of particular concern. In shutdown, this capacitor is discharged through an internal 20kΩ resistor. Depending on the size of Co, the discharging time constant can be quite large. To reduce the time constant, an external 1kΩ-5kΩ resistor can be placed in parallel with the internal 20kΩ resistor. The tradeoff for using this resistor is an increase in quiescent current and an increase in turn-off “click and pop”. Changing the bypass capacitor size also affects the amount of time that the beep circuitry turns on the LM4831. Increasing the bypass capacitor size increases the turn-on time, which reduces the amount of time that the LM4831 is fully on for during the RC-timed beep period. The bypass capacitor also helps determine the power supply rejection ratio. The smaller the bypass capacitor, the more the power supply ripples couple onto the half supply and then to all circuitry which uses the half supply for biasing. COUPLING CAPACITORS Since the LM4831 is a single supply circuit, all audio signals (excepting the bridged outputs) must be capacitor coupled to the chip to remove the 2.5VDC bias. All audio inputs have a 20kΩ input impedance, so the AC-coupling capacitor will create a high-pass filter with f-3dB = 1/(2π*20kΩ*Cin). For a −3dB point at 20Hz, Cin should be 0.39µF Single-ended and line-out loads need to be AC-coupled back to the LM4831 amplifiers. This high-pass filter is comprised of the output load and the coupling capacitor, where the filter cutoff is at f-3dB = 1/(2π*Rload*Cout). If RL = 8Ω, then for a −3dB point at 20Hz, Cout should be 1000µF. EQUALIZER INPUT/OUTPUT In some systems, the internal speakers require filtering to improve their frequency response. The LM4831 provides the system designer with external access to the signal using the equalizer output and equalizer inputpins. When the DS_IN and HP_IN pins are low (ie. the system is not in the docking station and no headphone are plugged in), an internal mux routes the audio signal to the equalizer output pin. After the signal is filtered, it is returned to the LM4831 audio path through the equalizer inputpin. The input impedance to the equalizer input pin is 20kΩ. If the external filter’s bias voltage is not derived from the half supply pin on the LM4831, AC-coupling capacitors must be used on the equalizer input and output pins. If no equalization is required, the equalizer out pin can be connected directly to the equalizer in pin without any coupling capacitors. LINE OUT The line out pins are designed for use with a docking station system. When the computer is plugged into the docking station, the DS_IN pin should be forced high, thereby turning off the power amplifier outputs and turning on the line out amplifiers. All audio amplification and filtering is then done by the docking station. The line out pins must be AC-coupled to the docking station audio inputs. POWER AMPLIFIERS The power amplifiers in the LM4831 are designed to drive 8Ω or 32Ω loads at 1W (continuous) or 250mW(continuous), respectively, with 1% THD+N. If the power amplifiers are used to drive single-ended loads, such as headphones, the amplifier inverting outputs should be AC-coupled to the output load. When the LM4831 is in headphone (single-ended) mode, the amplifier non-inverting inputs are in a highimpedance state. In low gain applications (AV < 5), the LM4831 may require a small feedback capacitance to prevent oscillation. Typically, 5-10pF will prevent oscillation. MICROPHONE AMPLIFIER The microphone amplifier is an uncommitted op-amp which is intended to amplify low-level signals. The microphone inputs are very high impedance (Rin > 1MΩ) and can be directly connected to microphone networks. The microphone amplifier has enough output capability to drive a 1kΩ load. All microphone inputs and outputs must be AC-coupled. As shown in Figure 1, the microphone amplifier is typically configured as an inverting amplifier. The positive terminal is connected to the half-supply bypass pin to properly bias the amplifier output to interface with the other inputs on the LM4831. The microphone input pin is connected to the inverting node of a CMOS op amp, so the input impedance is very high ( > 10MΩ) BEEP CIRCUITRY The beep circuitry is designed to allow a “sleeping” system to temporarily power-up the LM4831 and output an audio alert (“beep”). This feature might be used in a computer which is “sleeping”, but needs to notify the user that the computer batteries are low or that the user has new e-mail. The beep circuitry is activated by any edge which occurs on the BEEP A-D pins. With a resistor, Rbeep, and a capacitor, Cbeep, in parallel at the RC pin of the LM4831, the LM4831 will be activated for Rbeep Cbeep seconds. Typical values for Rbeep and Rbeep are 1-10ΩM and 0.1µF. The BEEP OUT pin is designed to signal other audio circuitry that the LM4831 is powering up. Generally a CODEC will receive this signal and begin sending audio information to the LM4831. Logically, the BEEP OUT signal is the result of an XOR of the BEEP A-D pins. 11 www.national.com LM4831 Multimedia Computer Audio Chip Physical Dimensions inches (millimeters) unless otherwise noted 44-Lead Thin Quad Flat Package Order Number LM4831VF NS Package Number VEJ44A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness. ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Français Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: sea.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5620-6175 Fax: 81-3-5620-6179 www.national.com National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.