LM48821

LM48821 Direct Coupled, Ultra Low Noise, 52mW Differential Input Stereo Headphone Amplifier with I2C Volume Control June 2007 LM48821 Direct Coupled, Ultra Low Noise, 52mW Differential Input Stereo Headphone Amplifier with I2C Volume Control General Description With its directly-coupled output technology, the LM48821 is a variable gain audio power amplifier capable of delivering 52mWRMS per channel into a 16Ω single-ended load with less than 1% THD+N from a 3V power supply. The I2C volume control has a range of –76dB to 18dB. The LM48821's Tru-GND technology utilizes advanced charge pump technology to generate the LM48821’s negative supply voltage. This eliminates the need for output-coupling capacitors typically used with single-ended loads. Boomer audio power amplifiers were designed specifically to provide high quality output power with a minimal amount of external components. The LM48821 does not require output coupling capacitors or bootstrap capacitors, and therefore is ideally suited for mobile phone and other low voltage applications where minimal power consumption is a primary requirement. The LM48821 incorporates selectable low-power consumption shutdown and channel select modes. The LM48821 contains advanced output transient suppression circuitry that eliminates noises which would otherwise occur during turn-on and turn-off transitions. Key Specifications ■ Improved PSRR at 217Hz ■ Stereo Output Power at VDD = 3V, RL = 16Ω, THD+N = 1% RL = 16Ω, THD+N = 1% 52mW (typ) 93mW (typ) 0.1μA (typ) 82dB (typ) ■ Mono Output Power at VDD = 3V, ■ Shutdown current Features ■ ■ ■ ■ ■ ■ Ground referenced outputs Differential Inputs I2C Volume and mode controls Available in space-saving micro SMD package Ultra low current shutdown mode Advanced output transient suppression circuitry eliminates noises during turn-on and turn-off transitions ■ 2.0V to 4.0V operation (PVDD and SVDD) ■ 1.8 to 4.0V operation (I2CVDD) ■ No output coupling capacitors, snubber networks, bootstrap capacitors, or gain-setting resistors required Applications ■ ■ ■ ■ ■ ■ Notebook PCs Desktop PCs Mobile Phones PDAs Portable Electronic Devices MP3 Players Boomer® is a registered trademark of National Semiconductor Corporation. Tru-GND is a trademark of National Semiconductor Corporation. © 2007 National Semiconductor Corporation 201842 www.national.com LM48821 Typical Application 20184211 FIGURE 1. Typical Audio Amplifier Application Circuit www.national.com 2 LM48821 Connection Diagrams micro SMD Package micro SMD Marking 201842d7 Top View Order Number TLA1611A See NS Package Number TLA1611A 201842d8 Top View XY - Date Code TT - Lot Traceability GG3 – LM48821 Pin Descriptions Pin Designator A1 A2 A3 A4 B1 B2 B3 B4 C1 C2 C3 C4 D1 D2 D3 D4 Pin Name SVDD SGND IN A+ IN AVOA VOB IN B+ IN BVSS SCL SDA I2CVDD CCPPGND CCP+ PVDD Signal ground Left non-inverting input Left inverting input Left output Right output Right non-inverting input Right inverting input DC to DC converter output I2C serial clock input I2C serial data input I2C supply voltage input DC to DC converter flying capacitor inverting input Power ground DC to DC converter flying capacitor non-inverting input DC to DC converter power supply input Pin Function Signal power supply input 3 www.national.com LM48821 Absolute Maximum Ratings (Notes 1, 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage Storage Temperature Input Voltage Power Dissipation (Note 3) ESD Susceptibility (Note 4) ESD Susceptibility (Note 5) Junction Temperature 4.5V −65°C to +150°C −0.3V to VDD +0.3V Internally Limited 2000V 200V 150°C Thermal Resistance  θJA (typ) - (TLA1611A) (Note 3) 105°C/W Operating Ratings Temperature Range TMIN ≤ TA ≤ TMAX Supply Voltage PVDD and SVDD I2CVDD −40°C ≤ TA ≤ +85°C 2.0V ≤ VDD ≤ 4.0V 1.8V ≤ I2CVDD ≤ 4.0V Audio Amplifier Electrical Characteristics VDD = 3V Symbol Parameter Conditions VIN = 0V, inputs terminated, both channels enabled VIN = 0V, inputs terminated, one channel enabled Right and Left Enable bits set to 0 RL = 32Ω [B0:B4] = 00000 [B0:B4] = 11111 (Notes 1, 2) LM48821 Typical (Note 6) 3.0 2.0 0.1 0.5 –76 +18 ±0.015 –76 5 15 Limits (Notes 7, 8) 4.5 3.0 1.2 2.5 The following specifications apply for VDD = 3V, RL = 16Ω, AV = 0dB, unless otherwise specified. Limits apply for TA = 25°C. Units (Limits) mA (max) mA µA (max) mV (max) dB dB dB dB kΩ (min) kΩ (max) kΩ 43 45 80 mW (min) mW (min) mW (min) mW % % IDD Quiescent Power Supply Current Shutdown Current Output Offset Voltage Volume Control Range Channel-to-Channel Gain Match Mute Gain Input Resistance ISD VOS AV Δ AV AV-MUTE RIN Gain = 18dB Gain = –76dB THD+N = 1% (max); fIN = 1kHz, RL = 16Ω, per channel THD+N = 1% (max); fIN = 1kHz, RL = 32Ω, per channel THD+N = 1% (max); fIN = 1kHz, RL = 16Ω, single channel driven THD+N = 1% (max); fIN = 1kHz, RL = 32Ω, single channel driven POUT = 50mW, f = 1kHz 9 81 52 53 93 79 0.022 0.011 POUT Output Power THD+N Total Harmonic Distortion + Noise RL = 16Ω, single channel POUT = 50mW, f = 1kHz RL = 32Ω, single channel VRIPPLE = 200mVP-P, input referred f = 217Hz f = 1kHz f = 20kHz VRIPPLE = 200mVp-p, Input referred f = 2kHz RL = 32Ω, POUT = 20mW, f = 1kHz, BW = 20Hz to 22kHz PSRR Power Supply Rejection Ratio 82 80 55 65 100 400 65 dB (min) dB dB dB dB μs CMRR SNR TWU Common Mode Rejection Ratio Signal-to-Noise-Ratio Charge Pump Wake-Up Time www.national.com 4 LM48821 LM48821 Symbol Parameter Conditions RL = 16Ω, POUT = 1.6mW, f = 1kHz, A-weighted filter Right and Left Enable bits set to 0 (Notes 1, 2) LM48821 Symbol t1 t2 t3 t4 t5 VIH VIL Parameter SCL period SDA Setup Time SDA Stable Time Start Condition Time Stop Condition Time Logic High Input Threshold Logic Low Input Threshold Conditions Typical (Note 6) Limits (Notes 7, 8) 2.5 100 0 100 100 0.7 x I2CV DD Typical (Note 6) 82 41 Limits (Notes 7, 8) Units (Limits) dB kΩ XTALK ZOUT Crosstalk Output Impedance Control Interface Electrical Characteristics The following specifications apply for 1.8V ≤ I2CVDD ≤ 4.0V, unless otherwise specified. Limits apply for TA = 25°C. See Figure 2. Units (Limits) μs (min) ns (min) ns (min) ns (min) ns (min) V (min) V (max) 0.3 x I2CVDD Note 1: All voltages are measured with respect to the GND pin unless otherwise specified. Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is given, however, the typical value is a good indication of device performance. Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature, TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings, whichever is lower. For the LM48821, see power derating currents for more information. Note 4: Human body model, 100pF discharged through a 1.5kΩ resistor. Note 5: Machine Model, 220pF - 240pF discharged through all pins. Note 6: Typicals are measured at +25°C and represent the parametric norm. Note 7: Limits are guaranteed to National's AOQL (Average Outgoing Quality Level). Note 8: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis. 5 www.national.com LM48821 Typical Performance Characteristics THD+N vs Frequency VDD = 2V, PO = 6mW, RL = 16Ω, Stereo THD+N vs Frequency VDD = 2V, PO = 10mW, RL = 32Ω, Stereo 20184232 20184233 THD+N vs Frequency VDD = 2V, PO = 16mW, RL = 16Ω, Mono Left THD+N vs Frequency VDD = 2V, PO = 16mW, RL = 16Ω, Mono Right 20184234 20184235 THD+N vs Frequency VDD = 2V, PO = 18mW, RL = 32Ω, Mono Left THD+N vs Frequency VDD = 2V, PO = 18mW, RL = 32Ω, Mono Right 20184236 20184237 www.national.com 6 LM48821 THD+N vs Frequency VDD = 3V, PO = 35mW, RL = 16Ω, Stereo THD+N vs Frequency VDD = 4V, PO = 50mW, RL = 16Ω, Stereo 20184238 20184239 THD+N vs Frequency VDD = 3V, PO = 70mW, RL = 16Ω, Mono Left THD+N vs Frequency VDD = 3V, PO = 70mW, RL = 16Ω, Mono Right 201842b9 201842c0 THD+N vs Frequency VDD = 4V, PO = 160mW, RL = 16Ω, Mono Left THD+N vs Frequency VDD = 4V, PO = 160mW, RL = 16Ω, Mono Right 201842c1 201842c2 7 www.national.com LM48821 THD+N vs Frequency VDD = 3V, PO = 40mW, RL = 32Ω, Stereo THD+N vs Frequency VDD = 3V, PO = 60mW, RL = 32Ω, Mono Left 201842c3 201842c4 THD+N vs Frequency VDD = 3V, PO = 60mW, RL = 32Ω, Mono Right THD+N vs Frequency VDD = 4V, PO = 90mW, RL = 32Ω, Stereo 201842c5 201842c6 THD+N vs Frequency VDD = 4V, PO = 120mW, RL = 32Ω, Mono Left THD+N vs Frequency VDD = 4V, PO = 120mW, RL = 32Ω, Mono Right 201842c7 201842c8 www.national.com 8 LM48821 THD+N vs Output Power VDD = 2V, RL = 16Ω, f = 1kHz, Mono Left THD+N vs Output Power VDD = 2V, RL = 16Ω, f = 1kHz, Mono Right 20184240 20184241 THD+N vs Output Power VDD = 2V, RL = 16Ω, f = 1kHz, Stereo THD+N vs Output Power VDD = 3V, RL = 16Ω, f = 1kHz, Mono Left 20184242 20184243 THD+N vs Output Power VDD = 3V, RL = 16Ω, f = 1kHz, Mono Right THD+N vs Output Power VDD = 3V, RL = 16Ω, f = 1kHz, Stereo 20184244 20184245 9 www.national.com LM48821 THD+N vs Output Power VDD = 4V, RL = 16Ω, f = 1kHz, Mono Left THD+N vs Output Power VDD = 4V, RL = 16Ω, f = 1kHz, Mono Right 20184246 20184247 THD+N vs Output Power VDD = 4V, RL = 16Ω, f = 1kHz, Stereo THD+N vs Output Power VDD = 2V, RL = 32Ω, f = 1kHz, Mono Left 20184299 20184248 THD+N vs Output Power VDD = 2V, RL = 32Ω, f = 1kHz, Mono Right THD+N vs Output Power VDD = 2V, RL = 32Ω, f = 1kHz, Stereo 20184249 20184250 www.national.com 10 LM48821 THD+N vs Output Power VDD = 3V, RL = 32Ω, f = 1kHz, Mono Left THD+N vs Output Power VDD = 3V, RL = 32Ω, f = 1kHz, Mono Right 20184251 20184252 THD+N vs Output Power VDD = 3V, RL = 32Ω, f = 1kHz, Stereo THD+N vs Output Power VDD = 4V, RL = 32Ω, f = 1kHz, Mono Left 20184253 20184254 THD+N vs Output Power VDD = 4V, RL = 32Ω, f = 1kHz, Mono Right THD+N vs Output Power VDD = 4V, RL = 32Ω, f = 1kHz, Stereo 20184255 20184256 11 www.national.com LM48821 CMRR vs Frequency VDD = 3V, RL = 16Ω PSRR vs Frequency VDD = 2V, RL = 16Ω 20184226 201842d9 PSRR vs Frequency VDD = 2V, RL = 32Ω PSRR vs Frequency VDD = 3V, RL = 16Ω 20184227 20184228 PSRR vs Frequency VDD = 3V, RL = 32Ω PSRR vs Frequency VDD = 4V, RL = 16Ω 20184229 20184230 www.national.com 12 LM48821 PSRR vs Frequency VDD = 4V, RL = 32Ω Output Power vs Voltage Supply RL = 16Ω, Mono 20184231 20184212 Output Power vs Voltage Supply RL = 32Ω, Mono Output Power vs Voltage Supply RL = 16Ω, Stereo 20184213 20184216 Output Power vs Voltage Supply RL = 32Ω, Stereo Output Power vs Power Dissipation VDD = 2V, 3V, 4V, RL = 16Ω, Mono 20184217 20184214 13 www.national.com LM48821 Output Power vs Power Dissipation VDD = 2V, 3V, 4V, RL = 32Ω, Mono Output Power vs Power Dissipation VDD = 2V, 3V, 4V, RL = 16Ω, Stereo 20184215 20184218 Output Power vs Power Dissipation VDD = 2V, 3V, 4V, RL = 32Ω, Stereo Supply Current vs Supply Voltage Mono 20184209 20184219 Supply Current vs Supply Voltage Stereo 20184210 www.national.com 14 LM48821 Application Information 20184267 FIGURE 2. I2C Timing Diagram 20184268 FIGURE 3. I2C Bus Format TABLE 1. Chip Address D7 Chip Address 1 D6 1 D5 1 D4 0 D3 1 D2 1 D1 0 D0 0 TABLE 2. Control Registers D7 Volume Control VD4 D6 VD3 D5 VD2 D4 VD1 D3 VD0 D2 MUTE D1 LF ENABLE D0 RT ENABLE 15 www.national.com LM48821 I2C VOLUME CONTROL The LM48821 can be configured in 32 different gain steps by forcing I2C volume control bits to a desired gain according to the table below: TABLE 3. Volume Control VD4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VD3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 VD2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 VD1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 VD0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Gain (dB) –76 –62 –52 –44 –38 –34 –30 –27 –24 –21 –18 –16 –14 –12 –10 –8 –6 –4 –2 0 2 4 6 8 10 12 13 14 15 16 17 18 www.national.com 16 LM48821 I2C COMPATIBLE INTERFACE The LM48821 uses a serial data bus that conforms to the I2C protocol. Controlling the chip’s functions is accomplished with two wires: serial clock (SCL) and serial data (SDA). The clock line is uni-directional. The data line is bi-directional (opencollector). The maximum clock frequency specified by the I2C standard is 400kHz. In this discussion, the master is the controlling microcontroller and the slave is the LM48821. The bus format for the I2C interface is shown in Figure 3. The bus format diagram is broken up into six major sections: The Start Signal, the I2C Address, an Acknowledge bit, the I2C data, second Acknowledge bit, and the Stop Signal. The start signal is generated by lowering the data signal while the clock signal is high. The start signal will alert all devices attached to the I2C bus to check the incoming address against their own address. The 8-bit chip address is sent next, most significant bit first. The data is latched in on the rising edge of the clock. Each address bit must be stable while the clock level is high. After the last bit of the address bit is sent, the master releases the data line high (through a pull-up resistor). Then the master sends an acknowledge clock pulse. If the LM48821 has received the address correctly, then it holds the data line low during the clock pulse. If the data line is not held low during the acknowledge clock pulse, then the master should abort the rest of the data transfer to the LM48821. The 8 bits of data are sent next, most significant bit first. Each data bit should be valid while the clock level is stable high. After the data byte is sent, the master must check for another acknowledge to see if the LM48821 received the data. If the master has more data bytes to send to the LM48821, then the master can repeat the previous two steps until all data bytes have been sent. The stop signal ends the transfer. To signal stop , the data signal goes high while the clock signal is high. The data line should be held high when not in use. The LM48821's I2C address is shown in Table 1. The I2C data register and its control bit names are shown in Table 2. The data values for the volume control are shown in Table 3. I2C INTERFACE POWER SUPPLY PIN (I2CVDD) The LM48821’s I2C interface is powered up through the I2CVDD pin. The LM48821’s I2C interface operates at a voltage level set by the I2CVDD pin. This voltage can be independent from the main power supply pin (VDD). This is ideal whenever logic levels for the I2C interface are dictated by a microcontroller or microprocessor that is operating at a lower supply voltage than the main battery of a portable system. POWER SUPPLY BYPASSING As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection. Applications that employ a 3.3V voltage regulator typically use a 10μF in parallel with a 0.1μF filter capacitors to stabilize the regulator’s output, reduce noise on the regulated supply lines, and improve the regulator’s transient response. However, their presence does not eliminate the need for a local 1.0μF tantalum bypass capacitance connected between the LM48821’s supply pins and ground. Keep the length of leads and traces that connect capacitors between the LM48821’s power supply pins and ground as short as possible. ELIMINATING THE OUTPUT COUPLING CAPACITOR The LM48821 features a low noise inverting charge pump that generates an internal negative supply voltage. This allows the LM48821 to reference its amplifier outputs to ground instead of a half-supply voltage, like traditional capacitivel-coupled headphone amplifiers. Because there is no DC bias voltage associated with either stereo output, the large DC blocking capacitors (typically 220μF) are not necessary. The coupling capacitors are replaced by two, small ceramic charge pump capacitors, saving board space and cost. Eliminating the output coupling capacitors also improves low frequency response. In traditional headphone amplifiers, the headphone impedance and the output capacitor form a high pass filter that not only blocks the DC component of the output, but also attenuates low frequencies, impacting the bass response. Because the LM48821 does not require the output coupling capacitors, the low frequency response of the device is not degraded. In addition to eliminating the output coupling capacitors, the ground referenced output nearly doubles the output voltage swing and available dynamic range of the LM48821 when compared to a traditional capacitively-coupled output headphone amplifier operating from the same supply voltage. OUTPUT TRANSIENT ELIMINATED The LM48821 contains advanced circuitry that virtually eliminates output transients (’clicks' and 'pops’). This circuitry attenuates output transients when the supply voltage is first applied or when the part resumes operation after using the shutdown mode. POWER DISSIPATION Power dissipation is a major concern when using any power amplifier and must be thoroughly understood to ensure a successful design. Equation 1 states the maximum power dissipation point for a single-ended amplifier operating at a given supply voltage and driving a specified output load. PDMAX = (2VDD)2 / (2π2RL) (1) Since the LM48821 has two power amplifiers in one package, the maximum internal power dissipation point is twice that of the number which results from Equation 1. Even with large internal power dissipation, the LM48821 does not require heat sinking over a large range of ambient temperatures. The maximum power dissipation point obtained must not be greater than the power dissipation that results from Equation 2: PDMAX = (TJMAX - TA) / (θJA) (2) For the micro SMD package, θJA = 105°C/W. TJMAX = 150°C for the LM48821. Depending on the ambient temperature, TA, of the system surroundings, Equation 2 can be used to find the maximum internal power dissipation supported by the IC packaging. If the result of Equation 1 is greater than that of Equation 2, then either the supply voltage must be decreased, the load impedance increased or TA reduced. Power dissipation is a function of output power and thus, if typical operation is not around the maximum power dissipation point, the ambient temperature may be increased accordingly. 17 www.national.com LM48821 SELECTING EXTERNAL COMPONENTS Optimizing the LM48821’s performance requires properly selecting external components. Though the LM48821 operates well when using external components with wide tolerances, best performance is achieved by optimizing component values. Charge Pump Capacitor Selection Use low ESR (equivalent series resistance) (