LM4985 Stereo 135mW Low Noise Headphone Amplifier with Selectable Capacitive Coupled or Capacitor-less (OCL) Output and Digitally Controlled (I2C) Volume Control
May 2006
LM4985 Stereo 135mW Low Noise Headphone Amplifier with Selectable Capacitively Coupled or Output Capacitor-less (OCL) Output and Digitally Controlled (I2C) Volume Control
General Description
The LM4985 is a stereo audio power amplifier with internal digitally controlled volume control. This amplifier is capable of delivering 68mWRMS per channel into a 16Ω load or 38mWRMS per channel into a 32Ω load at 1% THD when powered by a 3.6V power supply and operating in the OCL mode. Boomer audio power amplifiers were designed specifically to provide high quality output power with a minimal amount of external components. To that end, the LM4985 features two functions that optimize system cost and minimize PCB area: an integrated, digitally controlled (I2C bus) volume control and an operational mode that eliminates output signal coupling capacitors (OCL mode). Since the LM4985 does not require bootstrap capacitors, snubber networks, or output coupling capacitors, it is optimally suited for low-power, battery powered portable systems. For added design flexibility, the LM4985 can also be configured for single-ended capacitively coupled outputs. The LM4985 features a current shutdown mode for micropower dissipation and thermal shutdown protection.
Key Specifications (VDD = 3.6V)
j PSRR: 217Hz and 1kHz
Output Capacitor-less (OCL) fRIPPLE = 217Hz fRIPPLE = 1kHz Capacitor Coupled (C-CUPL) fRIPPLE = 217Hz fRIPPLE = 1kHz
j Output Power per channel
77dB (typ) 76dB (typ) 63dB (typ) 62dB (typ)
(fIN = 1kHz, THD+N = 1%), RL = 16Ω,OCL VDD = 2.5V VDD = 3.6V VDD = 5.0V
j THD+N (f = 1kHz)
31mW (typ) 68mW (typ) 135mW (typ) 0.60 0.031 0.1µA (typ)
RLOAD = 16Ω, OCL, POUT = 60mW RLOAD = 32Ω, OCL, POUT = 33mW
j Shutdown Current
Features
n OCL or capacitively coupled outputs (patent pending) n I2C Digitally Controlled Volume Control n Available in space-saving 0.4mm lead-pitch micro SMD package n Volume control range: –76dB to +18dB n Ultra low current shutdown mode n 2.3V - 5.5V operation n Ultra low noise
Applications
n n n n Mobile Phones PDAs Portable electronics devices MP3 Players
Boomer ® is a registered trademark of National Semiconductor Corporation.
© 2006 National Semiconductor Corporation
DS201697
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LM4985
Block Diagram
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FIGURE 1. Block Diagram
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LM4985
Typical Application
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FIGURE 2. Typical Capacitively Coupled Output Configuration Circuit
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FIGURE 3. Typical OCL Output Configuration Circuit
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LM4985
Connection Diagrams
micro SMD Package micro SMD Marking
20169730 20169715
Top View Order Number LM4985TM See NS Package Number TMD12AAA
Top View X – Date Code T – Die Traceability G – Boomer Family H2 – LM4985TM
Pin Reference, Name, and Function Reference A1 A2 A3 B1 B2 B3 Name ADR IN2 OUT2 SDA BYPASS CNTGND Function I2C serial interface address input. Analog signal input two. Power amplifier two output. I2C serial interface data input. The internal VDD/2 ac bypass node. In OCL mode, this is the ac ground return. It is biased to VDD/2. Leave unconnected for C-CUPL mode. I2C serial interface clock input. The LM4985’s power supply ground input. The LM4985’s power supply voltage input. I2C serial interface power supply input. Can be connected to the same supply that is connected to the VDD pin. Analog signal input one. Power amplifier one output.
C1 C2 C3 D1
SCL GND VDD I2CVDD
D2 D3
IN1 OUT1
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LM4985
Absolute Maximum Ratings (Notes 1, 2)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VDD, I2CVDD) Storage Temperature Input Voltage (IN1, IN2, OUT1, OUT2, BYPASS, CNTGND, GND pins relative to the VDD pin) Input Voltage (ADR, SDA, SCL pins, relative to the I2CVDD pin) Power Dissipation (Note 3) ESD Susceptibility (Note 4) 6.0V −65˚C to +150˚C
ESD Susceptibility (Note 5) Junction Temperature Thermal Resistance θJA
200V 150˚C 109˚C/W
Operating Ratings
Temperature Range TMIN ≤ TA ≤ TMAX Supply Voltage VDD I2CVDD −40˚C ≤ T
A
-0.3V to VDD + 0.3V -0.3V to I2CVDD + 0.3V Internally Limited 2000V
≤ 85˚C
2.3V ≤ VCC ≤ 5.5V 1.7V ≤ I2CVDD ≤ 5.5V
The following specifications apply for RL = 16Ω, f = 1kHz, and CB = 4.7µF unless otherwise specified. Limits apply to TA = 25˚C. Symbol Parameter Conditions LM4985 Typ (Note 6) VIN = 0V, IOUT = 0A Single-Channel no load OCL Single-Channel no load C-CUPL Dual-Channel no load OCL Dual-Channel no load C-CUPL VSHUTDOWN = GND Limit (Notes 7, 8) Units (Limits)
Electrical Characteristics VDD = 5V (Notes 1, 2)
IDD
Quiescent Power Supply Current
2 1.5 3 2.3 0.1
mA (max) 4.9 3.8 1.0 3.5 1.5 µA (max) V (min) V (max)
ISD VSDIH VSDIL
Shutdown Current Logic Voltage Input High Logic Voltage Input Low
THD ≤ 1%; fIN = 1kHz RLOAD = 16Ω OCL PO Output Power RLOAD = 16Ω C-CUPL RLOAD = 32Ω OCL RLOAD = 32Ω C-CUPL RLOAD RLOAD Total Harmonic Distortion + Noise RLOAD RLOAD Output Noise Voltage = = = = 16Ω 16Ω 32Ω 32Ω OCL, PO = 100mW C-CUPL, PO = 100mW OCL, PO = 60mW C-CUPL, PO = 70mW 135 135 79 80 0.08 0.02 0.04 0.01 15 70 115 mW (min)
THD+N
%
VON
VIN = AC GND, AV = 0dB, A-weighted VRIPPLE = 200mVp-p (Note 9) fIN = 217Hz sinewave OCL C-CUPL fIN = 1kHz sinewave OCL C-CUPL Pout = 40mW. OCL RLOAD = 16Ω RLOAD= 32Ω Pout = 50mW. C-CUPL RLOAD = 16Ω RLOAD= 32Ω
µV
PSRR
Power Supply Rejection Ratio
77 65 77 65 51 56 58 68
57 dB (min) 60
dB
Xtalk
Channel-to-channel Crosstalk
dB
5
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LM4985
Electrical Characteristics VDD = 5V (Notes 1, 2)
Symbol Parameter
(Continued) The following specifications apply for RL = 16Ω, f = 1kHz, and CB = 4.7µF unless otherwise specified. Limits apply to TA = 25˚C. Conditions LM4985 Typ (Note 6) CBYPASS= 4.7µF (Note 11) WT1 = 0, WT0 = 0 OCL C-CUPL WT1 = 0, WT0 = 1 OCL C-CUPL WT1 = 1, WT0 = 0 OCL C-CUPL WT1 = 1, WT0 = 1 OCL C-CUPL 75 285 110 530 180 1030 320 2050 20 10 –76 18 kΩ dB (min) dB (min) dB Limit (Notes 7, 8) Units (Limits)
TWU
Wake Up Time form Shutdown
msec
RIN AVMIN AVMAX ∆AV
Input Resistance Minimum Gain Maximum Gain Gain Accuracy per Step
Stereo mode Mono mode Code = 00000 Code = 11111 18dB ≥ AV ≥ –44dB –44dB ≥ AV > –76dB OCL RLOAD = 32Ω VIN = AC GND
± 0.5 ± 1.0
2.0 20
VOS
Output Offset Voltage
mV (max)
The following specifications apply for RL = 16Ω, f = 1kHz, and CB = 4.7µF unless otherwise specified. Limits apply to TA = 25˚C. Symbol Parameter Conditions LM4985 Typ (Note 6) VIN = 0V, IOUT = 0A Single-Channel no load OCL IDD Quiescent Power Supply Current Single-Channel no load C-CUPL Dual-Channel no load OCL Dual-Channel no load C-CUPL ISD VSDIH VSDIL Shutdown Current Logic Voltage Input High Logic Voltage Input Low THD+N < 1%, fIN = 1kHz RLOAD = 16Ω OCL PO Output Power RLOAD = 16Ω C-CUPL RLOAD = 32Ω OCL RLOAD = 32Ω C-CUPL 68 70 38 41 34 60 mW (min) VSHUTDOWN = GND 1.8 1.0 2.1 2.3 0.1 4 3 1.0 2.52 1.08 µA (max) V (min) V (max) 3.1 mA (max) Limit (Notes 7, 8) Units (Limits)
Electrical Characteristics VDD = 3.6V (Notes 1, 2)
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LM4985
Electrical Characteristics VDD = 3.6V (Notes 1, 2)
Symbol Parameter
(Continued) The following specifications apply for RL = 16Ω, f = 1kHz, and CB = 4.7µF unless otherwise specified. Limits apply to TA = 25˚C. Conditions LM4985 Typ (Note 6) RLOAD RLOAD Total Harmonic Distortion + Noise RLOAD RLOAD Output Noise Voltage = = = = 16Ω 16Ω 32Ω 32Ω OCL, PO = 60mW C-CUPL, PO = 60mW OCL, PO = 33mW C-CUPL, PO = 38mW 0.06 0.03 0.03 0.03 15 Limit (Notes 7, 8) Units (Limits)
THD+N
%
VON
VIN = AC GND, AV = 0dB, A-weighted VRIPPLE = 200mVp-p (Note 9) fIN = 217Hz sinewave OCL C-CUPL fIN = 1kHz sinewave OCL C-CUPL Pout = 40mW. OCL RLOAD = 16Ω RLOAD= 32Ω Pout = 50mW. C-CUPL RLOAD = 16Ω RLOAD= 32Ω CBYPASS= 4.7µF (Note 11) WT1 = 0, WT0 = 0 OCL C-CUPL WT1 = 0, WT0 = 1 OCL C-CUPL WT1 = 1, WT0 = 0 OCL C-CUPL WT1 = 1, WT0 =1 OCL C-CUPL
µV
PSRR
Power Supply Rejection Ratio
77 63 76 62 51 56 58 69
55 dB (min) 57
dB
Xtalk
Channel-to-Channel Crosstalk
dB
66 222 92 405 143 774 246 1532 20 10 –76 18
93
TWU
Wake Up Time from Shutdown
msec
RIN AVMIN AVMAX ∆A V
Input Resistance Minimum Gain Maximum Gain Gain Accuracy per Step
Stereo mode Mono mode Code = 00000 Code = 11111 18dB ≥ AV ≥–44dB –44dB ≥ AV > –76dB OCL RLOAD = 32Ω VIN = AC GND
kΩ –72 17 dB (max) dB (min) dB
± 0.5 ± 1.0
2.0
± 1.0 ± 2.0
20
VOS
Output Offset Voltage
mV (max)
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LM4985
The following specifications apply for RL = 16Ω, f = 1kHz, and CB = 4.7µF unless otherwise specified. Limits apply to TA = 25˚C. Symbol Parameter Conditions LM4985 Typ (Note 6) VIN = 0V, IOUT = 0A Single-Channel no load OCL Single-Channel no load C-CUPL Dual-Channel no load OCL Dual-Channel no load C-CUPL VSHUTDOWN = GND Limit (Notes 7, 8) Units (Limits)
Electrical Characteristics VDD = 2.5V (Notes 1, 2)
IDD
Quiescent Power Supply Current
1.6 1 2.1 1.6 0.1 1.75 0.75
mA
ISD VSDIH VSDIL
Shutdown Current Logic Voltage Input High Logic Voltage Input Low
µA V (min) V (max)
PO
Output Power
THD+N < 1%, fIN = 1kHz RLOAD = 16Ω OCL RLOAD = 16Ω C-CUPL RLOAD = 32Ω OCL RLOAD = 32Ω C-CUPL = = = = 16Ω 16Ω 32Ω 32Ω OCL, PO = 26mW C-CUPL, PO = 20mW OCL, PO = 16mW C-CUPL, PO = 15mW
31 33 19 19 0.07 0.05 0.06 0.04 10
mW
THD+N
RLOAD RLOAD Total Harmonic Distortion + Noise RLOAD RLOAD Output Noise Voltage
%
VON
VIN = AC GND, AV = 0dB, A-weighted VRIPPLE = 200mVp-p (Note 9) fIN = 217Hz sinewave OCL C-CUPL fIN = 1kHz sinewave OCL C-CUPL Pout = 20mW, OCL RLOAD = 16Ω RLOAD= 32Ω Pout = 20mW. C-CUPL RLOAD = 16Ω RLOAD= 32Ω CBYPASS = 4.7µF (Note 11) WT1 = 0, WT0 = 0 OCL C-CUPL WT1 = 0, WT0 = 1 OCL C-CUPL WT1 = 1, WT0 = 0 OCL C-CUPL WT1 = 1, WT0 = 1 OCL C-CUPL
µV
PSRR
Power Supply Rejection Ratio
75 59 75 59 50 55 58 67
dB
dB
Xtalk
Channel-to-Channel Crosstalk
dB
66 214 92 544 145 1053 250 2098 20 10 –76 kΩ dB
TWU
Wake Up Time from Shutdown
msec
RIN AVMIN
Input Resistance Minimum Gain
Stereo mode Mono mode Code = 00000
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LM4985
Electrical Characteristics VDD = 2.5V (Notes 1, 2)
Symbol Parameter
(Continued) The following specifications apply for RL = 16Ω, f = 1kHz, and CB = 4.7µF unless otherwise specified. Limits apply to TA = 25˚C. Conditions LM4985 Typ (Note 6) Limit (Notes 7, 8) Units (Limits)
AVMAX ∆A V
Maximum Gain Gain Accuracy per Step
Code = 11111 18dB ≥ AV ≥ –44dB –44dB ≥ AV > –76dB OCL RLOAD = 32Ω VIN = AC GND
18
dB dB
± 0.5 ± 1.0
2.0
VOS
Output Offset Voltage
mV
Note 1: All voltages are measured with respect to the GND pin unless otherwise specified. Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is given, however, the typical value is a good indication of device performance. Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature, TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA)/ θJA or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4985, see power derating currents for more information. Note 4: Human Body Model: 100pF discharged through a 1.5kΩ resistor. Note 5: Machine Model: 200pF ≤ Cmm ≤ 220pF discharged through all pins. Note 6: Typicals are measured at 25˚C and represent the parametric norm. Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level). Note 8: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis. Note 9: 10Ω terminated input. Note 10: The LDA10A package has its exposed-DAP soldered to an exposed 1.2in2 area of 1oz. Printed circuit board copper. Note 11: The wake-up time (TWU) is calculated using the following formula; TWU = [CBYPASS (VDD) / 2 (IBYPASS)] + 40ms.
External Components Description
Components 1. CI
(Figure 2) Functional Description
Input coupling capacitor which blocks the DC voltage at the amplifier’s input terminals. Also creates a high-pass filter with Ri at fc = 1/(2πRiCi). Refer to the section Proper Selection of External Components, for an explanation of how to determine the value of Ci. Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing section for information concerning proper placement and selection of the supply bypass capacitor. Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of Proper Components, for information concerning proper placement and selection of CB Output coupling capacitor which blocks the DC voltage at the amplifier’s output. Forms a high pass filter with RL at fo = 1/(2πRLCo)
2. 3. 6.
CS CB Co
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LM4985
Typical Performance Characteristics
TA = 25˚C, AV = 0dB, fIN = 1kHz unless otherwise stated. THD+N vs Frequency VDD = 2.5V, RL = 16Ω POUT = 20mW, C-CUPL THD+N vs Frequency VDD = 3.6V, RL = 16Ω POUT = 50mW, C-CUPL
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THD+N vs Frequency VDD = 5V, RL = 16Ω POUT = 50mW, C-CUPL
THD+N vs Frequency VDD = 2.5V, RL = 32Ω POUT = 15mW, C-CUPL
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THD+N vs Frequency VDD = 3.6V, RL = 32Ω POUT = 35mW, C-CUPL
THD+N vs Frequency VDD = 5.0V, RL = 32Ω POUT = 60mW, C-CUPL
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LM4985
Typical Performance Characteristics
THD+N vs Frequency VDD = 2.5V, RL = 16Ω POUT = 20mW, OCL
(Continued) THD+N vs Frequency VDD = 3.6V, RL = 16Ω POUT = 50mW, OCL
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THD+N vs Frequency VDD = 5.0V, RL = 16Ω POUT = 50mW, OCL
THD+N vs Frequency VDD = 2.5V, RL = 32Ω POUT = 15mW, OCL
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THD+N vs Frequency VDD = 3.6V, RL = 32Ω POUT = 35mW, OCL
THD+N vs Frequency VDD = 5.0V, RL = 32Ω POUT = 60mW, OCL
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LM4985
Typical Performance Characteristics
THD+N vs Output Power VDD = 2.5V, RL = 16Ω C-CUPL
(Continued) THD+N vs Output Power VDD = 3.6V, RL = 16Ω C-CUPL
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THD+N vs Output Power VDD = 5.0V, RL = 16Ω C-CUPL
THD+N vs Output Power VDD = 2.5V, RL = 32Ω C-CUPL
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THD+N vs Output Power VDD = 3.6V, RL = 32Ω C-CUPL
THD+N vs Output Power VDD = 5.0V, RL = 32Ω C-CUPL
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LM4985
Typical Performance Characteristics
THD+N vs Output Power VDD = 2.5V, RL = 16Ω OCL
(Continued) THD+N vs Output Power VDD = 3.6V, RL = 16Ω OCL
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THD+N vs Output Power VDD = 5.0V, RL = 16Ω OCL
THD+N vs Output Power VDD = 2.5V, RL = 32Ω OCL
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THD+N vs Output Power VDD = 3.6V, RL = 32Ω OCL
THD+N vs Output Power VDD = 5.0V, RL = 32Ω OCL
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LM4985
Typical Performance Characteristics
PSRR vs Frequency VDD = 2.5V, RL = 16Ω VRIPPLE = 200mVpp, OCL
(Continued) PSRR vs Frequency VDD = 3.6V, RL = 16Ω VRIPPLE = 200mVpp, OCL
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PSRR vs Frequency VDD = 5.0V, RL = 16Ω VRIPPLE = 200mVpp, OCL
PSRR vs Frequency VDD = 2.5V, RL = 32Ω VRIPPLE = 200mVpp, OCL
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PSRR vs Frequency VDD = 3.6V, RL = 32Ω VRIPPLE = 200mVpp, OCL
PSRR vs Frequency VDD = 5.0V, RL = 32Ω VRIPPLE = 200mVpp, OCL
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201697H9
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LM4985
Typical Performance Characteristics
PSRR vs Frequency VDD = 2.5V, RL = 16Ω VRIPPLE = 200mVpp, C-CUPL
(Continued) PSRR vs Frequency VDD = 3.6V, RL = 16Ω VRIPPLE = 200mVpp, C-CUPL
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PSRR vs Frequency VDD = 5.0V, RL = 16Ω VRIPPLE = 200mVpp, C-CUPL
PSRR vs Frequency VDD = 2.5V, RL = 32Ω VRIPPLE = 200mVpp, C-CUPL
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PSRR vs Frequency VDD = 3.6V, RL = 32Ω VRIPPLE = 200mVpp, C-CUPL
PSRR vs Frequency VDD = 5.0V, RL = 32Ω VRIPPLE = 200mVpp, C-CUPL
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LM4985
Typical Performance Characteristics
Crosstalk vs Frequency VDD = 2.5V, RL = 16Ω POUT = 20mW. OCL
(Continued) Crosstalk vs Frequency VDD = 3.6V, RL = 16Ω POUT = 40mW, OCL
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Crosstalk vs Frequency VDD = 5.0V, RL = 16Ω POUT = 40mW, OCL
Crosstalk vs Frequency VDD = 2.5V, RL = 32Ω POUT = 20mW, OCL
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Crosstalk vs Frequency VDD = 3.6V, RL = 32Ω POUT = 40mW, OCL
Crosstalk vs Frequency VDD = 5.0V, RL = 32Ω POUT = 50mW, OCL
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201697H2
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LM4985
Typical Performance Characteristics
Crosstalk vs Frequency VDD = 2.5V, RL = 16Ω POUT = 20mW, C-CUPL
(Continued) Crosstalk vs Frequency VDD = 3.6V, RL = 16Ω POUT = 50mW, C-CUPL
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Crosstalk vs Frequency VDD = 5.0V, RL = 16Ω POUT = 50mW, C-CUPL
Crosstalk vs Frequency VDD = 2.5V, RL = 32Ω POUT = 20mW, C-CUPL
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Crosstalk vs Frequency VDD = 3.6V, RL = 32Ω POUT = 50mW, C-CUPL
Crosstalk vs Frequency VDD = 5.0V, RL = 32Ω POUT = 50mW, C-CUPL
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LM4985
Typical Performance Characteristics
Load Dissipation vs Amplifier Dissipation VDD = 2.5V, C-CUPL
(Continued) Load Dissipation vs Amplifier Dissipation VDD = 3.6V, C-CUPL
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Load Dissipation vs Amplifier Dissipation VDD = 5.0V, C-CUPL
Load Dissipation vs Amplifier Dissipation VDD = 2.5V, OCL
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Load Dissipation vs Amplifier Dissipation VDD = 3.6V, OCL
Load Dissipation vs Amplifier Dissipation VDD = 5.0V, OCL
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LM4985
Typical Performance Characteristics
Output Power vs Load Resistance VDD = 2.5V, C-CUPL
(Continued) Output Power vs Load Resistance VDD = 3.6V, C-CUPL
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Output Power vs Load Resistance VDD = 5.0V, C-CUPL
Output Power vs Load Resistance VDD = 2.5V, OCL
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Output Power vs Load Resistance VDD = 3.6V, OCL
Output Power vs Load Resistance VDD = 5.0V, OCL
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LM4985
Typical Performance Characteristics
Output Power vs Supply Voltage RL = 16Ω, C-CUPL
(Continued) Output Power vs Supply Voltage RL = 32Ω, C-CUPL
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Output Power vs Supply Voltage RL = 16Ω, OCL
Output Power vs Supply Voltage RL = 32Ω, OCL
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Supply Current vs Supply Voltage RL = 16Ω, C-CUPL
Supply Current vs Supply Voltage RL = 32Ω, C-CUPL
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LM4985
Typical Performance Characteristics
Supply Current vs Supply Voltage RL = 16Ω, OCL
(Continued) Supply Current vs Supply Voltage RL = 32Ω, OCL
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Gain vs Volume Steps VCC = 2.5V, RL = 16Ω, OCL
Gain vs Volume Steps VCC = 3.6V, RL = 16Ω, OCL
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Gain vs Volume Steps VCC = 5V, RL = 16Ω, OCL
Gain vs Volume Steps VCC = 2.5V, RL = 16Ω, C-CUPL
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LM4985
Typical Performance Characteristics
Gain vs Volume Steps VCC = 3.6V, RL = 16Ω, C-CUPL
(Continued) Gain vs Volume Steps VCC = 5V, RL = 16Ω, C-CUPL
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Gain vs Volume Steps VCC = 2.5V, RL = 32Ω, OCL
Gain vs Volume Steps VCC = 3.6V, RL = 32Ω, OCL
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Gain vs Volume Steps VCC = 5V, RL = 32Ω, OCL
Gain vs Volume Steps VCC = 2.5V, RL = 32Ω, C-CUPL
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LM4985
Typical Performance Characteristics
Gain vs Volume Steps VCC = 3.6V, RL = 32Ω, C-CUPL
(Continued) Gain vs Volume Steps VCC = 5V, RL = 32Ω, C-CUPL
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LM4985
Application Information
AMPLIFIER CONFIGURATION EXPLANATION As shown in Figure 1, the LM4985 has three internal power amplifiers. Two of the amplifiers which amplify signals applied to their inputs, have internally configurable gain. The remaining third amplifier provides both half-supply output bias and AC ground return. Loads, such as a headphone speaker, are connected between OUT1 and CNTGND or OUT2 and CNTGND. This configuration does not require an output coupling capacitor. The classical single-ended amplifier configuration, where one side of the load is connected to ground, requires large, expensive output coupling capacitors. A configuration such as the one used in the LM4985 has a major advantage over single supply, single-ended amplifiers. Since the outputs OUT1, OUT2, and CNTGND are all biased at 1/2 VDD, no net DC voltage exists across each load. This eliminates the need for output coupling capacitors which are required in a single-supply, single-ended amplifier configuration. Without output coupling capacitors in a typical singlesupply, single-ended amplifier, the bias voltage is placed across the load resulting in both increased internal IC power dissipation and possible loudspeaker damage. The LM4985 eliminates these output coupling capacitors when operating in Output Capacitor-less (OCL) mode. Unless shorted to ground, VoC is internally configured to apply a 1/2 VDD bias voltage to a stereo headphone jack’s sleeve. This voltage matches the bias voltage present on VoA and VoB outputs that drive the headphones. The headphones operate in a manner similar to a bridge-tied load (BTL). Because the same DC voltage is applied to both headphone speaker terminals this results in no net DC current flow through the speaker. AC current flows through a headphone speaker as an audio signal’s output amplitude increases on the speaker’s terminal. The headphone jack’s sleeve is not connected to circuit ground when used in OCL mode. Using the headphone output jack as a line-level output will place the LM4985’s 1/2 VDD bias voltage on a plug’s sleeve connection. This presents no difficulty when the external equipment uses capacitively coupled inputs. For the very small minority of equipment that is DC coupled, the LM4985 monitors the current supplied by the amplifier that drives the headphone jack’s sleeve. If this current exceeds 500mAPEAK, the amplifier is shutdown, protecting the LM4985 and the external equipment. POWER DISSIPATION Power dissipation is a major concern when using any power amplifier. When operating in capacitor-coupled mode (CCUPL), Equation 1 states the maximum power dissipation point for a single-ended amplifier operating at a given supply voltage and driving a specified output load. PDMAX = 2(VDD)
2
The maximum power dissipation point obtained from Equation 1 or Equation 2 must not be greater than the power dissipation that results from Equation 3: PDMAX = (TJMAX - TA) / θJA (3)
For package TMD12AAA, θJA = 190˚C/W. TJMAX = 150˚C for the LM4985. Depending on the ambient temperature, TA, of the system surroundings, Equation 3 can be used to find the maximum internal power dissipation supported by the IC packaging. If the result of Equation 2 is greater than that of Equation 3, then either the supply voltage must be decreased, the load impedance increased or TA reduced. For a typical application using a 3.6V power supply, with a 32Ω load, the maximum ambient temperature possible without violating the maximum junction temperature is approximately 144˚C provided that device operation is around the maximum power dissipation point. Thus, for typical applications, power dissipation is not an issue. Power dissipation is a function of output power and thus, if typical operation is not around the maximum power dissipation point, the ambient temperature may be increased accordingly. Refer to the Typical Performance Characteristics curves for power dissipation information for lower output powers. POWER SUPPLY BYPASSING As with any amplifier, proper supply bypassing is important for low noise performance and high power supply rejection. The capacitor location on the power supply pins should be as close to the device as possible. Typical applications employ a regulator with 10µF tantalum or electrolytic capacitor and a ceramic bypass capacitor which aid in supply stability. This does not eliminate the need for bypassing the supply nodes of the LM4985. A bypass capacitor value in the range of 0.1µF to 1µF is recommended for CS. MICRO POWER SHUTDOWN The LM4985’s micropower shutdown is activated or deactivated through its I2C digital interface . Please refer to Table 1 for the I2C Address, Register Select, and Mode Control registers. Each amplifier within the LM4985 can be shutdown individually. Please observe the following protocol when placing an individual amplifier channel in shutdown while the other channel remains active. The protocol requires activating both channels’ shutdown simultaneously, then deactivating the shutdown of the channel whose output is desired (or leaving the desire channel in shutdown mode). Also, when operating in the C-CUPL mode, a short delay time is required between activating one channel after placing both channels in shutdown. If the user finds that both channels activate when only one was chosen, increase the delay. SELECTION OF INPUT CAPACITOR SIZE Amplifying the lowest audio frequencies requires a high value input coupling capacitor, Ci. A high value capacitor can be expensive and may compromise space efficiency in portable designs. In many cases, however, the headphones used in portable systems have little ability to reproduce signals below 60Hz. Applications using headphones with this limited frequency response reap little improvement by using a high value input capacitor. In addition to system cost and size, turn on time is affected by the size of the input coupling capacitor Ci. A larger input
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/ (2π2RL)
(1)
When operating in the OCL mode, the LM4985’s three operational amplifiers produce a maximum power dissipation given in Equation 2: PDMAX = [2(VDD)
2
/ (2π2RL)] + [VDD2 / (4πRL)]
(2)
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LM4985
Application Information
(Continued)
coupling capacitor requires more charge to reach its quiescent DC voltage. This charge comes from the output via the feedback Thus, by minimizing the capacitor size based on necessary low frequency response, turn-on time can be minimized. A small value of Ci (in the range of 0.22µF to 0.68µF), is recommended. MAXIMIZING OCL MODE CHANNEL-to-CHANNEL SEPARATION The OCL mode AC ground return (CNT_GND pin) is shared by both amplifiers. As such, any resistance between the CNT_GND pin and the load will create a voltage divider with respect to the load resistance. In a typical circuit, the amount of CNT_GND resistance can be very small, but still significant. It is significant because of the relatively low load impedances for which the LM4985 was designed to drive: 16Ω
to 32Ω. The ratio of this voltage divider will determine the magnitude of any residual signal present at the CNT_GND pin. It is this residual signal that leads to channel-to-channel separation (crosstalk) degradation. For example, for a 60dB channel-to-channel separation while driving a 16Ω load, the resistance between the LM4985’s CNT_GND pin and the load must be less than 16mΩ. This is achieved by ensuring that the trace that connects the CNT_GND pin to the headphone jack sleeve should be as short and massive as possible, given the physical constraints of any specific printed circuit board layout and design. DEMONSTRATION BOARD AND PCB LAYOUT Information concerning PCB layout considerations and demonstration board use and performance is found in Application Note AN-1452.
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LM4985
I2C Control Register
Table 1 shows the actions that are implemented by manipulating the bits within the two internal I2C control registers. Table 1. LM4985 I2C Control Register Addressing and Data Format Chart LM4985 I2C Contorl Register Addressing and Data Chart I2C Address D7 Register Select 0 0 D7 0 – – – – – Mode Control Register – – – – – – – – – A6 1 D6 0 0 D6 WT1 X 0 0 1 1 X X X X X X X X X X A5 1 D5 0 0 D5 WT0 X 0 1 0 1 X X X X X X X X X X A4 0 D4 0 0 D4 PHG X X X X X 1 0 X X X X X X X X A3 0 D3 0 0 D3 SDCH1 X X X X X X X 0 0 1 1 X X X X A2 1 D2 0 0 D2 SDCH2 X X X X X X X 0 1 0 1 X X X X A1 1 RS1 0 0 D1 CHSEL1 X X X X X X X X X X X 0 0 1 1 A0 A0 RS0 0 1 D0 CHSEL2 X X X X X X X X X X X 02 1 0 1 D7 must always be set to 0 Wake-up time: 80ms (OCL), 250ms (C-CUPL) Wake-up time: 110ms (OCL), 450ms (C-CUPL) Wake-up time: 170ms (OCL), 850ms (C-CUPL) Wake-up time: 290ms (OCL), 1650ms (C-CUPL) Output capacitor-less mode active Output capacitor-less mode inactive Amplifier’s SHUTDOWN mode active Illegal mode Illegal mode Amplifier’s SHUTDOWN mode inactive Amplifier’s Chan. 1 is Input 1, Chan 2. is Input 2 Amplifier’s Chan. 1 is Input 1, Chan 2. is Input 1 Amplifier’s Chan. 1 is Input 2, Chan 2. is Input 2 Amplifier’s Chan. 1 is Input 2, Chan 2. is Input 1 Read and write the mode control register Read and write the volume control register Function
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LM4985
Volume Control Settings Binary Values
The minimum volume setting is set to –76dB when 00000 is loaded into the volume control register. Incrementing the volume control register in binary fashion increases the volume control setting, reaching full scale at 11111. Table C1 shows the value of the gain for each of the 32 binary volume control settings. Table C1. Binary Values for the Different Volume Control Gain Settings Gain 18 17 16 15 14 13 12 10 8 6 4 2 0 –2 –4 –6 –8 –10 –12 –14 –16 –18 –21 –24 –27 –30 –34 –38 –44 –52 –62 –76 B4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 B2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 B1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 B0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
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LM4985
Revision History
Rev 1.0 Date 05/17/06 Description Initial WEB release.
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LM4985 Stereo 135mW Low Noise Headphone Amplifier with Selectable Capacitive Coupled or Capacitor-less (OCL) Output and Digitally Controlled (I2C) Volume Control
Physical Dimensions
inches (millimeters) unless otherwise noted
micro SMD Order Number LM4985TM NS Package Number TMD12AAA X1 = 1.215mm ± 0.03mm X2 = 1.615mm ± 0.03mm X3 = 0.600mm ± 0.075mm
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