LM6218WM

LM6118/LM6218 Fast Settling Dual Operational Amplifiers May 1999 LM6118/LM6218 Fast Settling Dual Operational Amplifiers General Description The LM6118/LM6218 are monolithic fast-settling unity-gain-compensated dual operational amplifiers with ± 20 mA output drive capability. The PNP input stage has a typical bias current of 200 nA, and the operating supply voltage is ± 5V to ± 20V. These dual op amps use slew enhancement with special mirror circuitry to achieve fast response and high gain with low total supply current. The amplifiers are built on a junction-isolated VIP™ (Vertically Integrated PNP) process which produces fast PNP’s that complement the standard NPN’s. Features Typical j Low offset voltage: j 0.01% settling time: j Slew rate Av = −1: j Slew rate Av = +1: j Gain bandwidth: j Total supply current: j Output drives 50Ω load ( ± 1V) 0.2 mV 400 ns 140 V/µs 75 V/µs 17 MHz 5.5 mA Applications n D/A converters n Fast integrators n Active filters Connection Diagrams and Order Information Small Outline Package (WM) Dual-In-Line Package (J or N) DS010254-3 DS010254-4 Top View Order Number LM6218WM See NS Package Number M14B Top View Order Number LM6118N, LM6218AN or LM6218N See NS Package Number N08E VIP™ is a trademark of National Semiconductor Corporation. © 1999 National Semiconductor Corporation DS010254 www.national.com Typical Applications DS010254-1 Single ended input to differential output AV = 10, BW = 3.2 MHz 40 VPP Response = 1.4 MHz VS = ± 15V Wide-Band, Fast-Settling 40 VPP Amplifier www.national.com 2 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Total Supply Voltage Input Voltage Differential Input Current (Note 3) Output Current (Note 4) Power Dissipation (Note 5) ESD Tolerance (C = 100 pF, R = 1.5 kΩ) 42V (Note 2) ± 10 mA Internally Limited 500 mW Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10 sec.) 150˚C −65˚C to +150˚C 300˚C Operating Temp. Range LM6118 LM6218A LM6218 −55˚C to +125˚C −40˚C to +85˚C −40˚C to +85˚C ± 2 kV Electrical Characteristics ± 5V ≤ VS ≤ ± 20V, VCM = 0V, VOUT = 0V, IOUT = 0A, unless otherwise specified. Limits with standard type face are for TJ = 25˚C, and Bold Face Type are for Temperature Extremes. Typ Parameter Input Offset Voltage Input Offset Voltage Input Offset Current Input Bias Current Input Common Mode Rejection Ratio Positive Power Supply Rejection Ratio Negative Power Supply Rejection Ratio Large Signal Voltage Gain Conditions VS = ± 15V V− + 3V ≤ VCM ≤ V+ − 3.5V V− + 3V ≤ VCM ≤ V+ − 3.5V V− + 3V ≤ VCM ≤ V+ − 3.5V V− + 3V ≤ VCM ≤ V+ − 3.5V VS = ± 20V V− = −15V 5V ≤ V+ ≤ 20V V+ = 15V −20V ≤ V− ≤ −5V Vout = ± 15V VS = ± 20V Vout = ± 10V VS = ± 15V Supply = ± 20V VS = ± 15V VS = ± 15V, Pulsed VS = ± 15V, Vout = ± 10V RS = Rf = 2k, Cf = 10 pF VS = ± 15V, Vout = ± 10V RS = Rf = 2k, Cf = 10 pF VS = ± 15V, fo = 200 kHz ∆Vout = 10V, VS = ± 15V, RS = Rf = 2k, Cf = 10 pF Inverter Follower RL = 10k RL = 500 ( ± 20 mA) RL = 10k 25˚C 0.2 0.3 20 200 100 100 100 500 200 17.3 5.5 65 140 75 17 400 5 3 LM6118 Limits (Note 6) 1 2 1.5 2.5 50 250 350 950 90 85 90 85 90 85 150 100 50 30 LM6218A Limits (Note 6) 1 2 1.5 2.5 50 100 350 950 90 85 90 85 90 85 150 100 50 30 LM6218 Limits (Note 6) 3 4 3.5 4.5 100 200 500 1250 80 75 80 75 80 75 100 70 40 25 V/mV (min) V (min) mA (max) mA (max) V/µs (min) V/µs (min) MHz (min) ns pF pF V/mV (min) dB (min) dB (min) dB (min) nA (max) nA (max) mV (max) mV (max) Units VO Output Voltage Swing Total Supply Current Output Current Limit Slew Rate, Av = −1 Slew Rate, Av = +1 Gain-Bandwidth Product 0.01% Settling Time AV = −1 Input Capacitance ± 17 7 7.5 100 100 50 50 30 14 ± 17 7 7.5 100 100 50 50 30 14 ± 17 7 7.5 100 100 50 50 30 13 Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating the device beyond its rated operating conditions. Note 2: Input voltage range is (V+ − 1V) to (V−). 3 www.national.com Electrical Characteristics (Continued) Note 3: The inputs are shunted with three series-connected diodes back-to-back for input differential clamping. Therefore differential input voltages greater than about 1.8V will cause excessive current to flow unless limited to less than 10 mA. Note 4: Current limiting protects the output from a short to ground or any voltage less than the supplies. With a continuous overload, the package dissipation must be taken into account and heat sinking provided when necessary. Note 5: Devices must be derated using a thermal resistance of 90˚C/W for the N and WM packages. Note 6: Limits are guaranteed by testing or correlation. Typical Performance Characteristics Input Bias Current Input Noise Voltage Common Mode Limits DS010254-25 DS010254-26 DS010254-27 Common Mode Rejection Power Supply Rejection Frequency Response High Frequency DS010254-28 DS010254-29 DS010254-30 Unity Gain Bandwidth Unity Gain Bandwidth vs Output Load Large Signal Response (Sine Wave) DS010254-31 DS010254-32 DS010254-33 www.national.com 4 Typical Performance Characteristics Total Harmonic Distortion (Continued) Output Saturation Output Impedance DS010254-34 DS010254-35 DS010254-36 Output Current Limit Supply Current (Both Amplifiers) Slew Rate DS010254-37 DS010254-38 DS010254-39 Inverter Settling Time Follower Settling Time Typical Stability Range DS010254-40 DS010254-41 DS010254-42 5 www.national.com Typical Performance Characteristics Amplifier to Amplifier Coupling (Continued) Settling Time, Vs = ± 15V DS010254-23 DS010254-7 Step Response, Av = +1, Vs = ± 15V Step Response, Av = −1, Vs = ± 15V DS010254-8 DS010254-9 Application Information General The LM6118/LM6218 are high-speed, fast-settling dual op-amps. To insure maximum performance, circuit board layout is very important. Minimizing stray capacitance at the inputs and reducing coupling between the amplifier’s input and output will minimize problems. Supply Bypassing To assure stability, it is recommended that each power supply pin be bypassed with a 0.1 µF low inductance capacitor near the device. If high frequency spikes from digital circuits or switching supplies are present, additional filtering is recommended. To prevent these spikes from appearing at the output, R-C filtering of the supplies near the device may be necessary. Power Dissipation These amplifiers are specified to 20 mA output current. If accompanied with high supply voltages, relatively high power dissipation in the device will occur, resulting in high junction temperatures. In these cases the package thermal resistance must be taken into consideration. (See Note 5 under Electrical Characteristics.) For high dissipation, an N package with large areas of copper on the pc board is recommended. Amplifier Shut Down If one of the amplifiers is not used, it can be shut down by connecting both the inverting and non-inverting inputs to the V− pin. This will reduce the power supply current by approximately 25%. Capacitive Loading Maximum capacitive loading is about 50 pF for a closed-loop gain of +1, before the amplifier exhibits excessive ringing and becomes unstable. A curve showing maximum capacitive loads, with different closed-loop gains, is shown in the Typical Performance Characteristics section. To drive larger capacitive loads at low closed-loop gains, isolate the amplifier output from the capacitive load with 50Ω. Connect a small capacitor directly from the amplifier output to the inverting input. The feedback loop is closed from the isolated output with a series resistor to the inverting input. www.national.com 6 Application Information Voltage Follower (Continued) Integrator DS010254-10 DS010254-12 For CL = 1000 pF, Small signal BW = 5 MHz 20 Vp-p BW = 500 kHz Inverter Examples of unity gain connections for a voltage follower, Inverter, and integrator driving capacitive loads up to 1000 pF are shown here. Different R1–C1 time constants and capacitive loads will have an effect on settling times. Input Bias Current Compensation Input bias current of the first op amp can be reduced or balanced out by the second op amp. Both amplifiers are laid out in mirror image fashion and in close proximity to each other, thus both input bias currents will be nearly identical and will track with temperature. With both op amp inputs at the same potential, a second op amp can be used to convert bias current to voltage, and then back to current feeding the first op amp using large value resistors to reduce the bias current to the level of the offset current. Examples are shown here for an inverting application, (a) where the inputs are at ground potential, and a second circuit (b) for compensating bias currents for both inputs. DS010254-11 Settling time to 0.01%, 10V Step For CL = 1000 pF, settling time ≈ 1500 ns For CL = 300 pF, settling time ≈ 500 ns 7 www.national.com Application Information (Continued) Bias Current Compensation DS010254-14 *mount resistor close to input pin to minimize stray capacitance (b) Compensation to Both Inputs DS010254-13 *adjust for zero integrator drift (a) Inverting Input Bias Compensation for Integrator Application Amplifier/Parallel Buffer DS010254-15 AV = +5, IOUT ≤ 80 mA VS = ± 15V, CL ≤ 0.01 µF Large and small signal B.W. = 1.3 MHz (THD = 3%) www.national.com 8 Application Information (Continued) Constant-Voltage Crossover Network With 12 dB/Octave Slope DS010254-16 Bilateral Current Source Coaxial Cable Driver DS010254-17 VS = ± 15V, −10 ≤ VIN ≤ 10V DS010254-19 Output dynamic range = 10V − R6 |IOUT| RL = 500Ω, small signal BW = 6 MHz Large signal response = 800 kHz Small signal (200 mVp-p) BW ≈ 5 MHz 9 www.national.com Application Information (Continued) 150 MHz Gain-Bandwidth Amplifier Instrumentation Amplifier DS010254-20 DS010254-18 AV = 10, VS = ± 15V, All resistors 0.01% Small signal and large signal (20 VP-P) B.W. ≈ 800 kHz AV = 100, VS = ± 15V, Small signal BW ≈ 1.5 MHz Large signal BW (20 Vp-p) ≈ 800 kHz Schematic Diagram 1/2 LM6118 (Op Amp A) DS010254-21 www.national.com 10 Schematic Diagram (Continued) Bias Circuit DS010254-22 11 www.national.com Physical Dimensions inches (millimeters) unless otherwise noted 8-Lead Molded Small Outline Package (M) Order Number LM6218AWM or LM6218WM NS Package Number M14B www.national.com 12 LM6118/LM6218 Fast Settling Dual Operational Amplifiers Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 8-Lead Molded Dual-In-Line Package (N) Order Number LM6118N, LM6218AN or LM6218N NS Package Number N08E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. 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