LM6161/LM6261/LM6361 High Speed Operational Amplifier
May 1999
LM6161/LM6261/LM6361 High Speed Operational Amplifier
General Description
The LM6161 family of high-speed amplifiers exhibits an excellent speed-power product in delivering 300 V/µs and 50 MHz unity gain stability with only 5 mA of supply current. Further power savings and application convenience are possible by taking advantage of the wide dynamic range in operating supply voltage which extends all the way down to +5V. These amplifiers are built with National’s VIP™ (Vertically Integrated PNP) process which provides fast PNP transistors that are true complements to the already fast NPN devices. This advanced junction-isolated process delivers high speed performance without the need for complex and expensive dielectric isolation. n n n n n n n n High unity gain freq 50 MHz Low supply current 5 mA Fast settling 120 ns to 0.1% Low differential gain < 0.1% Low differential phase 0.1˚ Wide supply range 4.75V to 32V Stable with unlimited capacitive load Well behaved; easy to apply
Applications
n n n n n Video amplifier High-frequency filter Wide-bandwidth signal conditioning Radar Sonar
Features
n High slew rate 300 V/µs
Connection Diagrams
10–Lead Flatpak
DS009057-13
See NS Package Number W10A
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See NS Package Number J08A, N08E or M08A Temperature Range Military −55˚C ≤ TA ≤ +125˚C Industrial −25˚C ≤ TA ≤ +85˚C LM6261N LM6161J/883 5962-8962101PA LM6261M LM6161WG/883 5962-8962101XA LM6161W/883 5962-8962101HA LM6361M Commercial 0˚C ≤ TA ≤ +70˚C LM6361N LM6361J 8-Pin Molded DIP 8-Pin Ceramic DIP 8-Pin Molded Surface Mt. 10-Lead Ceramic SOIC 10-Pin Ceramic Flatpak W10A WG10A M08A J08A N08E Package NSC Drawing
VIP™ is a trademark of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation
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Absolute Maximum Ratings (Note 12)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (V+ − V−) Differential Input Voltage (Note 8) Common-Mode Voltage Range (Note 10) Output Short Circuit to GND (Note 1) Soldering Information Dual-In-Line Package (N, J) Soldering (10 sec.) Small Outline Package (M) Vapor Phase (60 sec.) Infrared (15 sec.) 36V
See AN-450 “Surface Mounting Methods and Their Effect on Product Reliability” for other methods of soldering surface mount devices. Storage Temp Range −65˚C to +150˚C Max Junction Temperature 150˚C ± 700V ESD Tolerance (Notes 6, 7)
± 8V
(V+ − 0.7V) to (V− + 0.7V) Continuous
Operating Ratings (Note 12)
Temperature Range (Note 2) LM6161 LM6261 LM6361 Supply Voltage Range −55˚C ≤ TJ ≤ +125˚C −25˚C ≤ TJ ≤ +85˚C 0˚C ≤ TJ ≤ +70˚C 4.75V to 32V
260˚C 215˚C 220˚C
DC Electrical Characteristics
The following specifications apply for Supply Voltage = ± 15V, VCM = 0, RL ≥ 100 kΩ and RS = 50Ω unless otherwise noted. Boldface limits apply for TJ = TMIN to TMAX; all other limits TJ = 25˚C. Symbol Parameter Conditions Typ LM6161 Limit (Notes 3, 11) VOS VOS Drift Ib IOS IOS Drift RIN CIN AVOL Input Offset Voltage Input Offset Voltage Average Drift Input Bias Current Input Offset Current Input Offset Current Average Drift Input Resistance Input Capacitance Large Signal Voltage Gain VCM Input Common-Mode Voltage Range −13.2 Supply = +5V (Note 4) 1.8 CMRR PSRR Common-Mode Rejection Ratio Power Supply Rejection Ratio −10V ≤ VCM ≤ +10V 94 90 4.0 Differential AV = +1 @ 10 MHz VOUT = ± 10V, RL = 2 kΩ (Note 9) RL = 10 kΩ (Note 9) Supply = ± 15V 325 1.5 750 2900 +14.0 +13.9 +13.8 −12.9 −12.7 3.9 3.8 2.0 2.2 80 74 80 74 +13.9 +13.8 −12.9 −12.7 3.9 3.8 2.0 2.2 80 76 80 76 +13.8 +13.7 −12.8 −12.7 3.8 3.7 2.1 2.2 72 70 72 70 550 300 550 400 400 350 kΩ pF V/V Min V/V Volts Min Volts Min Volts Min Volts Max dB Min dB Min 2 150 0.4 3 6 350 800 3 5 350 600 5 6 1500 1900 µA Max nA Max nA/˚C 5 10 7 10 LM6261 Limit (Note 3) 7 9 LM6361 Limit (Note 3) 20 22 mV Max µV/˚C Units
± 10V ≤ V± ≤ ± 16V
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DC Electrical Characteristics
Symbol Parameter
(Continued)
The following specifications apply for Supply Voltage = ± 15V, VCM = 0, RL ≥ 100 kΩ and RS = 50Ω unless otherwise noted. Boldface limits apply for TJ = TMIN to TMAX; all other limits TJ = 25˚C. Conditions Typ LM6161 Limit (Notes 3, 11) VO Output Voltage Swing Supply = ± 15V and RL = 2 kΩ +14.2 −13.4 Supply = +5V and RL = 2 kΩ (Note 4) Output Short Circuit Current Sink IS Supply Current 65 5.0 Source 4.2 1.3 65 +13.5 +13.3 −13.0 −12.7 3.5 3.3 1.7 2.0 30 20 30 20 6.5 6.8 LM6261 Limit (Note 3) +13.5 +13.3 −13.0 −12.8 3.5 3.3 1.7 1.9 30 25 30 25 6.5 6.7 LM6361 Limit (Note 3) +13.4 +13.3 −12.9 −12.8 3.4 3.3 1.8 1.9 30 25 30 25 6.8 6.9 Volts Min Volts Min Volts Min Volts Max mA Min mA Min mA Max Units
AC Electrical Characteristics
The following specifications apply for Supply Voltage = ± 15V, VCM = 0, RL ≥ 100 kΩ and RS = 50Ω unless otherwise noted. Boldface limits apply for TJ = TMIN to TMAX; all other limits TJ = 25˚C. LM6161 Symbol GBW Parameter Gain-Bandwidth Product SR Slew Rate Supply = ± 5V AV = +1 (Note 8) Supply = ± 5V (Note 8) VOUT = 20 VPP 10V Step to 0.1% AV = −1, RL = 2 kΩ NTSC, AV = +4 NTSC, AV = +4 f = 10 kHz f = 10 kHz 35 300 200 4.5 120 45 200 180 PBW tS φm AD φD enp-p inp-p Power Bandwidth Settling Time Phase Margin Differential Gain Differential Phase Input Noise Voltage Input Noise Current 200 180 200 180 Conditions
@ f = 20 MHz
LM6261 Limit (Note 3) 40 35
LM6361 Limit (Note 3) 35 32 MHz Min MHz V/µs Min V/µs MHz ns Deg % Deg Units
Typ 50
Limit (Notes 3, 11) 40 30
< 0.1
0.1 15 1.5
Note 1: Continuous short-circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150˚C. Note 2: The typical junction-to-ambient thermal resistance of the molded plastic DIP (N) is 105˚C/W, the molded plastic SO (M) package is 155˚C/W, and the cerdip (J) package is 125˚C/W. All numbers apply for packages soldered directly into a printed circuit board. Note 3: Limits are guaranteed by testing or correlation. Note 4: For single supply operation, the following conditions apply: V+ = 5V, V− = 0V, VCM = 2.5V, VOUT = 2.5V. Pin 1 & Pin 8 (Vos Adjust) are each connected to Pin 4 (V−) to realize maximum output swing. This connection will degrade VOS, VOS Drift, and Input Voltage Noise. Note 5: CL ≤ 5 pF. Note 6: In order to achieve optimum AC performance, the input stage was designed without protective clamps. Exceeding the maximum differential input voltage results in reverse breakdown of the base-emitter junction of one of the input transistors and probable degradation of the input parameters (especially Vos, Ios, and Noise).
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AC Electrical Characteristics
Note 8: VIN = 8V step. For supply = ± 5V, VIN = 5V step.
(Continued)
Note 7: The average voltage that the weakest pin combinations (those involving Pin 2 or Pin 3) can withstand and still conform to the datasheet limits. The test circuit used consists of the human body model of 100 pF in series with 1500Ω. Note 9: Voltage Gain is the total output swing (20V) divided by the input signal required to produce that swing. Note 10: The voltage between V+ and either input pin must not exceed 36V. Note 11: A military RETS electrical test specification is available on request. At the time of printing, the RETS6161X specs complied with all Boldface limits in this column. Note 12: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed.
Typical Performance Characteristics
Supply Current vs Supply Voltage Common-Mode Rejection Ratio
(RL = 10 kΩ, TA = 25˚C unless otherwise specified) Power Supply Rejection Ratio
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Gain-Bandwidth Product
Propagation Delay Rise and Fall Times
Gain-Bandwidth Product vs Load Capacitance
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Slew Rate vs Load Capacitance
Overshoot vs Capacitive Load
Slew Rate
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Typical Performance Characteristics
specified) (Continued) Voltage Gain vs Load Resistance
(RL = 10 kΩ, TA = 25˚C unless otherwise
Gain vs Supply Voltage
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Differential Gain (Note 13)
Differential Phase (Note 13)
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Note 13: Differential gain and differential phase measured for four series LM6361 op amps configured as unity-gain followers, in series with an LM6321 buffer. Error added by LM6321 is negligible. Test performed using Tektronix Type 520 NTSC test system.
Step Response; Av = +1
Input (2v/div) Output (2v/div)
(50 ns/div)
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Typical Performance Characteristics
specified) (Continued) Input Noise Voltage
(RL = 10 kΩ, TA = 25˚C unless otherwise
Input Noise Current
Power Bandwidth
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Open-Loop Frequency Response
Open-Loop Frequency Response
Output Impedence (Open-Loop)
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Common-Mode Input Saturation Voltage
Output Saturation Voltage
Bias Current vs Common-Mode Voltage
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Simplified Schematic
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Applications Tips
The LM6361 has been compensated for unity-gain operation. Since this compensation involved adding emitterdegeneration resistors to the op amp’s input stage, the open-loop gain was reduced as the stability increased. Gain error due to reduced AVOL is most apparent at high gains; thus, for gains between 5 and 25, the less-compensated LM6364 should be used, and the uncompensated LM6365 is appropriate for gains of 25 or more. The LM6361, LM6364, and LM6365 have the same high slew rate, regardless of their compensation. The LM6361 is unusually tolerant of capacitive loads. Most op amps tend to oscillate when their load capacitance is greater than about 200 pF (especially in low-gain circuits). The LM6361’s compensation is effectively increased with load capacitance, reducing its bandwidth and increasing its stability. Power supply bypassing is not as critical for the LM6361 as it is for other op amps in its speed class. Bypassing will, however, improve the stability and transient response and is recommended for every design. 0.01 µF to 0.1 µF ceramic capacitors should be used (from each supply “rail” to ground); if the device is far away from its power supply source, an additional 2.2 µF to 10 µF of tantalum may provide extra noise reduction. Keep all leads short to reduce stray capacitance and lead inductance, and make sure ground paths are low-impedance, especially where heavier currents will be flowing. Stray capacitance in the circuit layout can cause signal coupling across adjacent nodes and can cause gain to unintentionally vary with frequency. Breadboarded circuits will work best if they are built using generic PC boards with a good ground plane. If the op amps are used with sockets, as opposed to being soldered into the circuit, the additional input capacitance may degrade circuit performance.
Typical Applications
Offset Voltage Adjustment 1 MHz Low-Pass Filter
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Typical Applications
(Continued) Modulator with Differential-to-Single-Ended Converter
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Physical Dimensions
inches (millimeters) unless otherwise noted
Ceramic Dual-In-Line Package (J) Order Number LM6161J/883 NS Package Number J08A
Molded Package SO (M) Order Number LM6261M or LM6361M NS Package Number M08A
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Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
Molded Dual-In-Line Package (N) Order Number LM6261N or LM6361N NS Package Number N08E
10-Pin Ceramic Flatpak Order Number LM6161W/883 NS Package Number W10A
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LM6161/LM6261/LM6361 High Speed Operational Amplifier
Notes
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