LM6629MFX

LMH6629 Ultra-Low Noise, High-Speed Operational Amplifier with Shutdown November 2, 2010 LMH6629 Ultra-Low Noise, High-Speed Operational Amplifier with Shutdown General Description The LMH6629 is a high-speed, ultra low-noise amplifier designed for applications requiring wide bandwidth with high gain and low noise such as in communication, test and measurement, optical and ultrasound systems. The LMH6629 operates on 2.7 to 5.5V supply with an input common mode range that extends below ground and outputs that swing to within 0.8V of the rails for ease of use in single supply applications. Heavy loads up to ±250 mA can be driven by high-frequency large signals with the LMH6629's –3dB bandwidth of 900 MHz and 1600 V/µs slew rate. The LMH6629 (LLP-8 package only) has user-selectable internal compensation for minimum gains of 4 or 10 controlled by pulling the COMP pin low or high, thereby avoiding the need for external compensation capacitors required in competitive devices. Compensation for the SOT23-5 package is internally set for a minimum stable gain of 10 V/V. The LLP-8 package also provides the power-down enable/ disable feature. The low-input noise (0.69nV/√Hz and 2.6 pA/√Hz), low distortion (HD2/ HD3 = −90 dBc/−94 dBc) and ultra-low DC errors (800 µV VOS maximum over temperature, ±0.45 µV/°C drift) allow precision operation in both AC- and DC-coupled applications. The LMH6629 is fabricated in National Semiconductor’s proprietary SiGe process and is available in a 3mm x 3mm 8-pin LLP, as well as the SOT23-5, package. Features Specified for VS = 5V, RL = 100Ω, AV = 10V/V LLP-8 package, unless specified 900 MHz ■ –3dB bandwidth 0.69 nV/√Hz ■ Input voltage noise ±0.8 mV ■ Input offset voltage max. over temperature 1600 V/ μs ■ Slew rate −90 dBc ■ HD2 @ f = 1MHz, 2VPP −94 dBc ■ HD3 @ f = 1MHz, 2VPP 2.7V to 5.5V ■ Supply voltage range 15.5 mA ■ Typical supply current Selectable min. gain ≥4 or ≥10 V/V ■ 75 ns ■ Enable Time ±250 mA ■ Output Current ■ LLP-8 and SOT23-5 Packages Applications ■ ■ ■ ■ ■ ■ ■ ■ Instrumentation Amplifiers Ultrasound Pre-amps Wide-band Active Filters Opto-electronics Medical imaging systems Base-station Amplifiers Low-Noise Single Ended to Differential Conversion Trans-impedance amplifier Typical Application Circuit 30068011 FIGURE 1. Transimpedance Amplifier © 2010 National Semiconductor Corporation 300680 www.national.com LMH6629 Ordering Information Package LLP-8 Part Number LMH6629SD LMH6629SDE LMH6629SDX LMH6629MF SOT23-5 LMH6629MFE LM6629MFX AE7A L6629 Package Marking Transport Media 1k Units Tape and Reel 250 Units Tape and Reel 4.5k Units Tape and Reel 1k Units Tape and Reel 250 Units Tape and Reel 3k Units Tape and Reel MF05A SDA08A NSC Drawing Connection Diagrams 30068001 30068052 LLP-8 (Top View) SOT23-5 (Top View) www.national.com 2 LMH6629 Absolute Maximum Ratings (Note 1, Note 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 4) Human Body Model Machine Model Charge-Device Model Positive Supply Voltage Differential Input Voltage Analog Input Voltage Range Digital Input Voltage 2kV 200V 750V −0.5 to 6.0V 3V −0.5 to VS −0.5 to VS Junction Temperature +150°C Storage Temperature Range −65°C to +150°C Soldering Information See Product Folder at www.national.com and http:// www.national.com/ms/MS/MS-SOLDERING.pdf Operating Ratings Supply Voltage (V+ - V− Operating Temperature Range Package LLP-8 SOT23-5 (Note 1) 2.7V to 5.5V −40°C to +125°C (θJA) 71°C/W 179°C/W 5V Electrical Characteristics The following specifications apply for single supply with VS = 5V, RL = 100Ω terminated to 2.5V, gain = 10V/V, VO = 2VPP, VCM = VS/2, COMP Pin = HI (LLP-8 package), unless otherwise noted. Boldface limits apply at the temperature extremes. (Note 2). Symbol Parameter Conditions Min (Note 6) Typ (Note 6) 900 1000 800 380 190 330 190 95 0 dB 2 1600 530 0.90 0.95 ns 2.8 42 2 V/μs MHz MHz MHz Max (Note 6) Units DYNAMIC PERFORMANCE VO = 200 mVPP, LLP-8 package SSBW Small signal −3dB bandwidth VO = 200 mVPP, SOT23-5 package AV= 4, VO = 200 mVPP, COMP Pin = LO VO = 2VPP COMP Pin = LO, AV= 4, VO = 2VPP AV= 10, VO = 200 mVPP, LLP-8 package 0.1 dB bandwidth AV= 10, VO = 200 mVPP, SOT23-5 package AV= 4, VO = 200 mVPP, COMP Pin = LO VO = 200 mVPP, LLP-8 package VO = 200 mVPP, SOT23-5 package AV= 10, 2V step SR Slew rate AV= 4, 2V step, COMP Pin = LO AV= 10, 2V step, 10% to 90%, LLP-8 package tr/ tf Rise/fall time AV= 10, 2V step, 10% to 90%, SOT23-5 package AV= 4, 2V step, 10% to 90%, COMP Pin = LO, (Slew Rate Limited) Ts Settling time Overload Recovery AV= 10, 1V step, ±0.1% VIN = 1VPP LSBW Large signal −3dB bandwidth Peaking 3 www.national.com LMH6629 Symbol Parameter Conditions Min (Note 6) Typ (Note 6) −90 −88 −70 −65 −94 −87 −82 −75 31 27 0.69 2.6 8.0 Max (Note 6) Units NOISE AND DISTORTION fc = 1MHz, VO = 2VPP COMP Pin = LO, AV= 4, fc = 1 MHz, VO = 2VPP fc = 10 MHz, VO = 2VPP COMP Pin = LO, fc = 10 MHz, AV= 4V, VO = 2VPP fc = 1MHz, VO = 2VPP COMP Pin = LO, AV= 4, fc = 1MHz, VO = 2VPP fc = 10 MHz, VO = 2VPP COMP Pin = LO, fc = 10 MHz, VO = 2VPP OIP3 en in NF ANALOG I/O CMRR > 70 dB, LLP-8 package CMVR Input voltage range CMRR > 70 dB, SOT23-5 package RL = 100Ω to VS/2 VO Output voltage range No Load IOUT VOS TcVOS IBI IOS TCIOS CCM RCM Linear output current Input offset voltage Input offset voltage temperature drift Input bias current Input offset current Input offset voltage temperature drift Input capacitance Input resistance (Note 7) Common Mode Common Mode 82 70 81 78 LLP-8 package SOT23-5 package 74 72 (Note 7) (Note 6) VO = 2.5V (Note 3) 0.89 0.95 0.76 0.85 −0.30 −0.30 to 3.8 0.82 to 4.19 0.72 to 4.28 250 ±150 ±0.45 −15 ±0.1 ±2.8 1.7 450 −23 −37 ±1.8 ±3.0 ±780 ±800 4.0 3.9 4.1 4.0 3.8 V Two-tone 3rd order intercept point Noise Voltage Noise current Noise Figure fc = 25 MHz, VO = 2 VPP composite fc = 75 MHz, VO = 2VPP composite Input referred f > 1MHz RS = RT = 50Ω HD2 2nd order distortion dBc HD3 3rd order distortion dBc dBm nV/√Hz pA/√Hz dB V mA µV μV/°C μA μA nA/°C pF kΩ MISCELLANEOUS PARAMETERS CMRR Common mode rejection VCM from 0V to 3.7V, LLP-8 package ratio VCM from 0V to 3.7V, SOT23-5 package Power supply rejection ratio Open loop gain 87 87 83 78 78 dB PSRR AVOL www.national.com 4 LMH6629 Symbol Parameter Conditions Min (Note 6) Typ (Note 6) Max (Note 6) Units DIGITAL INPUTS/TIMING VIL VIH IIL IIH Ten Tdis Logic low-voltage threshold Logic high-voltage threshold Logic low-bias current Logic high-bias current Enable time Disable time PD and COMP pins, , LLP-8 package PD and COMP pins, LLP-8 package PD and COMP pins = 0.8V, , LLP-8 package(Note 6) PD and COMP pins = 2.5V, LLP-8 package(Note 6) LLP-8 package LLP-8 package No Load, Normal Operation (PD Pin = HI or open for LLP-8 package) No Load, Shutdown (PD Pin =LO for LLP-8 package) 2.5 −23 −19 −16 −14 −28 −22 75 80 16.7 18.2 1.85 2.0 −34 −38 −27 −29 0.8 V µA ns POWER REQUIREMENTS 15.5 1.1 IS Supply Current mA 5 www.national.com LMH6629 3.3V Electrical Characteristics The following specifications apply for single supply with VS = 3.3V, RL = 100Ω terminated to 1.65V, gain = 10V/V, VO = 1VPP, VCM = VS/2, COMP Pin = HI (LLP-8 package), unless otherwise noted. Boldface limits apply at the temperature extremes. (Note 2) Symbol Parameter Conditions Min (Note 5) Typ (Note 5) 820 950 730 540 320 330 190 85 0 1.8 1100 500 0.7 0.55 ns 1.3 70 2 –82 -88 -67 -74 -94 -112 -79 –96 30 26 0.69 2.6 8.0 dBm nV/√HZ pA/√HZ dB dBc dBc dB V/µs MHz MHz Max (Note 5) Units DYNAMIC PERFORMANCE VO = 200 mVPP, LLP-8 package SSBW Small signal −3dB bandwidth VO = 200 mVPP, SOT23-5 package COMP Pin = LO, AV= 4, VO = 200 mVPP VO = 1VPP COMP Pin = LO, AV= 4, VO = 1VPP AV= 10, VO = 200 mVPP, LLP-8 package 0.1 dB bandwidth AV= 10, VO = 200 mVPP, SOT23-5 package COMP Pin = LO, AV= 4, VO = 200 mVPP Peaking SR Slew rate VO = 200 mVPP, LLP-8 package VO = 200 mVPP, SOT23-5 package AV= 10, 1.3V step COMP Pin = LO, AV= 4, 1.3V step AV= 10, 1V step, 10% to 90%, LLP-8 package tr/ tf Rise/fall time AV= 10, 1V step, 10% to 90%, SOT23-5 package AV= 4, COMP Pin = LO, 1V step, 10% to 90% (Slew Rate Limited) Ts Settling time Overload Recovery NOISE AND DISTORTION fc = 1MHz, VO = 1VPP COMP Pin = LO, AV= 4, fc = 1MHz, VO = 1VPP fc = 10 MHz, VO = 1VPP COMP Pin = LO, fc = 10 MHz, AV= 4V, VO = 1VPP fc = 1MHz, VO = 1VPP COMP Pin = LO, AV= 4, fc = 1MHz, VO = 1VPP fc = 10 MHz, VO = 1VPP COMP pin = LO, fc = 10 MHz, VO = 1VPP OIP3 en in NF Two-tone 3rd Order Intercept Point Noise voltage Noise current Noise figure fc = 25 MHz, VO = 1VPP composite fc = 75 MHz, VO = 1VPP composite Input referred, f > 1MHz RS = RT = 50Ω AV= 10, 1V step, ±0.1% VIN = 1VPP MHz LSBW Large signal −3dB bandwidth HD2 2nd order distortion HD3 3rd order distortion www.national.com 6 LMH6629 Symbol ANALOG I/O Parameter Conditions Min (Note 5) −0.30 Typ (Note 5) Max (Note 5) 2.1 Units CMRR > 70 dB, LLP-8 package CMVR Input voltage range CMRR > 70 dB, SOT23-5 package RL = 100Ω to VS/2 VO Output voltage range No load IOUT VOS TcVOS IBI IOS TCIOS CCM RCM Linear output current Input Offset Voltage Input offset voltage temperature drift Input Bias Current Input Offset Current Input offset voltage temperature drift Input Capacitance Input Resistance (Note 7) Common Mode Common Mode (Note 7) (Note 6) VO = 1.65V (Note 3) −0.30 to 2.1 0.90 0.95 0.76 0.80 0.79 to 2.50 0.70 to 2.60 230 ±150 ±1 −15 ±0.13 ±3.2 1.7 1 84 81 −23 −35 ±1.8 ±3.0 ±680 ±700 2.4 2.3 2.5 2.4 V V mA µV μV/°C μA μA nA/°C pF MΩ MISCELLANEOUS PARAMETERS Common Mode Rejection Ratio VCM from 0V to 2.0V, LLP-8 package VCM from 0V to 2.0V, SOT23-5 package 82 79 LLP-8 package SOT23-5 package DIGITAL INPUTS/TIMING VIL VIH IIL IIH Ten Tdis Logic low-voltage threshold Logic high-voltage threshold Logic low-bias current Logic high-bias current Enable time Disable time PD and COMP pins, LLP-8 package PD and COMP pins = 0.8V, LLP-8 package (Note 6) PD and COMP pins = 2.0V, LLP-8 package (Note 6) LLP-8 package LLP-8 package No Load, Normal Operation (PD Pin = HI or open for LLP-8 package) No Load, Shutdown (PD Pin = LO for LLP-8 package) 0.8 2.0 -17 −14 −16 −13 −23 −22 75 80 14.9 16.0 1.4 1.5 −28 −32 −27 −31 V 78 73 87 87 84 79 79 dB CMRR PSRR Power supply rejection ratio AVOL Open Loop Gain µA ns POWER REQUIREMENTS 13.7 0.89 IS Supply Current mA 7 www.national.com LMH6629 Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Note 2: Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Note 3: The maximum continuous output current (IOUT) is determined by device power dissipation limitations. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C Note 4: Human Body Model, applicable std. JESD22-A114C. Machine Model, applicable std. JESD22-A115-A. Field Induced Charge Device Model, applicable std. JESD22-C101-C. Note 5: Typical numbers are the most likely parametric norm. Bold numbers refer to over-temperature limits. Note 6: Negative input current implies current flowing out of the device. Note 7: Drift determined by dividing the change in parameter at temperature extremes by the total temperature change. www.national.com 8 LMH6629 Typical Performance Characteristics Unless otherwise specified, VS = ±2.5V, Rf = 240Ω, RL = 100Ω, VO = 2VPP, COMP pin = HI, AV = +10 V/V, LLP-8 and SOT23-5 packages (unless specifically noted). Inverting Frequency Response Inverting Frequency Response 30068003 30068004 Non-Inverting Frequency Response Non-Inverting Frequency Response 30068005 30068006 Non-Inverting Frequency Response, LLP-8 Package Non-Inverting Frequency Response, SOT23-5 Package 30068069 30068068 9 www.national.com LMH6629 Non-Inverting Frequency Response with Varying VO, LLP-8 Package Non-Inverting Frequency Response with Varying VO, SOT23-5 Package 30068007 30068010 Non-Inverting Frequency Response with Varying VO, LLP-8 Package Non-Inverting Frequency Response with Varying VO, SOT23-5 Package 30068008 30068027 Non-Inverting Frequency Response with Varying VO, LLP-8 Package Non-Inverting Frequency Response with Varying VO, LLP-8 Package 30068013 30068014 www.national.com 10 LMH6629 Frequency Response with Cap. Loading Frequency Response Cap. Loading, LLP-8 Package 30068015 30068016 Frequency Response vs. Rf, LLP-8 Package Frequency Response vs. Rf, SOT23-5 Package 30068017 30068030 Frequency Response vs. Rf, LLP-8 Package Frequency Response vs. Rf, SOT23-5 Package 30068038 30068041 11 www.national.com LMH6629 Distortion vs. Swing, LLP-8 Package Distortion vs. Swing, SOT23-5 Package 30068043 30068042 Distortion vs. Swing, LLP-8 Package Distortion vs. Swing, SOT23-5 Package 30068077 30068045 Distortion vs. Gain, LLP-8 Package Distortion vs. Gain, SOT23-5 Package 30068078 30068048 www.national.com 12 LMH6629 Distortion vs. Frequency, LLP-8 Package Distortion vs. Frequency, SOT23-5 Package 30068044 30068047 3rd Order Intermodulation Distortion vs. Output Voltage Input Noise Voltage vs. Frequency 30068062 30068096 Input Noise Current vs. Frequency PSRR vs. Frequency 30068063 30068009 13 www.national.com LMH6629 Open Loop Gain/Phase Response Output Source Current, LLP-8 Package 30068060 30068057 Output Sink Current LLP-8 Package Output Source Current, SOT23-5 Package 30068058 30068065 Output Sink Current, SOT23-5 Package Large Signal Step Response 30068073 30068066 www.national.com 14 LMH6629 Large Signal Step Response Large Signal Step Response 30068074 30068064 Large Signal Step Response Small Signal Step Response, LLP-8 Package 30068046 30068075 Small Signal Step Response, LLP-8 Package Turn-On Waveform, LLP-8 Package 30068076 30068025 15 www.national.com LMH6629 Turn-Off Waveform, LLP-8 Package Supply Current vs. Supply Voltage 30068024 30068090 Offset Voltage vs. Supply Voltage (Typical Unit) Input Bias Current vs. Supply Voltage (Typical Unit) 30068067 30068091 Input Offset Current vs. Supply Voltage (Typical Unit) 30068053 www.national.com 16 LMH6629 Application Section INTRODUCTION The LMH6629 is a high gain bandwidth, ultra low-noise voltage feedback operational amplifier. The excellent noise and bandwidth enables applications such as medical diagnostic ultrasound, magnetic tape & disk storage and fiberoptics to achieve maximum high frequency signal-to-noise ratios. The following discussion will enable the proper selection of external components to achieve optimum system performance. The LMH6629 (LLP-8 package only) has some additional features to allow maximum flexibility. As shown in Figure 2 there are provisions for low-power shutdown and two internal compensation settings, which are further discussed below under the COMPENSATION heading. Also provided is a feedback (FB) pin which allows the placement of the feedback resistor directly adjacent to the inverting input (IN-) pin. This pin simplifies printed circuit board layout and minimizes the possibility of unwanted interaction between the feedback path and other circuit elements. LLP-8 CONTROL PINS & SOT23-5 COMPARISON The LMH6629 LLP-8 package has two digital control pins; PD and COMP pins. The PD pin, used for powerdown, floats high (device on) when not driven. When the PD pin is pulled low, the amplifier is disabled and the amplifier output stage goes into a high impedance state so the feedback and gain set resistors determine the output impedance of the circuit. The other control pin, the COMP pin, allows control of the internal compensation and defaults to the lower gain mode or logic 0. The SOT23-5 package has the following differences relative to the LLP-8 package: 1. No power down (shutdown) capability. 2. No COMP pin to set the minimum stable gain. SOT23–5 package minimum stable gain is internally fixed to be 10V/V. 3. No feedback (FB) pin. From a performance point of view, the LLP-8 and the SOT23-5 packages perform very similarly except in the following areas: 1. SSBW, Peaking, and 0.1 dB Bandwidth: These differences are highlighted in the Typical Performance Characteristics section and the Electrical Characteristics tables. Most notable differences are with small signal (0.2 Vpp) and close to the minimum stable gain of 10V/V. 2. Distortion: It is possible to get slightly different distortion performance. The board layout, decoupling capacitor return current routing strongly influences this 3. Output Current: In heavy current applications, there will be differences between these package types because of the difference in their respective Thermal Resistances (θJA). COMPENSATION The LMH6629 has two compensation settings that can be controlled by the COMP pin (LLP-8 package only). The default setting is set through an internal pull down resistor and places the COMP pin at the logic 0 state. In this configuration the on-chip compensation is set to the maximum and bandwidth is reduced to enable stability at gains as low as 4V/V. When this pin is driven to the logic 1 state, the internal compensation is decreased to allow higher bandwidth at higher gains. In this state, the minimum stable gain is 10V/V. Due to the reduced compensation, slew rate and large signal bandwidth are significantly enhanced for the higher gains. As mentioned earlier, the SOT23-5 package does not offer the two compensation settings that the LLP-8 offers. The SOT23-5 is internally set for a minimum gain of 10 V/V. It is possible to externally compensate the LMH6629 for any of the following reasons, as shown in Figure 4: • To operate the SOT23-5 package (which does not offer the COMP pin) at closed loop gains < 10V/V. • To operate the LLP-8 package at gains below the minimum stable gain of 4V /V when the COMP pin is LO. Note: In this case, Figure 4 “Constraint 1” may be changed to ≥ 4 V/V instead of ≥ 10 V/V. • To operate either package at low gain and need maximum slew rate (COMP pin HI). 30068061 FIGURE 2. 8-Pin LLP Pinout Diagram The LLP-8 package requires the bottom-side Die Attach Paddle (DAP) to be soldered to the circuit board for proper thermal dissipation and to get the thermal resistance number specified. The DAP is tied to the V- potential within the LMH6629 package. Thus, the circuit board copper area devoted to DAP heatsinking connection should be at the V- potential as well. Please refer to the package drawing for the recommended land pattern and recommended DAP connection dimensions. 30068052 FIGURE 3. LLP–8 DAP(Top View) 17 www.national.com LMH6629 30068050 FIGURE 4. External Compensation This circuit operates by increasing the Noise Gain (NG) beyond the minimum stable gain of the LMH6629 while maintaining a positive loop gain phase angle at 0dB. There are two constraints shown in Figure 4; “Constraint 1” ensures that NG has increased to at least 10 V/V when the loop gain approaches 0dB, and “Constraint 2” places an upper limit on the feedback phase lead network frequency to make sure it is fully effective in the frequency range when loop gain approaches 0dB. These two constraints allow one to estimate the “starting value” for Rc and Cc which may need to be fine tuned for proper response. Here is an example worked out for more clarification: Assume that the objective is to use the SOT23-5 version of the LMH6629 for a closed loop gain of +3.7 V/V using the technique shown in Figure 4. Selecting Rf = 249Ω → Rg = 91Ω → REQ= 66.6Ω. For 50Ω source termination (Rs= 50Ω), select RT= 50Ω → Rp = 25Ω. Using “Constraint 1” (= 10V/V) allows one to compute Rc ≊ 56Ω. Using “Constraint 2” (= 90 MHz) defines the appropriate value of Cc≊ 33 pF. The frequency response plot shown in Figure 5 is the measured response with Rc and Cc values computed above and shows a -3dB response of about 1GHz. 30068049 FIGURE 5. SOT23-5 Package Low Closed Loop Gain Operation with External Compensation For the Figure 5 measured results, a compensation capacitor (Cf') was used across Rf to compensate for the summing node net capacitance due to the board and the SOT23–5 LMH6629. The RA and RB combination reduces the effective capacitance of Cf‘ by the ratio of 1+RB / RA, with the constraint that RB 1pF) to be used. The LLP-8 package does not need this compensation across Rf due to its lower parasitics. With the COMP pin HI (LLP-8 package only) or with the SOT23–5 package, this circuit achieves high slew rate and takes advantage of the LMH6629’s superior low-noise characteristics without sacrificing stability, while enabling lower gain applications. It should be noted that the Rc, Cc combination does lower the input impedance and increases noise gain at higher frequencies. With these values, the input impedance www.national.com 18 LMH6629 reduces by 3dB at 490 MHz. The Noise Gain transfer function “zero” is given by the equation below and it has a 3dB increase at 32.8 MHz with these values: Equation 1: External Compensation Noise Gain Increase (1) CANCELLATION OF OFFSET ERRORS DUE TO INPUT BIAS CURRENTS The LMH6629 offers exceptional offset voltage accuracy. In order to preserve the low offset voltage errors, care must be taken to avoid voltage errors due to input bias currents. This is important in both inverting and non inverting applications. The non-inverting circuit is used here as an example. To cancel the bias current errors of the non-inverting configuration, the parallel combination of the gain setting (Rg) and feedback (Rf) resistors should equal the equivalent source resistance (Rseq) as defined in Figure 6. Combining this constraint with the non-inverting gain equation also seen in Figure 6 allows both Rf and Rg to be determined explicitly from the following equations: Rf = AVRseq and Rg = Rf/(AV-1) 30068019 FIGURE 7. Inverting Amplifier Configuration TOTAL INPUT NOISE vs. SOURCE RESISTANCE To determine maximum signal-to-noise ratios from the LMH6629, an understanding of the interaction between the amplifier’s intrinsic noise sources and the noise arising from its external resistors is necessary. Figure 8 describes the noise model for the non-inverting amplifier configuration showing all noise sources. In addition to the intrinsic input voltage noise (en) and current noise (in = in+ = in−) source, there is also thermal voltage noise (et = √(4KTR)) associated with each of the external resistors. 30068018 FIGURE 6. Non-Inverting Amplifier Configuration When driven from a 0Ω source, such as the output of an op amp, the non-inverting input of the LMH6629 should be isolated with at least a 25Ω series resistor. As seen in Figure 7, bias current cancellation is accomplished for the inverting configuration by placing a resistor (Rb) on the non-inverting input equal in value to the resistance seen by the inverting input (Rf || (Rg+Rs)). Rb should to be no less than 25Ω for optimum LMH6629 performance. A shunt capacitor (not shown) can minimize the additional noise of Rb. 30068020 FIGURE 8. Non-Inverting Amplifier Noise Model Equation 2 provides the general form for total equivalent input voltage noise density (eni). Equation 2: General Noise Equation (2) Equation 3 is a simplification of Equation 2 that assumes Rf || Rg = Rseq for bias current cancellation: Equation 3: Noise Equation with Rf || Rg = Rseq (3) Figure 9 schematically shows eni alongside VIN (the portion of VS source which reaches the non-inverting input of Figure 6) 19 www.national.com LMH6629 and external components affecting gain (Av= 1 + Rf / Rg), all connected to an ideal noiseless amplifier. 30068022 30068054 FIGURE 11. Voltage Noise Density vs. Source Resistance FIGURE 9. Non-Inverting Amplifier Equivalent Noise Source Schematic Figure 10 illustrates the equivalent noise model using this assumption. Figure 11 is a plot of eni against equivalent source resistance (Rseq) with all of the contributing voltage noise source of Equation 3. This plot gives the expected eni for a given (Rseq) which assumes Rf||Rg = Rseq for bias current cancellation. The total equivalent output voltage noise (eno) is eni*AV. If bias current cancellation is not a requirement, then Rf || Rg need not equal Rseq. In this case, according to Equation 2, Rf || Rg should be as low as possible to minimize noise. Results similar to Equation 2 are obtained for the inverting configuration of Figure 7 if Rseq is replaced by Rb and Rg is replaced by Rg + Rs. With these substitutions, Equation 2 will yield an eni referred to the non-inverting input. Referring eni to the inverting input is easily accomplished by multiplying eni by the ratio of non-inverting to inverting gains (1+Rg/ Rf). NOISE FIGURE Noise Figure (NF) is a measure of the noise degradation caused by an amplifier. 30068021 Equation 4: General Noise Figure Equation (4) FIGURE 10. Noise Model with Rf||Rg = Rseq As seen in Figure 11, eni is dominated by the intrinsic voltage noise (en) of the amplifier for equivalent source resistances below 15Ω. Between 15Ω and 2.5 kΩ, eni is dominated by the thermal noise (et = √(4kT(2Rseq)) of the equivalent source resistance Rseq; incidentally, this is the range of Rseq values where the LMH6629 has the best (lowest) Noise Figure (NF) for the case where Rseq = Rf || Rg. Above 2.5 kΩ, eni is dominated by the amplifier’s current noise (in = √(2) i nRseq). When Rseq = 190Ω (i.e., R seq = en/√(2) i n), the contribution from voltage noise and current noise of LMH6629 is equal. For example, configured with a gain of +10V/V giving a −3dB of 825 MHz and driven from Rseq = Rf || Rg = 20Ω (eni = 1.07 nV√Hz from Figure 11), the LMH6629 produces a total equivalent output noise voltage (eni * 10 V/V * √(1.57 * 825 MHz)) of 385 μVrms. Looking at the two parts of the NF expression (inside the log function) yields: Si/ So→ Inverse of the power gain provided by the amplifier No/ Ni→ Total output noise power, including the contribution of RS, divided by the noise power at the input due to RS To simplify this, consider Na as the noise power added by the amplifier (reflected to its input port): Si/ So→ 1/ G No/ Ni→ G * (Ni+Na) / Ni (where G*(Ni +Na ) = No) Substituting these two expressions into the NF expression: Equation 5: Simplified Noise Figure Equation (5) The noise figure expression has simplified to depend only on the ratio of the noise power added by the amplifier at its input (considering the source resistor to be in place but noiseless in getting Na) to the noise power delivered by the source resistor (considering all amplifier elements to be in place but noiseless in getting Ni). For a given amplifier with a desired closed loop gain, to minimize noise figure: • Minimize Rf || Rg 20 www.national.com LMH6629 • Choose the Optimum RS (ROPT) ROPT is the point at which the NF curve reaches a minimum and is approximated by: ROPT ≈ en/ in Figure 12 is a plot of NF vs RS with the circuit of Figure 6 (Rf = 240Ω, AV = +10V/V). The NF curves for both Unterminated (RT = open) and Terminated systems (RT = RS) are shown. Table 1 indicates NF for various source resistances including RS = ROPT. LOW-NOISE TRANSIMPEDANCE AMPLIFIER Figure 14 implements a high-speed, single-supply, low-noise Transimpedance amplifier commonly used with photodiodes. The transimpedance gain is set by RF. 30068011 30068079 FIGURE 12. Noise Figure vs. Source Resistance TABLE 1. Noise Figure for Various Rs RS (Ω) 50 ROPT NF (Terminated) (dB) 8 4.1 (ROPT = 750Ω) NF (Unterminated) (dB) 3.2 1.1 (ROPT = 350Ω) FIGURE 14. 200MHz Transimpedance Amplifier Configuration Figure 15 shows the Noise Gain (NG) and transfer function (I-V Gain). As with most Transimpedance amplifiers, it is required to compensate for the additional phase lag (Noise Gain zero at fZ) created by the total input capacitance ( CD (diode capacitance) + CCM (LMH6629 input capacitance) ) looking into RF; this is accomplished by placing CF across RF to create enough phase lead (Noise Gain pole at fP) to stabilize the loop. SINGLE-SUPPLY OPERATION The LMH6629 can be operated with single power supply as shown in Figure 13. Both the input and output are capacitively coupled to set the DC operating point. 30068026 30068002 FIGURE 13. Single Supply Operation FIGURE 15. Transimpedance Amplifier Noise Gain & Transfer Function 21 www.national.com LMH6629 The optimum value of CF is given by Equation 6 resulting in the I-V -3dB bandwidth shown in Equation 7, or around 200 MHz in this case (assuming GBWP= 4GHz with COMP pin = HI for LLP-8 package). This CF value is a “starting point” and CF needs to be tuned for the particular application as it is often less than 1pF and thus is easily affected by board parasitics, etc. For maximum speed, the LMH6629 COMP pin should be HI (for LLP-8 package). This CF value is a “starting point” and CF needs to be tuned for the particular application as it is often less than 1pF and thus is easily affected by board parasitics, etc. For maximum speed, the LMH6629 COMP pin should be HI (or use the SOT23 package). 30068012 Equation 6: Optimum CF Value (6) FIGURE 17. Transimpedance Amplifier Equivalent Input Source Model From Figure 16, it is clear that with LMH6629’s extremely lownoise characteristics, for RF < 2.5kΩ, the noise performance is entirely dominated by RF thermal noise. Only above this RF threshold, LMH6629’s input noise current (in) starts being a factor and at no RF setting does the LMH6629 input noise voltage play a significant role. This noise analysis has ignored the possible noise gain increase, due to photo-diode capacitance, at higher frequencies. LOW-NOISE INTEGRATOR Figure 18 shows a deBoo integrator implemented with the LMH6629. Positive feedback maintains integration linearity. The LMH6629’s low input offset voltage and matched inputs allow bias current cancellation and provide for very precise integration. Keeping RG and RS low helps maintain dynamic stability. Equation 7: Resulting -3dB Bandwidth (7) Equation 8 provides the total input current noise density (ini) equation for the basic Transimpedance configuration and is plotted against feedback resistance (RF) showing all contributing noise sources in Figure 16. The plot indicates the expected total equivalent input current noise density (ini) for a given feedback resistance (RF). This is depicted in the schematic of Figure 17 where total equivalent current noise density (ini) is shown at the input of a noiseless amplifier and noiseless feedback resistor (RF). The total equivalent output voltage noise density (eno) is ini*RF. 30068028 FIGURE 16. Current Noise Density vs. Feedback Resistance 30068029 FIGURE 18. Low-Noise Integrator HIGH-GAIN SALLEN-KEY ACTIVE FILTERS The LMH6629 is well suited for high-gain Sallen-Key type of active filters. Figure 19 shows the 2nd order Sallen-Key lowpass filter topology. Using component predistortion methods discussed in OA-21 enables the proper selection of components for these high-frequency filters. Equation 7: Noise Equation for Transimpedance Amplifier (8) www.national.com 22 LMH6629 30068031 30068036 FIGURE 19. Low Pass Sallen-Key Active Filter Topology LOW-NOISE MAGNETIC MEDIA EQUALIZER Figure 20 shows a high-performance low-noise equalizer for such applications as magnetic tape channels using the LMH6629. The circuit combines an integrator (used to limit noise) with a bandpass filter (used to boost the response centered at a frequency or over a band of interest) to produce the low-noise equalization. The circuit’s simulated frequency response is illustrated in Figure 21. In this circuit, the bandpass filter center frequency is set by FIGURE 20. Low-Noise Magnetic Media Equalizer For higher selectivity, use high C values; for wider bandwidth, use high L values, while keeping the product of L and C values the same to keep fc intact. The integrator’s -3dB roll-off is set by 30068032 FIGURE 21. Equalizer Frequency Response LOW-NOISE SINGLE ENDED TO DIFFERENTIAL CONVERTER / DRIVER Many high-resolution data converters (ADC’s) require a differential input driver. In order to preserve the ADC’s dynamic range, the analog input driver must have a noise floor which is lower than the ADC’s noise floor. For an ADC with N bits, the quantization Signal-to-noise ratio (SNR) is 6.02* N + 1.76 in dB. For example, a 12-bit ADC has a SNR of 74 dB (= 5000 V/V). Assuming a full-scale differential input of 2Vpp (0.707 V_RMS), the quantization noise referred to the ADC’s input is ~140 μV_RMS (= 0.707 V_RMS / 5000 V/V) over the bandwidth “visible” to the ADC. Assuming an ADC input bandwidth of 20 MHz, this translates to just 25 nV/RtHz (= 141µV_RMS / SQRT(20 MHz * π/2)) noise density at the output of the driver. Using an amplifier to form the single-ended (SE) to Differential converter / driver for such an application is challenging, especially when there is some gain required. In addition, the input driver’s linearity (harmonic distortion) must also be high enough such that the spurs that get through to the ADC input are below the ADC’s LSB threshold or -73 dBc (= 20*log (1/ 212)) or lower in this case. Therefore, it is essential to use a low-noise / low-distortion device to drive a high resolution ADC in order to minimize the impact on the quantization noise and to make sure that the driver’s distortion does not dominate the acquired data. If the integrator and the bandpass filter frequency interaction is minimized so that the operating frequencies of each can be set independently. Lowering the value of R2 increases the bandpass gain (boost) without affecting the integrator frequencies. With the LMH6629’s wide Gain Bandwidth (4GHz), the center frequency could be adjusted higher without worries about loop gain limitation. This increases flexibility in tuning the circuit. 23 www.national.com LMH6629 Figure 22 shows a ground referenced bipolar input (symmetrical swing around 0V) SE to differential converter used to drive a high resolution ADC. The combination of LMH6629’s low noise and the converter architecture reduces the impact on the ADC noise. 30068055 FIGURE 22. Low-Noise Single-Ended (SE) to Differential Converter In this circuit, the required gain dictates the resistor ratio “K”. With “K” and the driver output CM voltage (VO_CM) known, VSET can be established. Reasonable values for Rf and Rg can be set to complete the design. In terms of output swing, with the LMH6629 output swing capability which requires ~0.85V of headroom from either rail, the maximum total output swing into the ADC is limited to 6.6 VPP (=(5 – 2 x 0.85V) x 2); that is true with VO_CM set to midrail between V+ and V-. It should also be noted that the LMH6629’s input CMVR range includes the lower rail (V-) and that is the reason there is great flexibility in setting Vo_CM by controlling VSET. Another feature is that A1 and A2 inputs act like “virtual grounds” and thus do not see any signal swing. Note that due to the converter’s biasing, the source, VIN, needs to sink a current equal to VSET / RIN. The converter example shown in Figure 22 operates with a noise gain of 6 (=1+ K / 2) and thus requires that the COMP pin to be tied low (LLP-8 package only). The 1st order approximated small signal bandwidth will be 280 MHz (=1.7 GHz / 6V/V) which is computed using 1.7GHz as the GBWP with COMP pin LO . From a noise point of view, concentrating only on the dominant noise sources involved, here is the expression for the expected differential noise density at the input of the ADC: Equation 9: Converter Noise Expression (9) en is the LMH6629 input noise voltage and eRin_thermal is the thermal noise of RIN. The “23” and the “22” multipliers account for the different instances of each noise source (2 for en, and 1 for eRin_thermal. Equation 9 evaluated for the circuit example of Figure 22 is shown below: Equation 10: Converter Noise Expression Evaluated (10) Because of the LMH6629’s low input noise voltage (en), noise is dominated by the thermal noise of RIN. It is evident that the input resistor, RIN, can be reduced to lower the noise with lower input impedance as the trade-off. www.national.com 24 LMH6629 LAYOUT CONSIDERATIONS National Semiconductor offers evaluation board(s) to aid in device testing and characterization and as a guide for proper layout. As is the case with all high-speed amplifiers, acceptedpractice RF design technique on the PCB layout is mandatory. Generally, a good high-frequency layout exhibits a separation of power supply and ground traces from the inverting input and output pins. Parasitic capacitances between these nodes and ground may cause frequency response peaking and possible circuit oscillations (see Application Note OA-15 for more information). Use high-quality chip capacitors with values in the range of 1000 pF to 0.1F for power supply bypassing. One terminal of each chip capacitor is connected to the ground plane and the other terminal is connected to a point that is as close as possible to each supply pin as allowed by the manufacturer’s design rules. In addition, connect a tantalum capacitor with a value between 4.7 μF and 10 μF in parallel with the chip capacitor. Harmonic Distortion, especially HD2, is strongly influenced by the layout and in particular can be affected by decoupling capacitors placed between the V+ and V- terminals as close to the device leads as possible. Signal lines connecting the feedback and gain resistors should be as short as possible to minimize inductance and microstrip line effect. Place input and output termination resistors as close as possible to the input/output pins. Traces greater than 1 inch in length should be impedance matched to the corresponding load termination. Symmetry between the positive and negative paths in the layout of differential circuitry should be maintained to minimize the imbalance of amplitude and phase of the differential signal. Component value selection is another important parameter in working with high-speed / high-performance amplifiers. Choosing external resistors that are large in value compared to the value of other critical components will affect the closed loop behavior of the stage because of the interaction of these resistors with parasitic capacitances. These parasitic capacitors could either be inherent to the device or be a by-product of the board layout and component placement. Moreover, a large resistor will also add more thermal noise to the signal path. Either way, keeping the resistor values low will diminish this interaction. On the other hand, choosing very low value resistors could load down nodes and will contribute to higher overall power dissipation and high distortion. 25 www.national.com LMH6629 Physical Dimensions inches (millimeters) unless otherwise noted 8-Pin LLP NS Package Number SDA08A SOT23-5 Package NS Package Number MF05A www.national.com 26 LMH6629 Notes 27 www.national.com LMH6629 Ultra-Low Noise, High-Speed Operational Amplifier with Shutdown Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: www.national.com Products Amplifiers Audio Clock and Timing Data Converters Interface LVDS Power Management Switching Regulators LDOs LED Lighting Voltage References PowerWise® Solutions Temperature Sensors PLL/VCO www.national.com/amplifiers www.national.com/audio www.national.com/timing www.national.com/adc www.national.com/interface www.national.com/lvds www.national.com/power www.national.com/switchers www.national.com/ldo www.national.com/led www.national.com/vref www.national.com/powerwise WEBENCH® Tools App Notes Reference Designs Samples Eval Boards Packaging Green Compliance Distributors Quality and Reliability Feedback/Support Design Made Easy Design Support www.national.com/webench www.national.com/appnotes www.national.com/refdesigns www.national.com/samples www.national.com/evalboards www.national.com/packaging www.national.com/quality/green www.national.com/contacts www.national.com/quality www.national.com/feedback www.national.com/easy www.national.com/solutions www.national.com/milaero www.national.com/solarmagic www.national.com/training Applications & Markets Mil/Aero PowerWise® Design University Serial Digital Interface (SDI) www.national.com/sdi www.national.com/wireless www.national.com/tempsensors SolarMagic™ THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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