LMC6084 Precision CMOS Quad Operational Amplifier
August 2000
LMC6084 Precision CMOS Quad Operational Amplifier
General Description
The LMC6084 is a precision quad low offset voltage operational amplifier, capable of single supply operation. Performance characteristics include ultra low input bias current, high voltage gain, rail-to-rail output swing, and an input common mode voltage range that includes ground. These features, plus its low offset voltage, make the LMC6084 ideally suited for precision circuit applications. Other applications using the LMC6084 include precision fullwave rectifiers, integrators, references, and sample-andhold circuits. This device is built with National’s advanced Double-Poly Silicon-Gate CMOS process. For designs with more critical power demands, see the LMC6064 precision quad micropower operational amplifier. For a single or dual operational amplifier with similar features, see the LMC6081 or LMC6082 respectively. PATENT PENDING
Features
(Typical unless otherwise stated) n Low offset voltage: 150 µV n Operates from 4.5V to 15V single supply n Ultra low input bias current: 10 fA n Output swing to within 20 mV of supply rail, 100k load n Input common-mode range includes V− n High voltage gain: 130 dB n Improved latchup immunity
Applications
n n n n n n Instrumentation amplifier Photodiode and infrared detector preamplifier Transducer amplifiers Medical instrumentation D/A converter Charge amplifier for piezoelectric transducers
Connection Diagrams
14-Pin DIP/SO Input Bias Current vs Temperature
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Top View
© 2004 National Semiconductor Corporation
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LMC6084
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Differential Input Voltage Voltage at Input/Output Pin Supply Voltage (V+ − V−) Output Short Circuit to V Lead Temperature (Soldering, 10 Sec.) Storage Temp. Range Junction Temperature ESD Tolerance (Note 4) 260˚C −65˚C to +150˚C 150˚C 2 kV
+
Current at Input Pin Current at Output Pin Current at Power Supply Pin Power Dissipation
± 10 mA ± 30 mA
40 mA (Note 3)
± Supply Voltage
(V+) +0.3V, (V−) −0.3V 16V (Note 11) (Note 2)
Operating Ratings (Note 1)
Temperature Range LMC6084AM LMC6084AI, LMC6084I Supply Voltage Thermal Resistance (θJA) (Note 12) 14-Pin Molded DIP 14-Pin SO Power Dissipation 81˚C/W 126˚C/W (Note 10) −55˚C ≤ TJ ≤ +125˚C −40˚C ≤ TJ ≤ +85˚C 4.5V ≤ V+ ≤ 15.5V
Output Short Circuit to V−
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C. Boldface limits apply at the temperature extremes. V+ = 5V, V− = 0V, VCM = 1.5V, VO = 2.5V and RL > 1M unless otherwise specified. Typ Symbol VOS TCVOS IB IOS RIN CMRR +PSRR −PSRR VCM Parameter Input Offset Voltage Input Offset Voltage Average Drift Input Bias Current Input Offset Current Input Resistance Common Mode Rejection Ratio Positive Power Supply Rejection Ratio Negative Power Supply Rejection Ratio Input Common-Mode Voltage Range V+ = 5V and 15V for CMRR ≥ 60 dB V+ − 1.9 AV Large Signal Voltage Gain RL = 2 kΩ (Note 7) Sinking RL = 600Ω (Note 7) Sinking 150 Sourcing 350 1200 Sourcing 1400
+
LMC6084AM Limit (Note 6) 350 1000
LMC6084AI Limit (Note 6) 350 800
LMC6084I Limit (Note 6) 800 1300 µV Max µV/˚C pA Units
Conditions
(Note 5) 150 1.0 0.010
100 0.005 100
4 2 75 72 75 72 84 81 −0.1 0 V+ − 2.3 V − 2.5 400 300 180 100 400 150 100 50
+
4 2 66 63 66 63 74 71 −0.1 0 V+ − 2.3 V+ − 2.5 300 200 90 60 200 80 70 35
Max pA Max Tera Ω dB Min dB Min dB Min V Max V Min V/mV Min V/mV Min V/mV Min V/mV Min
> 10
0V ≤ VCM ≤ 12.0V V+ = 15V 5V ≤ V+ ≤ 15V VO = 2.5V 0V ≤ V− ≤ −10V 94 −0.4 85 85 75 72 75 72 84 81 −0.1 0 V+ − 2.3 V − 2.6 400 300 180 70 400 150 100 35
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LMC6084
DC Electrical Characteristics
(Continued) Unless otherwise specified, all limits guaranteed for TJ = 25˚C. Boldface limits apply at the temperature extremes. V+ = 5V, V− = 0V, VCM = 1.5V, VO = 2.5V and RL > 1M unless otherwise specified. Typ LMC6084AM Limit (Note 6) 4.80 4.70 0.10 V+ = 5V RL = 600Ω to 2.5V 0.30 V+ = 15V RL = 2 kΩ to 7.5V 0.26 V+ = 15V RL = 600Ω to 7.5V 0.79 13.90 14.63 4.61 0.13 0.19 4.50 4.24 0.40 0.63 14.50 14.30 0.35 0.48 13.35 12.80 1.16 1.42 16 8 Sinking, VO = 5V 21 30 34 1.8 2.2 16 11 28 18 Sinking, VO = 13V (Note 11) 28 19 3.0 3.6 3.4 4.0 LMC6084AI Limit (Note 6) 4.80 4.73 0.13 0.17 4.50 4.31 0.40 0.50 14.50 14.34 0.35 0.45 13.35 12.86 1.16 1.32 16 10 16 13 28 22 28 22 3.0 3.6 3.4 4.0 LMC6084I Limit (Note 6) 4.75 4.67 0.20 0.24 4.40 4.21 0.50 0.63 14.37 14.25 0.44 0.56 12.92 12.44 1.33 1.58 13 8 13 10 23 18 23 18 3.0 3.6 3.4 4.0 V Min V Max V Min V Max V Min V Max V Min V Max mA Min mA Min mA Min mA Min mA Max mA Max Units Parameter Output Swing Conditions V+ = 5V RL = 2 kΩ to 2.5V (Note 5) 4.87
Symbol VO
IO
Output Current V+ = 5V
Sourcing, VO = 0V
22
IO
Output Current V+ = 15V
Sourcing, VO = 0V
IS
Supply Current
All Four Amplifiers V+ = +5V, VO = 1.5V All Four Amplifiers V+ = +15V, VO = 7.5V
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LMC6084
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, Boldface limits apply at the temperature extremes. V+ = 5V, V− = 0V, VCM = 1.5V, VO = 2.5V and RL > 1M unless otherwise specified. Typ Symbol SR GBW φm en in T.H.D. Parameter Slew Rate Gain-Bandwidth Product Phase Margin Amp-to-Amp Isolation Input-Referred Voltage Noise Input-Referred Current Noise Total Harmonic Distortion (Note 9) F = 1 kHz F = 1 kHz F = 10 kHz, AV = −10 RL = 2 kΩ, VO = 8 VPP 0.01 % Conditions (Note 8) (Note 5) 1.5 1.3 50 140 22 0.0002 LMC6084AM LMC6084AI LMC6084I Limit (Note 6) 0.8 0.5 Limit (Note 6) 0.8 0.6 Limit (Note 6) 0.8 0.6 V/µs Min MHz Deg dB nV/√Hz pA/√Hz Units
± 5V Supply
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Note 2: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150˚C. Output currents in excess of ± 30 mA over long term may adversely affect reliability. Note 3: The maximum power dissipation is a function of TJ(Max), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(Max) − TA) /θJA. Note 4: Human body model, 1.5 kΩ in series with 100 pF. Note 5: Typical values represent the most likely parametric norm. Note 6: All limits are guaranteed by testing or statistical analysis. Note 7: V+ = 15V, VCM = 7.5V and RL connected to 7.5V. For Sourcing tests, 7.5V ≤ VO ≤ 11.5V. For Sinking tests, 2.5V ≤ VO ≤ 7.5V. Note 8: V+ = 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates. Note 9: Input referred V+ = 15V and RL = 100 kΩ connected to 7.5V. Each amp excited in turm with 1 kHz to produce VO = 12 VPP. Note 10: For operating at elevated temperatures the device must be derated based on the thermal resistance θJA with PD = (TJ − TA)/θJA. All numbers apply for packages soldered directly into a PC board. Note 11: Do not connect output to V+, when V+ is greater than 13V or reliability will be adversely affected. Note 12: All numbers apply for packages soldered directly into a PC board.
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LMC6084
Typical Performance Characteristics
Distribution of LMC6084 Input Offset Voltage (TA = +25˚C) Distribution of LMC6084 Input Offset Voltage (TA = −55˚C)
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Distribution of LMC6084 Input Offset Voltage (TA = +125˚C)
Input Bias Current vs Temperature
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Supply Current vs Supply Voltage
Input Voltage vs Output Voltage
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LMC6084
Typical Performance Characteristics
Common Mode Rejection Ratio vs Frequency
(Continued)
Power Supply Rejection Ratio vs Frequency
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Input Voltage Noise vs Frequency
Output Characteristics Sourcing Current
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Output Characteristics Sinking Current
Gain and Phase Response vs Temperature (−55˚C to +125˚C)
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LMC6084
Typical Performance Characteristics
Gain and Phase Response vs Capacitive Load with RL = 600Ω
(Continued) Gain and Phase Response vs Capacitive Load with RL = 500 kΩ
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Open Loop Frequency Response
Inverting Small Signal Pulse Response
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Inverting Large Signal Pulse Response
Non-Inverting Small Signal Pulse Response
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LMC6084
Typical Performance Characteristics
Non-Inverting Large Signal Pulse Response
(Continued) Crosstalk Rejection vs Frequency
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Stability vs Capacitive Load, RL = 600Ω
Stability vs Capacitive Load RL = 1 MΩ
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Applications Hints
AMPLIFIER TOPOLOGY The LMC6084 incorporates a novel op-amp design topology that enables it to maintain rail-to-rail output swing even when driving a large load. Instead of relying on a push-pull unity gain output buffer stage, the output stage is taken directly from the internal integrator, which provides both low output impedance and large gain. Special feed-forward compensation design techniques are incorporated to maintain stability over a wider range of operating conditions than traditional micropower op-amps. These features make the LMC6084 both easier to design with, and provide higher speed than products typically found in this ultra-low power class. COMPENSATING FOR INPUT CAPACITANCE It is quite common to use large values of feedback resistance for amplifiers with ultra-low input current, like the LMC6084. Although the LMC6084 is highly stable over a wide range of operating conditions, certain precautions must be met to achieve the desired pulse response when a large feedback resistor is used. Large feedback resistors and even small values of input capacitance, due to transducers, photodiodes, and circuit board parasitics, reduce phase margins.
When high input impedances are demanded, guarding of the LMC6084 is suggested. Guarding input lines will not only reduce leakage, but lowers stray input capacitance as well. (See Printed-Circuit-Board Layout for High Impedance Work). The effect of input capacitance can be compensated for by adding a capacitor, Cf, around the feedback resistors (as in Figure 1 ) such that:
or R1 CIN ≤ R2 Cf Since it is often difficult to know the exact value of CIN, Cf can be experimentally adjusted so that the desired pulse response is achieved. Refer to the LMC660 and LMC662 for a more detailed discussion on compensating for input capacitance.
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LMC6084
Applications Hints
(Continued)
Capacitive load driving capability is enhanced by using a pull up resistor to V+ Figure 3. Typically a pull up resistor conducting 500 µA or more will significantly improve capacitive load responses. The value of the pull up resistor must be determined based on the current sinking capability of the amplifier with respect to the desired output swing. Open loop gain of the amplifier can also be affected by the pull up resistor (see Electrical Characteristics).
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FIGURE 1. Cancelling the Effect of Input Capacitance CAPACITIVE LOAD TOLERANCE All rail-to-rail output swing operational amplifiers have voltage gain in the output stage. A compensation capacitor is normally included in this integrator stage. The frequency location of the dominant pole is affected by the resistive load on the amplifier. Capacitive load driving capability can be optimized by using an appropriate resistive load in parallel with the capacitive load (see typical curves). Direct capacitive loading will reduce the phase margin of many op-amps. A pole in the feedback loop is created by the combination of the op-amp’s output impedance and the capacitive load. This pole induces phase lag at the unity-gain crossover frequency of the amplifier resulting in either an oscillatory or underdamped pulse response. With a few external components, op amps can easily indirectly drive capacitive loads, as shown in Figure 2.
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FIGURE 3. Compensating for Large Capacitive Loads with a Pull Up Resistor PRINTED-CIRCUIT-BOARD LAYOUT FOR HIGH-IMPEDANCE WORK It is generally recognized that any circuit which must operate with less than 1000 pA of leakage current requires special layout of the PC board. When one wishes to take advantage of the ultra-low bias current of the LMC6084, typically less than 10 fA, it is essential to have an excellent layout. Fortunately, the techniques of obtaining low leakages are quite simple. First, the user must not ignore the surface leakage of the PC board, even though it may sometimes appear acceptably low, because under conditions of high humidity or dust or contamination, the surface leakage will be appreciable. To minimize the effect of any surface leakage, lay out a ring of foil completely surrounding the LMC6084’s inputs and the terminals of capacitors, diodes, conductors, resistors, relay terminals, etc. connected to the op-amp’s inputs, as in Figure 4. To have a significant effect, guard rings should be placed on both the top and bottom of the PC board. This PC foil must then be connected to a voltage which is at the same voltage as the amplifier inputs, since no leakage current can flow between two points at the same potential. For example, a PC board trace-to-pad resistance of 1012Ω, which is normally considered a very large resistance, could leak 5 pA if the trace were a 5V bus adjacent to the pad of the input. This would cause a 100 times degradation from the LMC6084’s actual performance. However, if a guard ring is held within 5 mV of the inputs, then even a resistance of 1011Ω would cause only 0.05 pA of leakage current. See Figure 5 for typical connections of guard rings for standard op-amp configurations.
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FIGURE 2. LMC6084 Noninverting Gain of 10 Amplifier, Compensated to Handle Capacitive Loads In the circuit of Figure 2, R1 and C1 serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier’s inverting input, thereby preserving phase margin in the overall feedback loop.
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LMC6084
Applications Hints
(Continued)
is another technique which is even better than a guard ring on a PC board: Don’t insert the amplifier’s input pin into the board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may have to forego some of the advantages of PC board construction, but the advantages are sometimes well worth the effort of using point-to-point up-in-the-air wiring. See Figure 6.
Latchup
CMOS devices tend to be susceptible to latchup due to their internal parasitic SCR effects. The (I/O) input and output pins look similar to the gate of the SCR. There is a minimum current required to trigger the SCR gate lead. The LMC6084 is designed to withstand 100 mA surge current on the I/O pins. Some resistive method should be used to isolate any capacitance from supplying excess current to the I/O pins. In addition, like an SCR, there is a minimum holding current for any latchup mode. Limiting current to the supply pins will also inhibit latchup susceptibility.
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FIGURE 4. Example of Guard Ring in P.C. Board Layout
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Inverting Amplifier
(Input pins are lifted out of PC board and soldered directly to components. All other pins connected to PC board).
FIGURE 6. Air Wiring
Typical Single-Supply Applications
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Non-Inverting Amplifier
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Follower FIGURE 5. Typical Connections of Guard Rings The designer should be aware that when it is inappropriate to lay out a PC board for the sake of just a few circuits, there
(V+ = 5.0 VDC) The extremely high input impedance, and low power consumption, of the LMC6084 make it ideal for applications that require battery-powered instrumentation amplifiers. Examples of these types of applications are hand-held pH probes, analytic medical instruments, magnetic field detectors, gas detectors, and silicon based pressure transducers. Figure 7 shows an instrumentation amplifier that features high differential and common mode input resistance ( > 1014Ω), 0.01% gain accuracy at AV = 1000, excellent CMRR with 1 kΩ imbalance in bridge source resistance. Input current is less than 100 fA and offset drift is less than 2.5 µV/˚C. R2 provides a simple means of adjusting gain over a wide range without degrading CMRR. R7 is an initial trim used to maximize CMRR without using super precision matched resistors. For good CMRR over temperature, low drift resistors should be used.
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LMC6084
Typical Single-Supply Applications (Continued)
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If R1 = R5, R3 = R6, and R4 = R7; then
∴AV ≈ 100 for circuit shown (R2 = 9.822k).
FIGURE 7. Instrumentation Amplifier
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FIGURE 8. Low-Leakage Sample and Hold
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LMC6084
Typical Single-Supply Applications (Continued)
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FIGURE 9. 1 Hz Square Wave Oscillator
Ordering Information
Package Military −55˚C to +125˚C 14-Pin Molded DIP 14-Pin Small Outline Temperature Range Industrial −40˚C to +85˚C LMC6084AlN LMC6084lN LMC6084AlM, LMC6084AIMX LMC6084lM, LMC6084IMX M14A Rail Tape and Reel N14A Rail NSC Drawing Transport Media
For MlL-STD-883C qualified products, please contact your local National Semiconductor Sales Office or Distributor for availability and specification information.
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LMC6084
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Pin Small Outline Package (M) Order Number LMC6084AIM, LMC6084AIMX, LMC6084IM or LMC6084IMX NS Package Number M14A
14-Pin Molded Dual-In-Line Package (N) Order Number LMC6084AIN or LMC6084IN NS Package Number N14A
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LMC6084 Precision CMOS Quad Operational Amplifier
Notes
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. BANNED SUBSTANCE COMPLIANCE National Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2.
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