LMC8101

LMC8101 Rail-to-Rail Input and Output, 2.7V Op Amp in micro SMD package with Shutdown September 1999 LMC8101 Rail-to-Rail Input and Output, 2.7V Op Amp in micro SMD package with Shutdown General Description The LMC8101 is a Rail-to-Rail Input and Output high performance CMOS operational amplifier. The LMC8101 is ideal for low voltage (2.7V to 10V) applications requiring Rail-to-Rail inputs and output. The LMC8101 is supplied in the die sized micro SMD as well as the 8 pin MSOP packages. The micro SMD package requires 75% less board space as compared to the SOT23-5 package. The LMC8101 is an upgrade to the industry standard LMC7101. The LMC8101 incorporates a simple user controlled methodology for shutdown. This allows ease of use while reducing the total supply current to 1nA typical. This extends battery life where power saving is mandated. The shutdown input threshold can be set relative to either V+ or V− using the SL pin (see Application Note section for details). Other enhancements include improved offset voltage limit, three times the output current drive and lower 1/f noise when compared to the industry standard LMC7101 Op Amp. This makes the LMC8101 ideal for use in many battery powered, wireless communication and Industrial applications. Features VS = 2.7V, TA = 25˚C, RL to V+/2, Typical values unless specified. n Rail-to-Rail Inputs n Rail-to-Rail Output Swing Within 35mV of Supplies (RL = 2kΩ) n Packages Offered: n micro SMD package 1.39mm x 1.41mm n MSOP package 3.0mm x 4.9mm < 1mA (max) n Low Supply Current n Shutdown Current 1µA (max) n Versatile Shutdown feature 10µs turn-on n Output Short Circuit Current 10mA ± 5 mV (max) n Offset Voltage n Gain-Bandwidth 1MHz n Supply Voltage Range 2.7V-10V n THD 0.18% n Voltage Noise 36 Applications n n n n n n Portable Communication (voice, data) Cellular Phone Power Amp Control Loop Buffer AMP Active Filters Battery Sense VCO Loop Connection Diagrams 8-Pin MSOP micro SMD DS101240-79 Top View DS101240-80 Top View © 1999 National Semiconductor Corporation DS101240 www.national.com Ordering Information Package Ordering Information LMC8101BP LMC8101BPX LMC8101MM LMC8101MMX NSC Drawing Number BPA08EFB MUA08A Package Marking A 2 A11 Supplied As 250 Units Tape and Reel 3k Units Tape and Reel 1k Units Tape and Reel 3.5k Units Tape and Reel micro SMD 8-Pin MSOP www.national.com 2 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance VIN differential Output Short Circuit Duration Supply Voltage (V+ − V−) Voltage at Input/Output pins Current at Input Pin Current at Output Pin (Notes 3, 12) Current at Power Supply pins 2KV (Note 2) 200V (Note 13) +/−Supply Voltage (Notes 3, 11) 12V V+ +0.8V, V− −0.8V +/−10mA +/−80mA +/−80mA Storage Temperature Range Junction Temperature(Note 4) Soldering Information Infrared or Convection (20 sec.) Wave Soldering (10 sec.) −65˚C to +150˚C +150˚C 235˚C 260˚C Operating Ratings (Note 1) Supply Voltage (V+ - V−) 2.7V to 10V Junction Temperature Range (Note 4) −40˚C to +85˚C Package Thermal Resistance (θJA) (Note 4) micro SMD 220˚C/W MSOP pkg. 8 pin Surface Mount 230˚C/W 2.7V Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 2.7V, V− = 0V, VCM = VO = V+/2 and RL > 1 MΩ to V+/2. Boldface limits apply at the temperature extremes. Symbol VOS TCVOS IB IOS Rin CM Cin CM CMRR Parameter Input Offset Voltage Input Offset Voltage Average Drift Input Bias Current Input Offset Current Input Common Mode Resistance Input Common Mode Capacitance Common Mode Rejection Ratio 0V < = VCM < = 2.7V VS = 3V 0V < = VCM < = 3V VS = 2.7V to 3V VS = 2.7V CMRR > = 50dB (Note 7) Conditions Typ (Note 5) Limit (Note 6) Units mV max µV/˚C pA max pA max GΩ pF 60 64 60 50 48 0.0 2.7 −0.1 3.1 dB min dB min V max V min V max V min ± 0.70 4 ±5 ±7 ± 64 32 ±1 0.5 10 10 78 78 57 0.0 3.0 PSRR CMVR Power Supply Rejection Ratio Input Common-Mode Voltage Range VS = 3V CMRR > = 50dB −0.2 3.2 AVOL Large Signal Voltage Gain Sourcing RL = 2kΩ to V+/2 VO = 1.35V to 2.45V Sinking RL = 2kΩ to V+/2 VO = 1.35V to 0.25V Sourcing RL = 10kΩ to V+/2 VO = 1.35V to 2.65V Sinking RL = 10kΩ to V+/2 VO = 1.35V to 0.05V 3162 1000 562 804 562 1778 1000 1778 1000 V/V min 3162 4000 V/V min 4000 3 www.national.com 2.7V Electrical Characteristics Symbol VO Parameter Output Swing High (Continued) Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 2.7V, V− = 0V, VCM = VO = V+/2 and RL > 1 MΩ to V+/2. Boldface limits apply at the temperature extremes. Conditions RL = 2kΩ to V+/2 VID = 100mV RL = 10kΩ to V+/2 VID = 100mV RL = 2kΩ to V+/2 VID = −100mV RL = 10kΩ to V+/2 VID = −100mV Sourcing to V+/2 VID = 100mV (Note 11) Sinking to V+/2 VID = −100mV (Note 11) IS Supply Current No load, normal operation Shutdown mode Ton Toff Iin SR fu GBW en in THD Shutdown Turn-on time Shutdown Turn-off time ″SL″ and ″SD″ Input Current Slew Rate (Note 8) Unity Gain-Bandwidth Gain Bandwidth Product Input-Referred Voltage Noise AV = +1, RL = 10kΩ to V+/2 VI = 1VPP VI = 10mV, RL = 2kΩ to V+/2 f = 100KHz f = 10KHz, RS = 50Ω f = 10KHz f = 1KHz, AV = +1, VO = 2.2Vpp, RL = 600Ω to V+/2 (Note 9) (Note 9) Typ (Note 5) 2.67 2.69 32 10 20 10 0.70 0.001 10 1 Limit (Note 6) 2.64 2.62 2.68 2.67 100 150 30 70 14 6 5 4 1.0 1.2 1 15 Units V min V min mV max mV max mA min mA min mA max µA max µs µs pA max V/µs min KHz MHz Output Swing Low ISC Output Short Circuit Current ±1 1 750 1 36 ± 64 0.8 Input-Referred Current Noise 1.5 Total Harmonic Distortion 0.18 % +/−5V Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = −5V, VCM = VO = 0V, and RL > 1 MΩ to gnd. Boldface limits apply at the temperature extremes. Symbol VOS TCVos IB IOS Rin CM Cin CM CMRR Parameter Input Offset Voltage Input Offset Voltage Average Drift Input Bias Current Input Offset Current Input Common Mode Resistance Input Common Mode Capacitance Common-Mode Rejection Ratio −5V < = VCM < = 5V (Note 7) Conditions Typ (Note 5) Limit (Note 6) Units mV max µV/˚C pA max pA max GΩ pF 70 67 dB min ± 0.7 4 ±5 ±7 ± 64 32 ±1 0.5 10 10 87 www.national.com 4 +/−5V Electrical Characteristics Symbol PSRR CMVR Parameter Power Supply Rejection Ratio Input Common-Mode Voltage Range (Continued) Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = −5V, VCM = VO = 0V, and RL > 1 MΩ to gnd. Boldface limits apply at the temperature extremes. Conditions VS = 5V to 10V CMRR ≥ 50 dB Typ (Note 5) 80 −5.3 5.3 AVOL Large Signal Voltage Gain Sourcing RL = 600Ω VO = 0V to 4V Sinking RL = 600Ω VO = 0V to −4V Sourcing RL = 2kΩ VO = 0V to 4.6V Sinking RL = 2kΩ VO = 0V to −4.6V RL = 600Ω VID = 100mV RL = 2kΩ VID = 100mV RL = 600Ω VID = −100mV RL = 2kΩ VID = −100mV Sourcing, VID = 100mV (Note 3),(Note 11) Sinking, VID = −100mV (Note 3),(Note 11) No load, normal operation Shutdown mode Ton Toff Iin SR fu GBW en in THD Shutdown Turn-on time Shutdown Turn-off time ″SL″ and ″SD″ Input Current Slew Rate (Note 8) Unity Gain-Bandwidth Gain Bandwidth Product Input-Referred Voltage Noise AV = +10, RL = 10kΩ, VO = 10Vpp, CL = 1000pF VI = 10mV RL = 2kΩ f = 10KHz f = 10KHz, Rs = 50Ω f = 10KHz f = 10KHz, AV = +1, VO = 8Vpp, RL = 600Ω (Note 9) (Note 9) Limit (Note 6) 76 72 −5.2 −5.0 5.2 5.0 17.8 10 17.8 3.16 31.6 17.8 31.6 10 4.60 4.54 4.85 4.83 −4.75 −4.65 4.90 −4.84 30 25 60 52 1.7 1.9 1 15 Units dB min V max V min 34.5 V/mV min 34.5 138 V/mV min 138 4.73 4.90 −4.85 −4.95 49 90 1.1 0.001 10 1 VO Output Swing High V min V min V max V max mA min mA min mA max µA µs µs pA max V/µs KHz MHz Output Swing Low ISC Output Short Circuit Current IS Supply Current ±1 1.2 840 1.3 33 ± 64 Input-Referred Current Noise 1.5 Total Harmonic Distortion 0.2 % 5 www.national.com +/−5V Electrical Characteristics Note 2: Human body model, 1.5kΩ in series with 100pF. (Continued) Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature at 150˚C. Output currents in excess of 40mA over long term may adversely affect reliability. Note 4: The maximum power dissipation is a function of TJ(max), θJA and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max) − TA)/θJA. All numbers apply for packages soldered directly onto a PC board. Note 5: Typical Values represent the most likely parametric norm. Note 6: All limits are guaranteed by testing or statistical analysis. Note 7: Positive current corresponds to current flowing into the device. Note 8: Slew rate is the slower of the rising and falling slew rates. Note 9: Shutdown Turn-on and Turn-off times are defined as the time required for the output to reach 90% and 10%, respectively, of its final peak to peak swing when set for Rail to Rail output swing with a 100KHz sine wave, 2KΩ load, and AV = +10. Note 10: Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings. Note 11: Short circuit test is a momentary test. See Note 12. Note 12: Output short circuit duration is infinite for VS < 6V. Otherwise, extended period output short circuit may damage the device. Note 13: machine Model, 0Ω in series with 200pF. Application Notes Shutdown features: The LMC8101 is capable of being turned off in order to conserve power. Once in shutdown, the device supply current is drastically reduced (1µA maximum) and the output will be ″Tri-stated″. The shutdown feature of the LMC8101 is designed for flexibility. The threshold level of the SD input can be referenced to either V- or V+ by setting the level on the SL input. When the SL input is connected to V-, the SD threshold level is referenced to V- and vice versa. This threshold will be about 1.5V from the supply tied to the SL pin. So, for this example, the device will be in shutdown as long as the SD pin voltage is within 1V of V-. In order to ensure that the device would not ″chatter″ between active and shutdown states, hysteresis is built into the SD pin transition (see Figure 1 for an illustration of this feature). The shutdown threshold and hysteresis level are independent of the supply voltage. Figure 1 illustration applies equally well to the case when SL is tied to V+ and the horizontal axis is referenced to V+ instead. The SD pin should not be set within the voltage range from 1.1V to 1.9V of the selected supply voltage since this is a transition region and the device status will be undetermined. Table 1, below, summarizes the status of the device when the SL and SD pins are connected directly to V- or V+: TABLE 1. LMC8101 Status Summary SL V− V− V+ V+ SD V− V+ V+ V− LMC8101 Status Shutdown Active Shutdown Active In case shutdown operation is not needed, as can be seen in Table 1, the two pins SL and SD can simply be connected to opposite supply nodes to achieve ″Active″ operation. The SL and SD should always be tied to a node; if left unconnected, these high impedance inputs will float to an undetermined state and the device status will be undetermined as well. With the device in shutdown, once ″Active″ operation is initiated, there will be a finite amount of time required before the device output is settled to its final value. This time is less than 15µs. In addition, there may be some output spike during this time while the device is transitioning into a fully operational state. Some applications may be sensitive to this output spike and proper precautions should be taken in order to ensure proper operation at all times. Tiny Package: The LMC8101 is available in the micro SMD package as well the 8 pin MSOP package. The micro SMD package requires approximately 1/4 the board area of a SOT23. This package is less than 1mm in height allowing it to be placed in absolute minimum height clearance areas such as cellular handsets, LCD panels, PCMCIA cards, etc. More information about the micro SMD package can be found at: http:// www.national.com/appinfo/microsmd. DS101240-82 FIGURE 1. Supply Current vs. ’SD’ Voltage www.national.com 6 Application Notes Conversion Boards: (Continued) load drive capability can be increased from 8200pF to 16000pF if the output load is increased from 5KΩ to 600Ω (Av = +10, 25% overshoot limit, 10V supply). Isolation resistor between output and cap load: • This resistor will isolate the feedback path (where excessive phase shift due to output capacitance can cause instability) from the capacitive load. With a 10V supply, a 100Ω isolation resistor allows unlimited capacitive load without oscillation compared to only 300pF without this resistor (Av = +1). Higher supply voltage: • Operating the LMC8101 at higher supply voltages allows higher cap load tolerance. At 10V, the LMC8101’s low supply voltage cap load limit of 300pF improves to about 600pF (Av = +1). Closed loop gain increase: • As with all Op Amps, the capacitive load tolerance of the LMC8101 increases with increasing closed loop gain. In applications where the load is mostly capacitive and the resistive loading is light, stability increases when the LMC8101 is operated at a closed loop gain larger than +1. In order to ease the evaluation of tiny packages such as the micro SMD, there is a conversion board (LMC8101CONV) available to board designers. This board converts a micro SMD device into an 8 pin DIP package (see Figure 2, Conversion Board Pin out diagram) for easier handling and evaluation. This board can be ordered from National Semiconductor by contacting http://www.national.com . DS101240-89 FIGURE 2. micro SMD Conversion Board pin-out Increased Output Current: Compared to the LMC7101, the LMC8101 has an improved output stage capable of up to three times larger output sourcing and sinking current. This improvement would allow a larger output voltage swing range compared to the LMC7101 when connected to relatively heavy loads. For lower supply voltages this is an added benefit since it increases the output swing range. For example, the LMC8101 can typically swing 2.5Vpp with 2mA sourcing and sinking output current (Vs = 2.7V) whereas the LMC7101 output swing would be limited to 1.9Vpp under the same conditions. Also, compared to the LMC7101 in the SOT23 package, the LMC8101 can dissipate more power because both the MSOP and the micro SMD packages have 40% better heat dissipation capability. Lower 1/f noise: The dominant input referred noise term for the LMC8101 is the input noise voltage. Input noise current for this device is of no practical significance unless the equivalent resistance it looks into is 5MΩ or higher. The LMC8101’s low frequency noise is significantly lower than that of the LMC7101. For example, at 10Hz, the input referred spot noise voltage density is 85 nV as compared to about 200nV for the LMC7101. Over a frequency range of 0.1Hz to 100Hz, the total noise of the LMC8101 will be approximately 60% less than that of the LMC7101. Lower THD: When connected to heavier loads, the LMC8101 has lower THD compared to the LMC7101. For example, with 5V supply at 10KHz and 2Vpp swing (Av = −2), the LMC8101 THD (0.2%) is 60% less than the LMC7101’s. The LMC8101 THD can be kept below 0.1% with 3Vpp at the output for up to 10KHz (refer to the Typical Characteristics Plots). Improving the Cap load drive capability: This can be accomplished in several ways: Output resistive loading increase: • The Phase Margin increases with increasing load (refer to the Typical Characteristics Plots). When driving capacitive loads, stability can generally be improved by allowing some output current to flow through a load. For example, the cap 7 www.national.com Typical Performance Characteristics specified Gain/Phase vs. Frequency RL = 2k, VS = ± 1.35V VS = 2.7V, Single Supply, VCM = V+/2, TA = 25˚C unless Gain/Phase vs. Frequency RL = 2k, VS = ± 5V Gain/Phase vs. Frequency RL = open DS101240-2 DS101240-1 DS101240-4 Gain vs. Phase for various CL VS = ± 1.35V Unity Gain Frequency vs. Supply Voltage Phase Margin vs. Supply Voltage DS101240-3 DS101240-5 DS101240-6 Unity Gain Frequency and Phase Margin vs. Load Unity Gain Frequency and Phase Margin vs. Load PSRR vs. Frequency DS101240-7 DS101240-8 DS101240-10 www.national.com 8 Typical Performance Characteristics specified (Continued) PSRR vs. Frequency VS = 2.7V, Single Supply, VCM = V+/2, TA = 25˚C unless CMRR vs. Frequency Input Bias Current vs. Common Mode Voltage @ 85˚C DS101240-9 DS101240-11 DS101240-13 Input Current vs. Temperature VS = 10V Vin vs. Vout Vin vs. Vout DS101240-23 DS101240-91 DS101240-83 Vin vs. Vout Vin vs. Vout Supply Current vs. Supply Voltage DS101240-28 DS101240-24 DS101240-29 9 www.national.com Typical Performance Characteristics specified (Continued) Delta VOS vs. VCM (Ref VCM = 1.35V) VS = 2.7V, Single Supply, VCM = V+/2, TA = 25˚C unless Delta VOS vs. VCM (Ref VCM = 5V) Offset Voltage vs. Vsupply DS101240-92 DS101240-93 DS101240-37 Output Positive Swing vs. Supply Voltage, RL = 600Ω to V+/2 Output Positive Swing vs. Supply Voltage RL = 2k to V+/2 Output Negative Swing vs. Supply Voltage, RL = 600Ω to V+/2 DS101240-25 DS101240-27 DS101240-35 Output Negative Swing vs. Supply Voltage, RL = 2k to V+/2 Short Circuit Sinking Current vs. Supply Voltage Short Circuit Sourcing Current vs. Supply Voltage DS101240-36 DS101240-26 DS101240-30 www.national.com 10 Typical Performance Characteristics specified (Continued) Undistorted Output Voltage Swing vs.Output Load Resistance VS = 2.7V, Single Supply, VCM = V+/2, TA = 25˚C unless Step Response 1% settling time and % overshoot vs.Cap Load Large Signal Step Response DS101240-15 DS101240-46 DS101240-14 Small Signal Step Response Large Signal Step Response Small Signal Step Response DS101240-16 DS101240-17 DS101240-18 Small Signal Step Response Large Signal Step Response Large Signal Step Response DS101240-19 DS101240-20 DS101240-21 11 www.national.com Typical Performance Characteristics specified (Continued) Small Signal Step Response VS = 2.7V, Single Supply, VCM = V+/2, TA = 25˚C unless Slew Rate vs. Supply Voltage Slew Rate vs. Capacitive Load DS101240-22 DS101240-38 DS101240-39 Slew Rate vs. Capacitive Load Slew Rate vs. Capacitive Load Slew Rate vs. Capacitive Load DS101240-41 DS101240-42 DS101240-43 Voltage Noise vs. Frequency Voltage Noise vs. VCM @ Various Frequencies THD+N vs. Amplitude DS101240-40 DS101240-12 DS101240-44 www.national.com 12 Typical Performance Characteristics specified (Continued) THD+N vs. Frequency VS = 2.7V, Single Supply, VCM = V+/2, TA = 25˚C unless Sourcing Current vs. Output Voltage (VS = 2.7V) Sinking Current vs. Output Voltage (VS = 2.7V) DS101240-45 DS101240-87 DS101240-85 Sourcing Current vs. Output Voltage (VS = 10V) Sinking Current vs. Output Voltage (VS = 10V) Cap Load vs. Iout DS101240-86 DS101240-84 DS101240-88 Cap Load vs. Isolation Resistance DS101240-90 13 www.national.com Physical Dimensions inches (millimeters) unless otherwise noted NOTES: UNLESS OTHERWISE SPECIFIED 1. EPOXY COATING 2. 63Sn/37Pb EUTECTIC BUMP 3. RECOMMENDED NON-SOLDER MASK DEFINED LANDING PAD. 4. PIN 1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. REMAINING PINS ARE NUMBERED COUNTERCLOCKWISE. 5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS PACKAGE HEIGHT. 6. REFERENCE JEDEC REGISTRATION MO-211, VARIATION BC. micro SMD Package Order Package Number LMC8101BP or LMC8101BPX NS Package Number BPA08EFB X1 = 1.387 X2 = 1.4127 X3 = 0.850 www.national.com 14 LMC8101 Rail-to-Rail Input and Output, 2.7V Op Amp in micro SMD package with Shutdown Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 8-Pin MSOP Package Order Package Number LMC8101MM or LMC8101MMX NS Package Number MUA08A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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