LMH0344 3Gbps HD/SD SDI Adaptive Cable Equalizer
PRELIMINARY
April 2007
LMH0344 3Gbps HD/SD SDI Adaptive Cable Equalizer
General Description
The LMH0344 3Gbps HD/SD SDI Adaptive Cable Equalizer is designed to equalize data transmitted over cable (or any media with similar dispersive loss characteristics). The equalizer operates over a wide range of data rates from 143 Mbps to 2.97 Gbps and supports SMPTE 424M, SMPTE 292M, SMPTE 344M, and SMPTE 259M. The LMH0344 implements DC restoration to correctly handle pathological data conditions. The equalizer may be driven in either a single ended or differential configuration. Additional features include separate carrier detect and output mute pins which may be tied together to mute the output when no signal is present. A programmable mute reference is provided to mute the output at a selectable level of signal degradation.
Features
■ SMPTE 424M, SMPTE 292M, SMPTE 344M, and SMPTE
259M compliant
■ Supports DVB-ASI at 270 Mbps ■ High data rates: 143 Mbps to 2.97 Gbps ■ Equalizes up to 120 meters of Belden 1694A at 2.97 Gbps,
up to 140 meters of Belden 1694A at 1.485 Gbps, or up to 350 meters of Belden 1694A at 270 Mbps ■ Equalizes 0-100m of Belden 1694A at 2.97 Gbps with 0.3 UI maximum output jitter ■ Manual bypass and output mute with a programmable threshold ■ Single-ended or differential input
■ ■ ■ ■ ■
50Ω differential outputs Single 3.3V supply operation 280mW typical power consumption with 3.3V supply Footprint compatible with the LMH0044 Replaces the Gennum GS2974 or GS2974A
Applications
■ SMPTE 424M, SMPTE 292M, SMPTE 344M, and SMPTE
259M serial digital interfaces
■ Serial digital data equalization and reception ■ Data recovery equalization
Typical Application
20199001
© 2007 National Semiconductor Corporation
201990
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LMH0344
Absolute Maximum Ratings (Note 1)
Supply Voltage Input Voltage (all inputs) Storage Temperature Range Junction Temperature Lead Temperature (Soldering 4 Sec) Package Thermal Resistance θJA 16-pin LLP θJC 16-pin LLP ESD Rating (HBM) ESD Rating (MM) −0.5V to 3.6V −0.3V to VCC+0.3V −65°C to +150°C +150°C +260°C +43°C/W +8°C/W 8kV 250V
Recommended Operating Conditions
Supply Voltage (VCC – VEE) Input Coupling Capacitance AEC Capacitor (Connected between AEC+ and AEC-) Operating Free Air Temperature (TA) 3.3V ±5% 1.0 µF 1.0 µF 0°C to +85°C
DC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (Notes 2, 3). Symbol Parameter VCMIN VSDI VCMOUT VSDO Input Common Mode Voltage Input Voltage Swing Output Common Mode Voltage Output Voltage Swing MUTEREF DC Voltage (floating) MUTEREF Range CD Output Voltage MUTE Input Voltage ICC Supply Current Carrier not present Carrier present Min to mute outputs Max to force outputs active 85 MUTE 2.0 0.8 CD 2.4 0.4 50Ω load, differential MUTEREF At LMH0344 input, (Notes 4, 5) SDO, SDO Conditions Reference SDI, SDI 720 Min Typ 1.9 800 VCC – VSDO/2 750 1.3 0.7 950 Max Units V mVP−P V mVP-P V V V V V V mA
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LMH0344
AC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (Note 3). Symbol Parameter BRSDI Input Data Rate Jitter for various Cable Lengths (with equalizer pathological) 270 Mbps, Belden 1694A, 0-350 meters (Note 4) 1.485 Gbps, Belden 1694A, 0-140 meters (Note 4) 2.97 Gbps, Belden 1694A, 0-100 meters (Note 4) 2.97 Gbps, Belden 1694A, 100-120 meters tr,tf tOS ROUT RLIN RIN CIN Output Rise Time, Fall Time Mismatch in Rise/Fall Time Output Overshoot Output Resistance Input Return Loss Input Resistance Input Capacitance 20% – 80%, (Note 4) (Note 4) (Note 4) single-ended 5 MHz - 1.5 GHz, (Note 6) 1.5 GHz - 3.0 GHz, (Note 6) single-ended single-ended SDI, SDI 15 10 1.3 1 SDO, SDO 0.4 90 2 1 50 130 15 5 Conditions Reference SDI, SDI Min 143 Typ Max 2970 0.2 0.25 0.3 Units Mbps UI UI UI UI ps ps % Ω dB dB kΩ pF
Note 1: "Absolute Maximum Ratings" are those parameter values beyond which the life and operation of the device cannot be guaranteed. The stating herein of these maximums shall not be construed to imply that the device can or should be operated at or beyond these values. The table of "Electrical Characteristics" specifies acceptable device operating conditions. Note 2: Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are stated referenced to VEE = 0 Volts. Note 3: Typical values are stated for VCC = +3.3V and TA = +25°C. Note 4: Specification is guaranteed by characterization. Note 5: The maximum input voltage swing assumes a nonstressing, DC-balanced signal; specifically, the SMPTE-recommended color bar test signal. Pathological or other stressing signals may not be used. This specification is for 0m cable only. Note 6: Input return loss is dependent on board design. The LMH0344 meets this specification on the SD344 evaluation board.
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LMH0344
Connection Diagram
20199003
The exposed die attach pad is a negative electrical terminal for this device. It should be connected to the negative power supply voltage.
16-Pin LLP Order Number LMH0344SQ See NS Package Number SQB16A
Pin Descriptions
Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 VEE SDI SDI VEE AEC+ AECBYPASS MUTEREF VEE SDO SDO VEE VCC MUTE Name Description Negative power supply (ground). Serial data true input. Serial data complement input. Negative power supply (ground). AEC loop filter external capacitor (1µF) positive connection. AEC loop filter external capacitor (1µF) negative connection. Bypasses equalization and DC restoration when high. No equalization occurs in this mode. Mute reference. Sets the threshold for CD and (with CD tied to MUTE) determines the maximum cable to be equalized before muting. MUTEREF may be unconnected for maximum equalization. Negative power supply (ground). Serial data complement output. Serial data true output. Negative power supply (ground). Positive power supply (+3.3V). Output mute. To disable the mute function and enable the output, MUTE must be tied to GND or a low level signal. To force the outputs to a muted state, tie to VCC. CD may be tied to this pin to inhibit the output when no input signal is present. MUTE has no function in BYPASS mode. Carrier detect. CD is high when no signal is present. CD has no function in BYPASS mode. Positive power supply (+3.3V). Connect exposed DAP to negative power supply (ground).
15 16 DAP
CD VCC VEE
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LMH0344
Block Diagram
20199002
Device Operation
BLOCK DESCRIPTION The Equalizer Filter block is a multi-stage adaptive filter. If Bypass is high, the equalizer filter is disabled. The DC Restoration / Level Control block receives the differential signals from the equalizer filter block. This block incorporates a self-biasing DC restoration circuit to fully DC restore the signals. If Bypass is high, this function is disabled. The signals before and after the DC Restoration / Level Control block are used to generate the Automatic Equalization Control (AEC) signal. This control signal sets the gain and bandwidth of the equalizer filter. The loop response in the AEC block is controlled by an external 1µF capacitor placed across the AEC+ and AEC- pins. The Carrier Detect / Mute block generates the carrier detect signal and controls the mute function of the output. This block utilizes the CD and MUTE signals along with Mute Reference (MUTEREF). The Output Driver produces SDO and SDO. MUTE REFERENCE (MUTEREF) The mute reference sets the threshold for CD and (with CD tied to MUTE) determines the amount of cable to equalize before automatically muting the outputs. This is set by applying a voltage inversely proportional to the length of cable to equalize. As the applied MUTEREF voltage is increased, the amount of cable that can be equalized before carrier detect is de-asserted and the outputs are muted is decreased. MUTEREF may be left unconnected for maximum equalization before muting.
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CARRIER DETECT (CD) AND MUTE Carrier detect CD indicates if a valid signal is present at the LMH0344 input. If MUTEREF is used, the carrier detect threshold will be altered accordingly. CD provides a high voltage when no signal is present at the LMH0344 input. CD is low when a valid input signal is detected. MUTE can be used to manually mute or enable SDO and SDO. Applying a high input to MUTE will mute the LMH0344 outputs. Applying a low input will force the outputs to be active. CD and MUTE may be tied together to automatically mute the output when no input signal is present. INPUT INTERFACING The LMH0344 accepts either differential or single-ended input. The input must be AC coupled. Transformer coupling is not supported. The LMH0344 correctly handles equalizer pathological signals for standard definition and high definition serial digital video, as described in SMPTE RP 178 and RP 198, respectively. OUTPUT INTERFACING The SDO and SDO outputs are internally loaded with 50Ω. They produce a 750 mVP-P differential output, or a 375 mVP-P single-ended output.
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LMH0344
Application Information
PCB LAYOUT RECOMMENDATIONS Please refer to the following Application Note on National's website: AN-1372, “LMH0034 PCB Layout Techniques.”
The PCB layout techniques in the application note apply to the LMH0344 as well.
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LMH0344
Physical Dimensions inches (millimeters) unless otherwise noted
16-Pin LLP Order Number LMH0344SQ NS Package Number SQB16A
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LMH0344 3Gbps HD/SD SDI Adaptive Cable Equalizer
Notes
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Copyright© 2007 National Semiconductor Corporation
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