LMH0346MH

LMH0346 3Gbps HD/SD SDI Reclocker with Dual Differential Outputs PRELIMINARY April 2007 LMH0346 3Gbps HD/SD SDI Reclocker with Dual Differential Outputs General Description The LMH0346 3Gbps HD/SD SDI Reclocker retimes serial digital video data conforming to the SMPTE 424M, SMPTE 292M, and SMPTE 259M (C) standards. The LMH0346 operates at serial data rates of 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps. The LMH0346 supports DVB-ASI operation at 270 Mbps. The LMH0346 automatically detects the incoming data rate and adjusts itself to retime the incoming data to suppress accumulated jitter. The LMH0346 recovers the serial data-rate clock and optionally provides it as an output. The LMH0346 has two differential serial data outputs; the second output may be selected as a low-jitter, data-rate clock output (DDR clock at 3Gbps). Controls and indicators are: serial clock or second serial data output select, manual rate select input, SD/HD rate indicator output, lock detect output, auto/manual data bypass and output mute. The serial data inputs, outputs, and serial clock outputs are differential LVPECL compatible. The CML serial data and serial clock outputs are suitable for driving 100Ω differentially terminated networks. The control logic inputs and outputs are LVCMOS compatible. The LMH0346 is powered from a single 3.3V supply. Power dissipation is typically 370 mW. The device is housed in a 20pin e-TSSOP package. Features ■ Supports SMPTE 424M, SMPTE 292M, and SMPTE 259M (C) serial digital video standards ■ Supports 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Gbps, and 2.97 Gbps serial data rate operation Supports DVB-ASI at 270 Mbps Single 3.3V supply operation 370 mW typical power consumption Two differential, reclocked outputs Choice of second reclocked output or low-jitter, differential, data-rate clock output (DDR clock at 3Gbps) Single 27 MHz external crystal or reference clock input Manual rate select input SD/HD operating rate indicator output Lock Detect indicator output Output mute function for data and clock Auto/Manual reclocker bypass Differential LVPECL compatible serial data inputs and outputs LVCMOS control inputs and indicator outputs 20-Pin e-TSSOP package Industrial temperature range: -40°C to +85°C Footprint compatible with the LMH0046 Applications ■ SDTV/HDTV and 3Gbps serial digital video interfaces for: — — — — Digital video routers and switchers Digital video processing and editing equipment DVB-ASI equipment Video standards and format converters Typical Application 20215001 © 2007 National Semiconductor Corporation 202150 www.national.com LMH0346 Block Diagram 20215003 Connection Diagram 20215002 The exposed die attach pad is the negative electrical terminal for this device. It must be connected to the negative power supply voltage. 20-Pin e-TSSOP Order Number LMH0346MH See NS Package Number MXA20A www.national.com 2 LMH0346 Pin Descriptions Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 DAP LF1 LF2 RATE 0 RATE 1 SDI SDI VCC BYPASS/AUTO BYPASS OUTPUT MUTE XTAL IN/EXT CLK XTAL OUT LOCK DETECT SCO/SDO2 SCO/SDO2 VCCO SDO SDO VCCO SD/HD SCO_EN VEE Name Loop Filter Loop Filter Data Rate Select Input Data Rate Select Input Data Input True Data Input Complement Positive power supply input Bypass/Auto Bypass mode select Data and Clock Output Mute Input (active low) Crystal or External Oscillator Input Crystal Oscillator Output PLL Lock Detect Output (active high) Serial Clock or Serial Data Output 2 Complement Serial Clock or Serial Data Output 2 True Positive power supply input (Output Driver) Data Output Complement Data Output True Positive power supply input (Output Driver) Data Rate Range Output Serial Clock or Serial Data 2 Output select (active high enables serial clock output) Connect exposed DAP to negative power supply (ground) Description 3 www.national.com LMH0346 Absolute Maximum Ratings (Note 1) It is anticipated that this device will not be offered in a military qualified version. If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VCC–VEE) Logic Supply Voltage (Vi) Logic Input Current (single input): Vi = VEE−0.15V Vi = VCC+0.15V Logic Output Voltage (Vo) Logic Output Source/Sink Current Serial Data Input Voltage (VSDI) Serial Data Output Sink Current (ISDO) 4.0V VEE−0.15V to VCC +0.15V −5 mA +5 mA VEE−0.15V to VCC +0.15V ±8 mA VCC to VCC−2.0V 24 mA Package Thermal Resistance, TSSOP  θJA  θJC Storage Temp. Range Junction Temperature Lead Temperature (Soldering 4 Sec) ESD Rating (HBM) ESD Rating (MM) 26.6°C/W 2.4°C/W −65°C to +150°C +150°C +260°C (Pb-free) 8 kV 350V Recommended Operating Conditions Supply Voltage (VCC–VEE) Logic Input Voltage Differential Serial Input Voltage Serial Data or Clock Output Sink Current (ISO) Operating Free Air Temperature (TA) 3.3V ±5% VEE to VCC 800 mV ±10% 16 mA max. −40°C to +85°C DC Electrical Characteristics Over Supply Voltage and Operating Temperature ranges, unless otherwise specified. (Notes 2, 3) Symbol VIH VIL IIH IIL VOH VOL VSDID VCMI VSDOD VCMO ICC Parameter Input Voltage High Level Input Voltage Low Level Input Current High Level Input Current Low Level VIH = VCC VIL = VEE Logic outputs SDI 2 VEE + 0.6 200 VCC−1.6 100Ω differential load 100Ω differential load 1485 Mbps, NTSC color bar pattern SDO, SCO 720 800 VCC− VSDOD 111 1600 VCC−0.2 880 Conditions Reference Logic inputs Min 2 VEE 1 −1 Typ Max VCC 0.8 65 −25 Units V V µA µA V V mVP-P V mVP-P V mA Output Voltage High Level IOH = −2 mA Output Voltage Low Level IOL = +2 mA Serial Input Voltage, Differential Input Common Mode Voltage Serial Output Voltage, Differential Output Common Mode Voltage Power Supply Current, 3.3V supply, Total www.national.com 4 LMH0346 AC Electrical Characteristics Over Supply Voltage and Operating Temperature ranges, unless otherwise specified. (Note 3) Symbol BRSD BRSD BRSD TOLJIT TOLJIT TOLJIT TOLJIT TOLJIT TOLJIT tJIT tJIT tJIT BWLOOP Parameter Serial Data Rate Serial Data Rate Serial Data Rate Serial Input Jitter Tolerance Serial Input Jitter Tolerance Serial Input Jitter Tolerance Serial Input Jitter Tolerance Serial Input Jitter Tolerance Serial Input Jitter Tolerance Serial Data Output Jitter Serial Data Output Jitter Serial Data Output Jitter Loop Bandwidth Conditions SMPTE 259M, C SMPTE 292M SMPTE 424M 270 Mbps, (Notes 7, 9, 11) 270 Mbps, (Notes 7, 8, 10) 1483 or 1485 Mbps, (Notes 7, 8, 9) 1483 or 1485 Mbps, (Notes 7, 8, 10) 2967 or 2970 Mbps, (Notes 7, 8, 9) 2967 or 2970 Mbps, (Notes 7, 8, 10) 270 Mbps, (Note 8) 1483 or 1485 Mbps, (Note 8) 2967 or 2970 Mbps, (Note 8) 270 Mbps, 6 >0.6 >6 >0.6 0.01 0.03 0.09 300 2.0 4.0 270 1483 1485 1483 1485 2 3 0.06 0.08 0.15 Max Units Mbps Mbps Mbps UIP-P UIP-P UIP-P UIP-P UIP-P UIP-P UIP-P UIP-P UIP-P kHz MHz MHz MHz MHz MHz MHz MHz psRMS 45 10 1 1.5 55 16 6 3 % ms ms ns 5 www.national.com LMH0346 Symbol tr, tf tr, tf tr, tf tr, tf tr, tf FREF FTOL Parameter Input rise/fall time Input rise/fall time Input rise/fall time Output rise/fall time Output rise/fall time Reference Clock Frequency Reference Clock Frequency Tolerance Conditions 20%–80%, 270 Mbps 20%–80%, 1483 or 1485 Mbps 20%–80%, 2967 or 2970 Mbps 10%–90% 20%–80%, (Note 5) Reference SDI Min Typ Max 1500 270 135 Units ps ps ps ns ps MHz ppm Logic outputs SDO, SCO 1.5 90 27 ±50 3 130 Note 1: “Absolute Maximum Ratings” are those parameter values beyond which the life and operation of the device cannot be guaranteed. The stating herein of these maximums shall not be construed to imply that the device can or should be operated at or beyond these values. The table of “Electrical Characteristics” specifies acceptable device operating conditions. Note 2: Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are referenced to VEE (equal to zero volts). Note 3: Typical values are stated for: VCC = +3.3V, TA = +25°C. Note 4: Spec is guaranteed by design. Note 5: RL = 100Ω differential. Note 6: Measured from first SDI transition until Lock Detect (LD) output goes high (true). Note 7: Peak-to-peak amplitude with sinusoidal modulation per SMPTE RP 184-1996 paragraph 4.1. The test data signal shall be color bars. Note 8: This parameter is guaranteed by characterization over voltage and temperature limits. Note 9: Refer to “A1” in Figure 1 of SMPTE RP 184-1996. Note 10: Refer to “A2” in Figure 1 of SMPTE RP 184-1996. Note 11: Characterized to the limitations of SDI test equipment. www.national.com 6 LMH0346 Device Description The LMH0346 3Gbps HD/SD SDI Reclocker is used in many types of digital video signal processing equipment. Supported serial digital video standards are SMPTE 259M (C), SMPTE 292M, and SMPTE 424M. Corresponding serial data rates are 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps. DVB-ASI data at 270 Mbps may also be retimed. The LMH0346 retimes the serial data stream to suppress accumulated jitter. It provides two low-jitter, differential, serial data outputs. The second output may be selected to output either serial data or a low-jitter serial data-rate clock (DDR clock at 3Gbps). Controls and indicators are: serial clock or second serial data output select, manual rate select input, SD/ HD rate output, lock detect output, auto/manual data bypass and output mute. Serial data inputs are CML and LVPECL compatible. Serial data and clock outputs are differential CML and produce LVPECL compatible levels. The output buffer design can drive AC or DC-coupled, terminated 100Ω differential loads. The differential output level is 800 mVP-P ±10% into 100Ω AC or DC-coupled differential loads. Logic inputs and outputs are LVCMOS compatible. The device package is a TSSOP20 with an exposed die attach pad. The exposed die attach pad is electrically connected to device ground (VEE) and is the negative electrical terminal for the device. This terminal must be connected to the negative power supply or circuit ground. input is differential LVPECL compatible. The input is intended to be DC interfaced to devices such as the LMH0344 adaptive cable equalizer. The input is not internally terminated or biased. The input may be AC-coupled if a suitable input bias voltage is provided. Figure 1 shows the equivalent input circuit for SDI and SDI. The LMH0346 has two, retimed, differential, serial data outputs, SDO and SCO/SDO2. These outputs provide low jitter, differential, retimed data to devices such as the LMH0302 cable driver. Output SCO/SDO2 is multiplexed and can provide either a second serial data output or a serial clock output. Figure 2 shows the equivalent output circuit for SDO, SDO, SCO/SDO2, and SCO/SDO2. The SCO_EN input controls the operating mode for the SCO/ SDO2 output. When the SCO_EN input is high the SCO/ SDO2 output provides a serial clock. When SCO_EN is low, the SCO/SDO2 output provides retimed serial data. Both differential serial data outputs, SDO and SCO/SDO2, are muted when the MUTE input is a logic low level. SCO/ SDO2 also mutes when the Bypass mode is activated when this output is operating as the serial clock output. When muted, SDO and SDO (or SDO2 and SDO2) will assume opposite differential output levels. The CML serial data outputs are differential LVPECL compatible. These outputs have internal 50Ω pull-ups and are suitable for driving AC or DC-coupled, 100Ω center-tapped, AC grounded or 100Ω un-centertapped, differentially terminated networks. Serial Data Inputs, Serial Data and Clock Outputs SERIAL DATA INPUT AND OUTPUTS The differential serial data input, SDI, accepts serial digital video data at the rates specified in Table 1. The serial data 20215008 FIGURE 1. Equivalent SDI Input Circuit (SDI, SDI) 7 www.national.com LMH0346 20215009 FIGURE 2. Equivalent SDO Output Circuit (SDO, SDO, SCO/SDO2, SCO/SDO2) OPERATING SERIAL DATA RATES This device operates at serial data rates of 270 Mbps, 1483 Mbps, 1485 Mbps, 2967 Mbps, and 2970 Mbps. The device does not lock to harmonics of these rates. The device does not lock and automatically enters the reclocker bypass mode for the following data rates: 143 Mbps, 177 Mbps, 360 Mbps, and 540 Mbps. SERIAL DATA CLOCK/SERIAL DATA 2 OUTPUT The Serial Data Clock/Serial Data 2 Output is controlled by the SCO_EN input and provides either a second retimed serial data output or a low jitter differential clock output appropriate to the serial data rate being processed. When operating as a serial clock output, the rising edge of the clock will be positioned within the corresponding serial data bit interval within 10% of the center of the data interval. In 270 Mbps or 1483 / 1485 Mbps mode, the LMH0346 implements a single data rate (SDR) clock. In 2967 / 2970 Mbps mode, the LMH0346 implements a double date rate (DDR) clock. Differential output SCO/SDO2 functions as the second serial data output when the SCO_EN input is a logic-low level. This output functions as the serial clock output when the SCO_EN input is a logic-high level. The SCO_EN input has an internal pull-down device and the default state of SCO_EN is low (serial data output 2 enabled). SCO/SDO2 is muted when the MUTE input is a logic low level. When the Bypass mode is activated and this output is functioning as a serial clock output, the output will also be muted. is MPEG2 coded data that is transmitted in 8B10B coding. The device will reclock this data without harmonic locking. Auto-Rate Detect mode may be used for any supported data rate, including DVB-ASI. TABLE 1. Data Rate Select Input Codes Rate [1:0] Code 00 Data Rate or Mode Auto-Rate Detect mode 270 Mbps 1483/1485 Mbps, 2967/2970 Mbps May be used to support DVBASI operation Comments 01 10 LOCK DETECT The Lock Detect (LD) output, when high, indicates that data is being received and the PLL is locked. LD may be connected to the MUTE input to mute the data and clock outputs when no data signal is being received. See Table 2. MUTE The MUTE input, when low, mutes the serial data and clock outputs. It may be connected to Lock Detect or externally driven to mute or un-mute the outputs. If MUTE is connected to LD, then the data and clock outputs are muted when the PLL is not locked. This function overrides the Bypass function: see Table 2. MUTE has an internal pull-up device to enable the output by default. BYPASS/AUTO BYPASS The Bypass/Auto Bypass input, when high, forces the device to output the data without reclocking it. When this input is low, the device automatically bypasses the reclocking function when the device is in an unlocked condition or the detected data rate is a rate which the device does not support. See Table 2. BYPASS/AUTO BYPASS has an internal pull-down device. Control Inputs and Indicator Outputs SERIAL DATA RATE SELECTOR The Serial Data Rate Selector (RATE [1:0]) permits the user to fix the operating serial data rate. The pins have internal pulldowns which maintain a logic-low input condition unless externally driven to a logic-high condition. This input also serves to place the device in a test mode. The codes shown in Table 1 select the desired operating serial data rate. The LMH0346 then enters either the Auto-Rate Detect mode or a single operating rate. Selecting the 270 Mbps rate mode may also be used when reclocking DVB-ASI data. DVB-ASI data www.national.com 8 LMH0346 TABLE 2. Control Functionality LOCK DETECT 0 1 X 0 1 1 X OUTPUT MUTE 1 1 0 LOCK DETECT LOCK DETECT LOCK DETECT 1 BYPASS/AUTO BYPASS 0 0 X X 0 1 1 DEVICE STATUS PLL unlocked, reclocker bypassed PLL locked to supported data rate, reclocker not bypassed Outputs muted Outputs muted PLL locked to supported data rate, reclocker not bypassed PLL locked to supported data rate, reclocker bypassed Outputs not muted, reclocker bypassed is only valid when the PLL is locked and the Lock Detect output is high. When the PLL is not locked (the Lock Detect output is low), the SD/HD output defaults to HD (low). The SD/ HD output is undefined for a short time after lock detect assertion or deassertion due to a data rate change on SDI. See Figure 3 for a timing diagram showing the relationship between SDI, Lock Detect, and SD/HD. SD/HD The SD/HD output indicates whether the LMH0346 is processing SD or HD / 3Gbps data rates. It may be used to control another device such as the LMH0302 cable driver. When this output is high it indicates that the data rate is 270 Mbps. When low, the indicated data rate is 1483, 1485, 2967, or 2970 Mbps. The SD/HD output is a registered function and 9 www.national.com LMH0346 20215005 FIGURE 3. SDI, Lock Detect, and SD/HD Timing SCO_EN Input SCO_EN enables the SCO/SDO2 differential output to function either as a serial clock or second serial data output. SCO/SDO2 functions as a serial clock when SCO_EN is high. This pin has an internal pull-down device. The default state (low) enables the SCO/SDO2 output as a second serial data output. CRYSTAL OR EXTERNAL CLOCK REFERENCE The LMH0346 uses a 27 MHz crystal or external clock signal as a timing reference input. A 27 MHz parallel resonant crystal and load network may be connected to the XTAL IN/EXT CLK and XTAL OUT pins. Alternatively, a 27 MHz LVCMOS compatible clock signal may be input to XTAL IN/EXT CLK. Parameters for a suitable crystal are given in Table 3. www.national.com 10 LMH0346 TABLE 3. Crystal Parameters Parameter Frequency Frequency Stability Operating Mode Load Capacitance 27 MHz ±50 ppm @ recommended drive level Fundamental mode, Parallel Resonant 20 pF Value Parameter Shunt Capacitance Series Resistance Recommended Drive Level Maximum Drive Level Operating Temperature Range 7 pF 40Ω max. 100 µW 500 µW Value −10°C to +60°C 11 www.national.com LMH0346 Application Information Figure 4 shows an application circuit for the LMH0346 along with the LMH0344 3Gbps HD/SD SDI Adaptive Cable Equalizer and LMH0302 3Gbps HD/SD SDI Cable Driver. 20215004 FIGURE 4. Application Circuit www.national.com 12 LMH0346 Physical Dimensions inches (millimeters) unless otherwise noted 20-Pin e-TSSOP Order Number LMH0346MH NS Package Number MXA20A 13 www.national.com LMH0346 3Gbps HD/SD SDI Reclocker with Dual Differential Outputs Notes THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS, IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT NATIONAL’S PRODUCT WARRANTY. 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All other brand or product names may be trademarks or registered trademarks of their respective holders. Copyright© 2007 National Semiconductor Corporation For the most current product information visit us at www.national.com National Semiconductor Americas Customer Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 National Semiconductor Europe Customer Support Center Fax: +49 (0) 180-530-85-86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +49 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Support Center Email: ap.support@nsc.com National Semiconductor Japan Customer Support Center Fax: 81-3-5639-7507 Email: jpn.feedback@nsc.com Tel: 81-3-5639-7560 www.national.com