LMH6517

LMH6517 Multi Standard, IF and Baseband, Dual, DVGA PRELIMINARY November 10, 2008 LMH6517 Multi Standard, IF and Baseband, Dual, DVGA General Description The LMH6517 contains two high performance digitally controlled variable gain amplifiers (DVGA). It has been designed for use in narrowband and broadband IF sampling applications. Typically the LMH6517 drives a high performance ADC in a broad range of mixed signal and digital communication applications such as mobile radio and cellular base stations where automatic gain control (AGC) is required to increase system dynamic range. Each channel of LMH6517 has an independent digitally controlled attenuator and a high linearity, differential output amplifier. Each block has been optimized for low distortion and maximum system design flexibility. Each channel can be individually disabled for power savings. The LMH6517 digitally controlled attenuator provides precise 0.5 dB gain steps over a 31.5 dB range. On chip digital latches are provided for local storage of the gain setting. Both serial and parallel programming options are provided. A Pulse mode is also offered where simple up or down commands can change the gain one step at a time. The output amplifier has a differential output allowing large signal swings on a single 5V supply. The low impedance output provides maximum flexibility when driving filters or analog to digital converters. The LMH6517 operates over the industrial temperature range of −40°C to +85°C. The LMH6517 is available in a 32-Pin, thermally enhanced, LLP package. Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Accurate, 0.5dB gain steps 200Ω Resistive, differential input Low impedance, differential output Disable function for each channel Parallel or serial gain control SPI compatible serial bus On chip register stores gain setting Low sensitivity of linearity and phase to gain setting Single 5V supply voltage Small footprint LLP package Key Specifications ■ ■ ■ ■ ■ ■ Gain step size of 0.5 dB Operating frequency Range of 1200 MHz OIP3: 47 dBm @ 100 MHz Noise figure 6 dB Gain step accuracy: 0.15 dB Supply current 80 mA per channel Applications ■ ■ ■ ■ ■ Cellular base stations IF sampling receivers Instrumentation Modems Imaging Typical Application 30068101 LMH™ is a trademark of National Semiconductor Corporation. © 2008 National Semiconductor Corporation 300681 www.national.com LMH6517 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Human Body Model Machine Model Positive Supply Voltage (Pin 3) Output Voltage (Pin 14,15) Differential Voltage between Any Two Grounds Analog Input Voltage Range Digital Input Voltage Range Output Short Circuit Duration (one pin to ground) Junction Temperature 2 kV 200V −0.6V to 5.5V Storage Temperature Range Soldering Information −65°C to +150°C 235°C 260°C  Infrared or Convection (20 sec)  Wave Soldering (10 sec) Operating Ratings (Note 1) 3.15V to 5.25V 1 MHz Maximum Gain 43 40 22 1.1 22 6 47 45 22.15 22.2 Max (Note 6) Units Dynamic Performance SSBW Frequency Range Maximum Gain Input Noise Voltage Output Noise Voltage Noise Figure OIP3 MHz dB nV/ nV/ dB dBm Output Third Order Intercept Point f = 100 MHz, VOUT = 1 dBm per tone Output Third Order Intercept Point f = 200 MHz, VOUT = 1 dBm per tone Analog I/O Input Resistance Input Capacitance Input Common Mode Voltage Input Common Mode Voltage Range Maximum Input Voltage Swing Output Common Mode Voltage Maximum Output Voltage Swing VOS CMRR PSRR XTLK XTLK Output Offset Voltage Common Mode Rejection Ratio Power Supply Rejection Ratio Channel to Channel Crosstalk Channel to Channel Crosstalk Maximum Gain Minimum Gain All Gain Settings Maximum Gain, f = 100 MHz Maximum Gain, f = 100 MHz Maximum Gain, f = 100 MHz Maximum Gain, f = 300 MHz Gain Code 000000 Gain Code 111111 21.85 21.8 −9.3 −9.2 −5 −10 Self Biased Externally Driven Volts peak to peak, differential Self Biased 2.4 2.48 2.4 1.5 5.5 2.5 5 0.5 60 60 −60 −50 22 −9.5 22.15 22.2 −9.7 −9.8 5 10 2.6 Differential 195 210 2 2.5 2.52 2.6 3.5 230 Ω pF V V V V V mV dB dB dB dB Gain Parameters dB dB www.national.com 2 LMH6517 Symbol Parameter Gain Adjust Range Gain Step Size Gain Step Error Gain Step Error Gain Step Phase Shift Gain Step Switching Time Any two steps Conditions Min (Note 6) Typ (Note 5) 31.5 0.5 Max (Note 6) Units dB dB −0.3 −0.2 −2 ±0.05 ±0.05 0.5 15 0.3 0.2 2 dB dB deg ns Maximum Gain to Maximum Gain −12 dB Between any two steps Differential TTL, 2.5V CMOS, 3.3V CMOS Digital Inputs/Timing Logic Compatibility VIL VIH IIH IIL TSU THOLD TPW ICC Logic Input Low Voltage Logic Input High Voltage Logic Input High Input Current Logic Input Low Input Current Setup Time Hold Time Minimum Latch Pulse Width Supply Current Each channel, 70 Digital Input Voltage = 3.3V Digital Input Voltage = 0V 0 2.0 −100 −100 5 5 10 80 91 0.4 3.6 100 100 ns ns ns mA V V μA Power Requirements Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics tables. Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). Note 3: The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board. Note 4: Electrical Table values apply only for factory testing conditions at the temperature indicated. No guarantee of parametric performance is indicated in the electrical tables under conditions different than those tested Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Note 6: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control (SQC) methods. Note 7: Negative input current implies current flowing out of the device. Note 8: Drift determined by dividing the change in parameter at temperature extremes by the total temperature change. 3 www.national.com LMH6517 Connection Diagram 32-Pin LLP 30068103 Top View Ordering Information Package 32-Pin LLP Part Number LMH6517SQ LMH6517SQE LMH6517SQX L6517SQ Package Marking Transport Media 1k Units Tape and Reel 250 Units Tape and Reel 4.5k Units Tape and Reel SQA32A NSC Drawing www.national.com 4 LMH6517 Pin Descriptions Pin Number Analog I/O 30, 11 29, 12 24, 17 23, 18 Power 13, 15, 26, 28, center pad 14, 27 4, 5 22, 19 25, 16 31, 10 32, 9 1, 8 2, 7 3, 6 21, 20 GND Ground pins. Connect to low impedance ground plane. All pin voltages are specified with respect to the voltage on these pins. The exposed thermal pad is the primary ground connection. Power supply pins. Valid power supply range is 3V to 5.5V. Digital Mode control pins. These pins float to the logic hi state if left unconnected. See below for Mode settings. Enable pins. Logic 1 = enabled state. See application section for operation in serial mode. Gain bit zero = 0.5 dB step. Gain steps down from maximum gain (000000 = Maximum Gain) Gain bit one = 1 dB step Gain bit two = 2 dB step Gain bit three = 4 dB step Gain bit four = 8 dB step Gain bit five = 16 dB step Latch pins. Logic zero = active, logic 1 = latched. Gain will not change once latch is high. Connect to ground if the latch function is not desired. Serial Clock Serial Data In (SPI Compatible) See application section for more details. Serial Chip Select (SPI compatible) Serial Data Out (SPI compatible) Pins unused in Serial Mode, connect to DC ground. IPA+, IPB+ IPA−, IPB− OPA+, OPB+ OPA−, OPB− Amplifier non—inverting input. Internally biased to mid supply. Input voltage should not exceed VCC or go below GND by more than 0.5V. Amplifier inverting input. Internally biased to mid supply. Input voltage should not exceed VCC or go below GND by more than 0.5V. Amplifier non—inverting output. Internally biased to mid supply. Amplifier inverting output. Internally biased to mid supply. Symbol Description +5V MOD0, MOD1 ENA, ENB A0, B0 A1, B1 A2, B2 A3, B3 A4, B4 A5, B5 LATA, LATB Common Control Pins Digital Inputs Parallel Mode (MOD1 = 1, MOD0 = 1) Digital Inputs Serial Mode 2 1 32 31 3, 4, 6 — 10, 15, 16, 20, 21, 25, 26 2, 7 1, 8 1 & 2 or 7 & 8 31, 32 10, 9 S0A, S1A S0B, S1B CLK SDI CS SDO GND Digital Inputs Pulse Mode UPA, UPB DNA, DNB Up pulse pin. A logic 1 pulse will increase gain one step. Down pulse pin. A logic 1 pulse will decrease gain one step. Pulsing both pins together will reset the gain to maximum gain. Step size zero and step size 1. (0,0) = 0.5 dB; (0, 1) = 1 dB; (1, 0) = 2 dB, and (1, 1) = 6 dB Step size zero and step size 1. (0,0) = 0.5 dB; (0, 1) = 1 dB; (1,0) = 2 dB, and (1, 1) = 6 dB Pins unused in Pulse Mode, connect to DC ground. 3, 5, 6, 13, 15, 16, GND 25, 26 5 www.national.com LMH6517 Physical Dimensions inches (millimeters) unless otherwise noted 16-Pin Package NS Package Number SQA32A www.national.com 6 LMH6517 Notes 7 www.national.com LMH6517 Multi Standard, IF and Baseband, Dual, DVGA Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Amplifiers Audio Clock and Timing Data Converters Interface LVDS Power Management Switching Regulators LDOs LED Lighting Voltage Reference PowerWise® Solutions Serial Digital Interface (SDI) Temperature Sensors Wireless (PLL/VCO) www.national.com/amplifiers www.national.com/audio www.national.com/timing www.national.com/adc www.national.com/interface www.national.com/lvds www.national.com/power www.national.com/switchers www.national.com/ldo www.national.com/led www.national.com/vref www.national.com/powerwise www.national.com/sdi www.national.com/tempsensors www.national.com/wireless WEBENCH® Tools App Notes Reference Designs Samples Eval Boards Packaging Green Compliance Distributors Design Support www.national.com/webench www.national.com/appnotes www.national.com/refdesigns www.national.com/samples www.national.com/evalboards www.national.com/packaging www.national.com/quality/green www.national.com/contacts www.national.com/quality www.national.com/feedback www.national.com/easy www.national.com/solutions www.national.com/milaero www.national.com/solarmagic www.national.com/AU Quality and Reliability Feedback/Support Design Made Easy Solutions Mil/Aero Solar Magic® Analog University® THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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