LMH6550MA

LMH6550 Differential, High Speed Op Amp May 2006 LMH6550 Differential, High Speed Op Amp General Description The LMH™6550 is a high performance voltage feedback differential amplifier. The LMH6550 has the high speed and low distortion necessary for driving high performance ADCs as well as the current handling capability to drive signals over balanced transmission lines like CAT 5 data cables. The LMH6550 can handle a wide range of video and data formats. With external gain set resistors, the LMH6550 can be used at any desired gain. Gain flexibility coupled with high speed makes the LMH6550 suitable for use as an IF amplifier in high performance communications equipment. The LMH6550 is available in the space saving SOIC and MSOP packages. Features n n n n n n 400 MHz −3 dB bandwidth (VOUT = 0.5 VPP) 90 MHz 0.1 dB bandwidth 3000 V/µs slew Rate 8 ns settling time to 0.1% −92/−103 dB HD2/HD3 @ 5 MHz 10 ns shutdown/enable Applications n n n n n n n Differential AD driver Video over twisted pair Differential line driver Single end to differential converter High speed differential signaling IF/RF amplifier SAW filter buffer/driver Typical Application 20130110 Single Ended Input Differential Output. Gain = AV=0.5 * RF/RG LMH™ is a trademark of National Semiconductor Corporation. © 2006 National Semiconductor Corporation DS201301 www.national.com LMH6550 Connection Diagram 8-Pin SOIC & MSOP 20130108 Top View Ordering Information Package 8-Pin SOIC 8-Pin MSOP Part Number LMH6550MA LMH6550MAX LMH6550MM LMH6550MMX Package Marking LMH6550MA AL1A Transport Media 95/Rails 2.5k Units Tape and Reel 1k Units Tape and Reel 3.5k Units Tape and Reel NSC Drawing M08A MUA08A www.national.com 2 LMH6550 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 5) Human Body Model Machine Model Supply Voltage Common Mode Input Voltage Maximum Input Current (pins 1, 2, 7, 8) Maximum Output Current (pins 4, 5) Soldering Information 2000V 200V 13.2V Infrared or Convection (20 sec) Wave Soldering (10 sec) 235˚C 260˚C Operating Ratings (Note 1) Operating Temperature Range Storage Temperature Range Total Supply Voltage 8-Pin SOIC 8-Pin MSOP −40˚C to +85˚C −65˚C to +150˚C 4.5V to 12V 150˚C/W 235˚C/W ± VS 30 mA (Note 3) Package Thermal Resistance (θJA) (Note 4) ± 5V Electrical Characteristics (Note 2) Single ended in differential out, TA = 25˚C, AV= +1, VS = ± 5V, VCM = 0V, RF = RG = 365Ω, RL = 500Ω; Unless specified. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 8) Typ (Note 7) 400 380 320 90 2000 3000 1 8 210 200 −92 −78 −59 −103 −88 −50 6.0 1.5 1 1.6 0 -8 9.6 0.3 72 82 5 1 −16 nV/ pA/ dBc dBc Max (Note 8) Units AC Performance (Differential) SSBW LSBW Small Signal −3 dB Bandwidth Large Signal −3 dB Bandwidth Large Signal −3 dB Bandwidth 0.1 dB Bandwidth Slew Rate Rise/Fall Time Settling Time Common Mode Small Signal Bandwidth Slew Rate Distortion and Noise Response HD2 2nd Harmonic Distortion VO = 2 VPP, f = 5 MHz, RL = 800Ω VO = 2 VPP, f = 20 MHz, RL = 800Ω VO = 2 VPP, f = 70 MHz, RL = 800Ω HD3 3rd Harmonic Distortion VO = 2 VPP, f = 5 MHz, RL = 800Ω VO = 2 VPP, f = 20 MHz, RL = 800Ω VO = 2 VPP, f = 70 MHz, RL = 800Ω en in VOSD Input Referred Voltage Noise Input Referred Noise Current Input Offset Voltage Input Offset Voltage Average Temperature Drift IBI Input Bias Current Input Bias Current Average Temperature Drift Input Bias Difference CMRR RIN CIN Common Mode Rejection Ratio Input Resistance Input Capacitance f ≥ 1 MHz f ≥ 1 MHz Differential Mode, VID = 0, VCM = 0 (Note 10) (Note 9) (Note 10) Difference in Bias Currents Between the Two Inputs DC, VCM = 0V, VID = 0V Differential Differential VOUT = 0.5 VPP VOUT = 2 VPP VOUT = 4 VPP VOUT = 0.5 VPP 4V Step (Note 6) 2V Step 2V Step, 0.1% VCM Bypass Capacitor Removed VCM Bypass Capacitor Removed MHz MHz MHz MHz V/µs ns ns MHz V/µs VCM Pin AC Performance (Common Mode Feedback Amplifier) Input Characteristics (Differential) ±4 ±6 mV µV/˚C µA nA/˚C µA dBc MΩ pF 3 www.national.com LMH6550 ± 5V Electrical Characteristics (Note 2) Symbol CMVR Parameter Input Common Mode Voltage Range Input Offset Voltage Input Offset Voltage Average Temperature Drift Input Bias Current VCM CMRR Input Resistance Common Mode Gain Output Performance Output Voltage Swing Output Common Mode Voltage Range IOUT ISC Linear Output Current Short Circuit Current Output Balance Error (Continued) Single ended in differential out, TA = 25˚C, AV= +1, VS = ± 5V, VCM = 0V, RF = RG = 365Ω, RL = 500Ω; Unless specified. Boldface limits apply at the temperature extremes. Conditions CMRR > 53 dB Min (Note 8) +3.1 −4.6 Typ (Note 7) +3.2 −4.7 1 25 −2 70 75 25 ∆VO,CM/∆VCM Peak to Peak, Differential VID = 0 V, VOUT = 0V Output Shorted to Ground VIN = 3V Single Ended (Note 3) ∆VOUT Common Mode /∆VOUT Differential , VOUT = 1 VPP Differential, f = 10 MHz Pin 7 Pin 7 10 Differential DC, ∆VS = ± 1V RL = ∞ 74 18 70 90 20 1 24 27 1.2 2.0 1.5 0.995 7.38 7.18 0.997 7.8 1.005 Max (Note 8) Units V VCM Pin Input Characteristics (Common Mode Feedback Amplifier) VOSC Common Mode, VID = 0 (Note 10) (Note 9) VID = 0V, 1V Step on VCM Pin, Measure VOD ±5 ±8 mV µV/˚C µA dB kΩ V/V V V mA mA dB ± 3.69 ± 63 ± 3.8 ± 75 ± 200 −68 Miscellaneous Performance Enable Voltage Threshold Disable Voltage Threshold Enable/Disable Time AVOL PSRR Open Loop Gain Power Supply Rejection Ratio Supply Current Disabled Supply Current V V ns dB dB mA mA (Note 2) Single ended in differential out, TA = 25˚C, AV = +1, VS = 5V, VCM = 2.5V, RF = RG = 365Ω, RL = 500Ω; Unless specified. Boldface limits apply at the temperature extremes. Symbol SSBW LSBW Parameter Small Signal −3 dB Bandwidth Large Signal −3 dB Bandwidth 0.1 dB Bandwidth Slew Rate Rise/Fall Time, 10% to 90% Settling Time Common Mode Small Signal Bandwidth Slew Rate 2V Step (Note 6) 1V Step 1V Step, 0.05% Conditions RL = 500Ω, VOUT = 0.5 VPP RL = 500Ω, VOUT = 2 VPP Min (Note 8) Typ (Note 7) 350 330 60 1500 1 12 185 180 Max (Note 8) Units MHz MHz MHz V/µs ns ns MHz V/µs 5V Electrical Characteristics VCM Pin AC Performance (Common Mode Feedback Amplifier) www.national.com 4 LMH6550 5V Electrical Characteristics Symbol Parameter (Note 2) (Continued) Single ended in differential out, TA = 25˚C, AV = +1, VS = 5V, VCM = 2.5V, RF = RG = 365Ω, RL = 500Ω; Unless specified. Boldface limits apply at the temperature extremes. Conditions Min (Note 8) Typ (Note 7) −89 −88 −85 −70 6.0 1.5 1 1.6 0 −8 9.5 0.3 70 80 5 1 +3.1 +0.4 +3.2 +0.3 1 18.6 3 VID = 0, 1V Step on VCM Pin, Measure VOD VCM Pin to Ground ∆VO,CM/∆VCM Peak to Peak, Differential, VS = ± 2.5V, VCM = 0V VOUT = 0V Differential Output Shorted to Ground VIN = 3V Single Ended (Note 3) VID = 0, VCM Pin = 1.2V and 3.8V ∆VOUT Common Mode /∆VOUT DIfferential , VOUT = 1 VPP Differential, f = 10 MHz Pin 7 Pin 7 10 DC, Differential 70 2.0 1.5 3.72 1.23 2.4 70 75 25 0.991 2.8 −16 Max (Note 8) Units Distortion and Noise Response HD2 HD3 en in VOSD 2nd Harmonic Distortion 3rd Harmonic Distortion Input Referred Noise Voltage Input Referred Noise Current Input Offset Voltage Input Offset Voltage Average Temperature Drift IBIAS Input Bias Current Input Bias Current Average Temperature Drift Input Bias Current Difference CMRR Common-Mode Rejection Ratio Input Resistance Input Capacitance VICM Input Common Mode Range VO = 2 VPP, f = 5 MHz, RL = 800Ω VO = 2 VPP, f = 20 MHz, RL = 800Ω VO = 2 VPP, f = 5 MHz, RL = 800Ω VO = 2 VPP, f = 20 MHz, RL = 800Ω f ≥ 1 MHz f ≥ 1 MHz Differential Mode, VID = 0, VCM = 0 (Note 10) (Note 9) (Note 10) Difference in Bias Currents Between the Two Inputs DC, VID = 0V Differential Differential CMRR > 53 dB dBc dBc nV/ pA/ Input Characteristics (Differential) ±4 ±6 mV µV/˚C µA nA/˚C µA dBc MΩ pF VCM Pin Input Characteristics (Common Mode Feedback Amplifier) Input Offset Voltage Input Offset Voltage Average Temperature Drift Input Bias Current VCM CMRR Input Resistance Common Mode Gain Output Performance VOUT IOUT ISC CMVR Output Voltage Swing Linear Output Current Output Short Circuit Current Common Mode Voltage Range Output Balance Error V mA mA Common Mode, VID = 0 ±5 ±8 mV µV/˚C µA dB kΩ V/V ± 54 ± 70 250 3.8 1.2 −65 V dB Miscellaneous Performance Enable Voltage Threshold Disable Voltage Threshold Enable/Disable Time Open Loop Gain V V ns dB 5 www.national.com LMH6550 5V Electrical Characteristics Symbol PSRR IS ISD Parameter Power Supply Rejection Ratio Supply Current Disabled Supply Current (Note 2) (Continued) Single ended in differential out, TA = 25˚C, AV = +1, VS = 5V, VCM = 2.5V, RF = RG = 365Ω, RL = 500Ω; Unless specified. Boldface limits apply at the temperature extremes. Conditions DC, ∆VS = ± 0.5V RL = ∞ Min (Note 8) 72 16.5 Typ (Note 7) 77 19 1 23.5 26.5 1.2 Max (Note 8) Units dB mA mA Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics tables. Note 2: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Note 3: The maximum output current (IOUT) is determined by device power dissipation limitations. Note 4: The maximum power dissipation is a function of TJ(MAX), θJA and TA. The maximum allowable power dissipation at any ambient temperature is P D= (TJ(MAX) — TA)/ θJA. All numbers apply for package soldered directly into a 2 layer PC board with zero air flow. Note 5: Human body model: 1.5 kΩ in series with 100 pF. Machine model: 0Ω in series with 200pF. Note 6: Slew Rate is the average of the rising and falling edges. Note 7: Typical numbers are the most likely parametric norm. Note 8: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control (SQC) methods. Note 9: Negative input current implies current flowing out of the device. Note 10: Drift determined by dividing the change in parameter at temperature extremes by the total temperature change. Note 11: Parameter is guaranteed by design. www.national.com 6 LMH6550 Typical Performance Characteristics less Specified). Frequency Response vs. Supply Voltage (TA = 25˚C, VS = ± 5V, RL = 500Ω, RF = 365Ω, AV = +1; UnFrequency Response 20130114 20130115 Frequency Response vs. VOUT Frequency Response vs. Gain 20130116 20130134 Frequency Response vs. Capacitive Load Suggested ROUT vs. Cap Load 20130121 20130122 7 www.national.com LMH6550 Typical Performance Characteristics (TA = 25˚C, VS = ±5V, RL = 500Ω, RF = 365Ω, AV = +1; Unless Specified). (Continued) Suggested ROUT vs. Cap Load 1 VPP Pulse Response Single Ended Input 20130123 20130126 2 VPP Pulse Response Single Ended Input Large Signal Pulse Response 20130127 20130125 Output Common Mode Pulse Response Distortion vs. Frequency Single Ended Input 20130124 20130128 www.national.com 8 LMH6550 Typical Performance Characteristics (TA = 25˚C, VS = ±5V, RL = 500Ω, RF = 365Ω, AV = +1; Unless Specified). (Continued) Distortion vs. Frequency Single Ended Input Maximum VOUT vs. IOUT 20130129 20130130 Minimum VOUT vs. IOUT Closed Loop Output Impedance 20130131 20130117 Closed Loop Output Impedance PSRR 20130118 20130119 9 www.national.com LMH6550 Typical Performance Characteristics (TA = 25˚C, VS = ±5V, RL = 500Ω, RF = 365Ω, AV = +1; Unless Specified). (Continued) PSRR CMRR 20130120 20130133 Balance Error 3rd Order Intermodulation Products vs. VOUT 20130113 20130135 www.national.com 10 LMH6550 Application Section The LMH6550 is a fully differential amplifier designed to provide low distortion amplification to wide bandwidth differential signals. The LMH6550, though fully integrated for ultimate balance and distortion performance, functionally provides three channels. Two of these channels are the V+ and V− signal path channels, which function similarly to inverting mode operational amplifiers and are the primary signal paths. The third channel is the common mode feedback circuit. This is the circuit that sets the output common mode as well as driving the V+ and V− outputs to be equal magnitude and opposite phase, even when only one of the two input channels is driven. The common mode feedback circuit allows single ended to differential operation. The LMH6550 is a voltage feedback amplifier with gain set by external resistors. Output common mode voltage is set by the VCM pin. This pin should be driven by a low impedance reference and should be bypassed to ground with a 0.1 µF ceramic capacitor. Any signal coupling into the VCM will be passed along to the output and will reduce the dynamic range of the amplifier. The LMH6550 is equipped with a ENABLE pin to reduce power consumption when not in use. The ENABLE pin floats to logic high. If this pin is not used it can be left floating. The amplifier output stage goes into a high impedance state when the amplifier is disabled. The feedback and gain set resistors will then set the impedance of the circuit. For this reason input to output isolation will be poor in the disabled state. FULLY DIFFERENTIAL OPERATION The LMH6550 will perform best when used with split supplies and in a fully differential configuration. See Figure 1 and Figure 3 for recommend circuits. The resistors RO help keep the amplifier stable when presented with a load CL as is typical in an analog to digital converter (ADC). When fed with a differential signal, the LMH6550 provides excellent distortion, balance and common mode rejection provided the resistors RF, RG and RO are well matched and strict symmetry is observed in board layout. With a DC CMRR of over 80 dB, the DC and low frequency CMRR of most circuits will be dominated by the external resistors and board trace resistance. At higher frequencies board layout symmetry becomes a factor as well. Precision resistors of at least 0.1% accuracy are recommended and careful board layout will also be required. 20130102 FIGURE 2. Fully Differential Cable Driver With up to 15 VPP differential output voltage swing and 80 mA of linear drive current the LMH6550 makes an excellent cable driver as shown in Figure 2. The LMH6550 is also suitable for driving differential cables from a single ended source. 20130104 FIGURE 1. Typical Application The circuit shown in Figure 1 is a typical fully differential application as might be used to drive an ADC. In this circuit closed loop gain, (AV) = VOUT/ VIN = RF/RG. For all the applications in this data sheet VINis presumed to be the voltage presented to the circuit by the signal source. For differential signals this will be the difference of the signals on each input (which will be double the magnitude of each individual signal), while in single ended inputs it will just be the driven input signal. 11 20130110 FIGURE 3. Single Ended in Differential Out www.national.com LMH6550 Application Section (Continued) SINGLE ENDED INPUT TO DIFFERENTIAL OUTPUT The LMH6550 provides excellent performance as an active balun transformer. Figure 3 shows a typical application where an LMH6550 is used to produce a differential signal from a single ended source. It should be noted that compared to differential input, using a single ended input will reduce gain by 1/2. So that the closed loop gain will be; Gain = AV = 0.5 * RF/RG. In single ended input operation the output common mode voltage is set by the VCMpin as in fully differential mode. Also, In this mode the common mode feedback circuit must recreate the signal that is not present on the unused differential input pin. The performance chart titled “Balance Error” is the measurement of the effectiveness of this process. The common mode feedback circuit is responsible for ensuring balanced output with a single ended input. Balance error is defined as the amount of input signal that couples into the output common mode. It is measured as a the undesired output common mode swing divided by the signal on the input. Balance error can be caused by either a channel to channel gain error, or phase error. Either condition will produce a common mode shift. The chart titled “Balance Error” measures the balance error with a single ended input as that is the most demanding mode of operation for the amplifier. Supply and VCM pin bypassing are also critical in this mode of operation. See the above section on FULLY DIFFERENTIAL OPERATION for bypassing recommendations also see Figure 4 and Figure 5 for recommended supply bypassing configurations. SINGLE SUPPLY OPERATION The input stage of the LMH6550 has a built in offset of 0.7V towards the lower supply to accommodate single supply operation with single ended inputs. As shown in Figure 6, the input common mode voltage is less than the output common voltage. It is set by current flowing through the feedback network from the device output. The input common mode range of 0.4V to 3.2V places constraints on gain settings. Possible solutions to this limitation include AC coupling the input signal, using split power supplies and limiting stage gain. AC coupling with single supply is shown in Figure 7. In Figure 6 below closed loop gain = AV= RF/RG. Please note that in single ended to differential operation VIN is measured single ended while VOUT is measured differentially. This means that gain is really 1/2 or 6 dB less when measured on either of the output pins separately. VICM= Input common mode voltage = (V+IN+V−IN)/2. 20130101 FIGURE 4. Split Supply Bypassing Capacitors 20130112 FIGURE 5. Single Supply Bypassing Capacitors The LMH6550 requires supply bypassing capacitors as shown in Figure 4 and Figure 5. The 0.01 µF and 0.1 µF capacitors should be leadless SMT ceramic capacitors and should be no more than 3 mm from the supply pins. The SMT capacitors should be connected directly to a ground plane. Thin traces or small vias will reduce the effectiveness of bypass capacitors. Also shown in both figures is a capacitor from the VCM pin to ground. The VCM pin is a high impedance input to a buffer which sets the output common mode voltage. Any noise on this input is transferred directly to the output. Output common mode noise will result in loss of dynamic range, degraded CMRR, degraded Balance and higher distortion. The VCM pin should be bypassed even if the pin in not used. There is an internal resistive divider on chip to set the output common mode voltage to the mid point of the supply pins. The impedance looking into this pin is approximately 25 kΩ. If a different output common mode voltage is desired drive this pin with a clean, accurate voltage reference. 20130111 FIGURE 6. Relating AV to Input/Output Common Mode Voltages www.national.com 12 LMH6550 Application Section (Continued) 20130109 20130105 FIGURE 7. AC Coupled for Single Supply Operation DRIVING ANALOG TO DIGITAL CONVERTERS Analog to digital converters (ADC) present challenging load conditions. They typically have high impedance inputs with large and often variable capacitive components. As well, there are usually current spikes associated with switched capacitor or sample and hold circuits. Figure 8 shows a typical circuit for driving an ADC. The two 56Ω resistors serve to isolate the capacitive loading of the ADC from the amplifier and ensure stability. In addition, the resistors form part of a low pass filter which helps to provide anti alias and noise reduction functions. The two 39 pF capacitors help to smooth the current spikes associated with the internal switching circuits of the ADC and also are a key component in the low pass filtering of the ADC input. In the circuit of Figure 8 the cutoff frequency of the filter is 1/ (2*π*56Ω *(39 pF + 14 pF)) = 53 MHz (which is slightly less than the sampling frequency). Note that the ADC input capacitance must be factored into the frequency response of the input filter, and that being a differential input the effective input capacitance is double. Also as shown in Figure 8 the input capacitance to many ADCs is variable based on the clock cycle. See the data sheet for your particular ADC for details. FIGURE 8. Driving an ADC The amplifier and ADC should be located as closely together as possible. Both devices require that the filter components be in close proximity to them. The amplifier needs to have minimal parasitic loading on the output traces and the ADC is sensitive to high frequency noise that may couple in on its input lines. Some high performance ADCs have an input stage that has a bandwidth of several times its sample rate. The sampling process results in all input signals presented to the input stage mixing down into the Nyquist range (DC to Fs/2). See AN-236 for more details on the subsampling process and the requirements this imposes on the filtering necessary in your system. USING TRANSFORMERS Transformers are useful for impedance transformation as well as for single to differential, and differential to single ended conversion. A transformer can be used to step up the output voltage of the amplifier to drive very high impedance loads as shown in Figure 9. Figure 11 shows the opposite case where the output voltage is stepped down to drive a low impedance load. Transformers have limitations that must be considered before choosing to use one. Compared to a differential amplifier, the most serious limitations of a transformer are the inability to pass DC and balance error (which causes distortion and gain errors). For most applications the LMH6550 will have adequate output swing and drive current and a transformer will not be desirable. Transformers are used primarily to interface differential circuits to 50Ω single ended test equipment to simplify diagnostic testing. 13 www.national.com LMH6550 Application Section (Continued) 20130107 20130103 FIGURE 9. Transformer Out High Impedance Load FIGURE 12. Driving 50Ω Test Equipment CAPACITIVE DRIVE As noted in the Driving ADC section, capacitive loads should be isolated from the amplifier output with small valued resistors. This is particularly the case when the load has a resistive component that is 500Ω or higher. A typical ADC has capacitive components of around 10 pF and the resistive component could be 1000Ω or higher. If driving a transmission line, such as 50Ω coaxial or 100Ω twisted pair, using matching resistors will be sufficient to isolate any subsequent capacitance. For other applications see the “Suggested ROUT vs. Cap Load” charts in the Typical Performance Characteristics section. POWER DISSIPATION The LMH6550 is optimized for maximum speed and performance in the small form factor of the standard SOIC package, and is essentially a dual channel amplifier. To ensure maximum output drive and highest performance, thermal shutdown is not provided. Therefore, it is of utmost importance to make sure that the TJMAX is never exceeded due to the overall power dissipation. Follow these steps to determine the Maximum power dissipation for the LMH6550: 1. Calculate the quiescent (no-load) power: PAMP = ICC* (VS), where VS = V+ - V−. (Be sure to include any current through the feedback network if VOCM is not mid rail.) 2. Calculate the RMS power dissipated in each of the output stages: PD (rms) = rms ((VS - V+OUT) * I+OUT) + rms ((VS − V−OUT) * I−OUT) , where VOUT and IOUT are the voltage and the current measured at the output pins of the differential amplifier as if they were single ended amplifiers and VS is the total supply voltage. 3. Calculate the total RMS power: PT = PAMP + PD. The maximum power that the LMH6550 package can dissipate at a given temperature can be derived with the following equation: PMAX = (150˚ – TAMB)/ θJA, where TAMB = Ambient temperature (˚C) and θJA = Thermal resistance, from junction to ambient, for a given package (˚C/W). For the SOIC package θJA is 150˚C/W, and for the MSOP package it is 235˚C/W. 20130132 FIGURE 10. Calculating Transformer Circuit Net Gain 20130106 FIGURE 11. Transformer Out Low Impedance Load www.national.com 14 LMH6550 Application Section (Continued) NOTE: If VCM is not 0V then there will be quiescent current flowing in the feedback network. This current should be included in the thermal calculations and added into the quiescent power dissipation of the amplifier. ESD PROTECTION The LMH6550 is protected against electrostatic discharge (ESD) on all pins. The LMH6550 will survive 2000V Human Body model and 200V Machine model events. Under normal operation the ESD diodes have no effect on circuit performance. There are occasions, however, when the ESD diodes will be evident. If the LMH6550 is driven by a large signal while the device is powered down the ESD diodes will conduct . The current that flows through the ESD diodes will either exit the chip through the supply pins or will flow through the device, hence it is possible to power up a chip with a large signal applied to the input pins. Using the shutdown mode is one way to conserve power and still prevent unexpected operation. BOARD LAYOUT The LMH6550 is a very high performance amplifier. In order to get maximum benefit from the differential circuit architecture board layout and component selection is very critical. The circuit board should have low a inductance ground plane and well bypassed broad supply lines. External components should be leadless surface mount types. The feedback network and output matching resistors should be composed of short traces and precision resistors (0.1%). The output matching resistors should be placed within 3-4 mm of the amplifier as should the supply bypass capacitors. The LMH730154 evaluation board is an example of good layout techniques. Evaluation boards are available free of charge through the product folder on National’s web site. The LMH6550 is sensitive to parasitic capacitances on the amplifier inputs and to a lesser extent on the outputs as well. Ground and power plane metal should be removed from beneath the amplifier and from beneath RF and RG. With any differential signal path symmetry is very important. Even small amounts of assymetery will contribute to distortion and balance errors. EVALUATION BOARD Generally, a good high frequency layout will keep power supply and ground traces away from the inverting input and output pins. Parasitic capacitances on these nodes to ground will cause frequency response peaking and possible circuit oscillations (see Application Note OA-15 for more information). National Semiconductor suggests the following evaluation boards as a guide for high frequency layout and as an aid in device testing and characterization: Device LMH6550MA Package SOIC Evaluation Board Part Number LMH730154 These evaluation boards can be shipped when a device sample request is placed with National Semiconductor. 15 www.national.com LMH6550 Physical Dimensions inches (millimeters) unless otherwise noted 8-Pin SOIC NS Package Number M08A 8–Pin MSOP NS Package Number MUA08A www.national.com 16 LMH6550 Differential, High Speed Op Amp Notes National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. 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